CMP04NBC [ADI]
CMP04NBC;
| 型号： | CMP04NBC |
| 厂家： | 
ADI |
| 描述： | CMP04NBC 放大器 |
| 文件： | 总8页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Quad Low Power,
Precision Comparator
a
CMP04
PIN CONNECTIONS
FEATURES
High Gain: 200 V/mV typ
14-Lead Cerdip
14-Lead Plastic DIP
14-Lead SOIC
Single or Dual Supply Operation
Input Voltage Range Includes Ground
Low Power Consumption (1.5 mW/Comparator)
Low Input Bias Current: 100 nA max
Low Input Offset Current: 10 nA max
Low Offset Voltage: 1 mV max
Low Output Saturation Voltage: 250 mV @ 4 mA
Logic Output Compatible with TTL, DTL, ECL, MOS and
CMOS
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT 3
OUT 4
GND
OUT 2
OUT 1
V+
4
1
IN 1–
IN 1+
IN 2–
IN 2+
IN 4+
IN 4–
IN 3+
IN 3–
Directly Replaces LM139/239/339 Comparators
Available in Die Form
2
3
8
CMP04
GENERAL DESCRIPTION
TYPICAL INTERFACE
Four precision independent comparators comprise the CMP04.
Performance highlights include a very low offset voltage, low
output saturation voltage and high gain in a single supply de-
sign. The input voltage range includes ground for single supply
operation and V– for split supplies. A low power supply current
of 2 mA, which is independent of supply voltage, makes this the
preferred comparator for precision applications requiring mini-
mal power consumption. Maximum logic interface flexibility is
offered by the open-collector TTL output.
5.0
1/4
CD4011
3
100k⍀
1/4
CMP04
12
Figure 2a. Driving CMOS
V+
5.0
3.5A
100A
3.5A
100A
OUTPUT
–INPUT
3
10k⍀
Q8
1/4
Q3
Q2
CMP04
1/4 SN7400
Q1
+INPUT
Q4
12
*
*
Q7
Q5
Q6
Figure 2b. Driving TTL
*
SUBSTRATE DIODES
Figure 1. Simplified Schematic (1/4 CMP04)
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 1998
CMP04–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ V+ = +5 V, TA = +25؇C, unless otherwise noted)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Input Offset Voltage
Input Offset Current
Input Bias Current
Voltage Gain
VOS
IOS
IB
AV
tr
RS = 0 Ω, RL = 5.1 kΩ, VO = 1.4 V1
IIN(+) – IIN(–), RL = 5.1 kΩ, VO = 1.4 V
IIN(+) or IIN(–)
0.4
2
25
200
1
10
100
mV
nA
nA
RL ≥ 15 kΩ, V+ = 15 V2
80
V/mV
Large-Signal Response Time
VIN = TTL Logic Swing, VREF = 1.4 V3
VRL = 5 V, RL = 5.1 kΩ
300
1.3
ns
Small-Signal Response Time
Input Voltage Range
Common-Mode Rejection Ratio CMRR
Power Supply Rejection Ratio
Saturation Voltage
Output Sink Current
Output Leakage Current
Supply Current
tr
VIN = 100 mV Step3, 5 mV Overdrive
V
RL = 5 V, RL = 5.1 kΩ
µs
V
CMVR
(Note 4)
0
80
80
V+ –1.5
400
(Notes 2, 5)
100
100
250
16
0.1
0.8
dB
dB
mV
mA
nA
mA
PSRR
VOL
ISINK
ILEAK
I+
V+ = +5 V to +18 V2
VIN(–) ≥ 1 V, VIN(+) = 0, ISINK ≤ 4 mA
VIN(–) ≥ 1 V, VIN(+) = 0, VO ≤ 1.5 V
VIN(+) ≥ 1 V, VIN(–) = 0, VO = 30 V
6
100
2.0
RL =
∞, All Comps V+ = 30 V
NOTES
1At output switch point, VO = 1.4 V, RS = 0 Ω with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V).
2Guaranteed by design.
3Sample tested.
4The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range
is V+ –1.5 V, but either or both inputs can go to +30 V without damage.
5RL ≥ 15 kΩ, V+ = 15 V, VCM = 1.5 V to 13.5 V.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1
2
Package Type
Units
JA
JC
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .36 V or ±18 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 36 V dc
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +36 V
Operating Temperature Range
14-Lead Hermetic DIP (Y)
14-Lead Plastic DIP (P)
14-Lead SOIC
94
83
10
39
36
°C/W
°C/W
°C/W
120
CMP04BY . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
CMP04FP, FS . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature (TJ) . . . . . . . . . . . . . –65°C to +150°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
(P Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Input Current (VIN < –3.0 V) . . . . . . . . . . . . . . . . . . . 50 mA
Output Short-Circuit to GND . . . . . . . . . . . . . . . .Continuous
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . .+300°C
NOTES
1Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2θJA is specified for worst case mounting conditions, i.e., θJA is specified for device
in socket for cerdip and plastic DIP packages; θJA is specified for device soldered
to printed circuit board for SO package.
ORDERING GUIDE
TA = +25؇C Temperature
VOS Ranges
Package
Descriptions
Package
Options
Model
CMP04BY/883C 1 mV
–55°C to +125°C 14-Lead Cerdip
Q-14
CMP04FP
CMP04FS
1 mV
1 mV
–40°C to +85°C
–40°C to +85°C
14-Lead Plastic DIP N-14
14-Lead SOIC
R-14/SO-14
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the CMP04 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–2–
REV. C
CMP04
(@ V+ = +5 V, –55؇C ≤ TA ≤ +125؇C for CMP04BY, –40؇C ≤ TA ≤ +85؇C for
CMP04FP/FS, unless otherwise noted)
ELECTRICAL CHARACTERISTICS
CMP04B/F1
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Input Offset Voltage
VOS
RS = 0 Ω, RL = 5.1 kΩ
1
1
2
2
mV
mV
VO = 1.4 V2
Input Offset Current
IOS
IIN(+) – IIN(–)
RL = 5.1 kΩ
VO = 1.4 V
4
4
4
20
20
20
nA
nA
nA
Input Bias Current
Voltage Gain
IB
AV
tr
IIN(+) or IIN(–)
RL ≥ 15 kΩ, V+ = 15 V3
40
200
nA
70
125
V/mV
Large-Signal Response Time
VIN = TTL Logic Swing
VREF = 1.4 V4
VRL = 5 V, RL = 5.1 kΩ
300
300
300
ns
ns
ns
Small-Signal Response Time
tr
VIN = 100 mV Step4
5 mV Overdrive
VRL = 5 V, RL = 5.1 kΩ
1.3
1.3
1.3
µs
µs
µs
Input Voltage Range
CMVR
CMRR
PSRR
VOL
(Note 5)
0
V+ –1.5
V
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Saturation Voltage
(Notes 1, 3)
60
80
100
100
dB
dB
V+ = +5 V to +18 V
VIN(–) ≥ 1 V, VIN(+) = 0,
250
250
700
700
mV
mV
I
SINK ≤ 4 mA
Output Sink Current
Output Leakage Current
Supply Current
ISINK
ILEAK
I+
VIN(–) ≥ 1 V,
VIN(+) = 0, VO ≤ 1.5 V
5
5
16
16
mA
mA
VIN(+) ≥ 1 V,
VIN(–) = 0, VO = 30 V
0.1
0.1
200
200
nA
nA
RL
=
∞
, All Comps
1.2
1.2
3.0
3.0
mA
mA
V+ = 30 V
NOTES
1RL ≥ 15 kΩ, V+ = 15 V, VCM = 1.5 V to 13.5 V.
2At output switch point, VO = 1.4 V, RS = 0 Ω with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V).
3Guaranteed by design.
4Sample tested.
5The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode
voltage range is V+ –1.5 V, but either or both inputs can go to +30 V without damage.
Specifications subject to change without notice.
–18V
–18V
3.6k⍀
3.6k⍀
14
13
12
11
9
8
10
4
1
2
CMP04
3
1
2
3
4
5
6
7
100k⍀
3.6k⍀
3.6k⍀
+18V
+18V
ZENER
5.8V TO 6.2V
1 WATT
ONE EACH
PER BOARD
470k⍀
+30V
MIL-STD-883, METHOD 1015, CONDITION B
TO ADJACENT SOCKETS
Figure 3. Burn-In Circuit
REV. C
–3–
CMP04
DICE CHARACTERISTICS
DIE SIZE 0.058 × 0.055 inch, 3190 sq. mils
(1.47 × 1.40 mm, 2.058 sq. mm)
(@ V+ = +5 V, TA = +25؇C, unless otherwise noted)
WAFER TEST LIMITS
CMP04N
Limit
CMP04G
Limit
Parameter
Symbol
Conditions
Units
Input Offset Voltage
VOS
RS = 0 Ω, RL = 5.1 kΩ
VO = 1.4 V1
1
2
mV max
Input Offset Current
IOS
IIN(+) – IIN(–)
RL = 5.1 kΩ
VO = 1.4 V
10
25
nA max
nA max
V/mV min
V max
Input Bias Current
IB
IIN(+) or IIN(–)1
100
80
100
50
Voltage Gain
AV
RL ≥ 15 kΩ, V+ = 15 V3
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Saturation Voltage
CMVR
CMRR
PSRR
VOL
(Notes 2, 3)
V+ –1.5
80
V+ –1.5
80
(Note 4)
dB min
dB min
V+ = +5 V to +18 V
80
80
VIN(–) ≥ 1 V, VIN(+) = 0,
I
SINK ≤ 4 mA
400
6
400
6
mV max
mA min
nA max
mA max
Output Sink Current
Output Leakage Current
Supply Current
ISINK
ILEAK
I+
VIN(–) ≥ 1 V,
VIN(+) = 0, VO ≤ 1.5 V
VIN(+) ≥ 1 V,
VIN(–) = 0, VO = 30 V
100
2
100
2
RL
= ∞, All Comps
V+ = 30 V
NOTES
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS (@ V+ = +5 V, unless otherwise noted)
.
CMP04N
Typical
CMP04G
Typical
Parameter
Symbol
Conditions
Units
ns
Large-Signal Response Time
tr
VIN = TTL Logic Swing
VREF = 1.4 V5
VRL = 5 V, RL = 5.1 kΩ
VIN = 100 mV Step5
5 mV Overdrive
600
1.3
600
1.3
Small-Signal Response Time
tr
VRL = 5 V, RL = 5.1 kΩ
µs
3Guaranteed by design.
NOTES
1At output switch point, VO = 1.4 V, RS = 0 Ω with V+ from 5 V; and over the
full input common-mode range (0 V to V+ –1.5 V).
4RL ≥ 15 kΩ. VCM = 1.5 V to 13.5 V.
5Sample tested.
2The input common-mode voltage or either input signal voltage should not be allowed
to go negative by more than 0.3 V. The upper end of the common-mode voltage
range is V+ –1.5 V, but either or both inputs can go to +30 V without damage.
Specifications subject to change without notice.
REV. C
–4–
CMP04
Typical Performance Characteristics
80
60
40
20
0
3.0
2.0
+0.3
+0.2
+0.1
0
T
= –55؇C
A
1.0
T
= 0؇C
A
0
T
= +25؇C/70؇C
A
–1.0
–2.0
–3.0
–0.1
–0.2
–0.3
T
= +125؇C
A
–60
0
5
10
15
20
25 30
35
40
–40 –20
0
20 40 60 80 100 120 140
–60
–40 –20
0
20 40 60 80 100 120 140
V+ – SUPPLY VOLTAGE – V
TEMPERATURE – ؇C
TEMPERATURE – ؇C
DC
Figure 6. Input Offset Current vs.
Temperature
Figure 4. Offset Voltage vs.
Temperature
Figure 5. Input Bias Current vs. V+
and Temperature
10
160
1.1
150
140
130
120
110
100
90
T
= –55؇C
OUT OF SATURATION
1.0
A
T
= 0؇C
A
0.9
0.7
0.5
0.3
0.1
T
= +125؇C
T
= +25؇C
A
A
0.1
0.01
T
= +70؇C
A
T
= –55؇C
A
T
= +125؇C
A
80
T
= +25؇C
A
70
0.001
60
–60
0.01
0.1
1.0
10
100
–40 –20
0
20 40 60 80 100 120 140
0
5
10
15
20
25 30
35
40
I
– OUTPUT SINK CURRENT – mA
SUPPLY VOLTAGE – V
TEMPERATURE – ؇C
O
DC
Figure 9. Output Voltage vs. Out-
put Current and Temperature
Figure 8. Supply Current vs. Supply
Voltage
Figure 7. Voltage Gain vs.
Temperature
6.0
5.0
6.0
T
= +25؇C
INPUT OVERDRIVE =
100mV
INPUT OVERDRIVE =
5.0mV
A
5.0
4.0
3.0
2.0
1.0
0
+5VDC
4.0
20mV
20mV
V
IN
3.0
5.1k⍀
5mV
2.0
V
100mV
OUT
1.0
0
+5VDC
5.1k⍀
V
IN
0
0
V
OUT
–50
–100
–50
–100
T
= +25؇C
A
0
0.5
1.0
1.5
2.0
0
0.5
1.0
1.5
2.0
TIME – s
TIME – s
Figure 11. Response Time for Various Input
Overdrives—Positive Transition
Figure 10. Response Time for Various Input
Overdrives—Negative Transition
REV. C
–5–
CMP04
TYPICAL APPLICATIONS
V+
V+
+V
IN
3k⍀
1/4
CMP04
6.2k⍀
1M⍀
1/4
V
V+
O
CMP04
V
O
1M⍀
STROBE
INPUT
*
1M⍀
*
OR LOGIC WITHOUT
PULLUP RESISTOR
Figure 12. Output Strobing
Figure 15. Inverting Comparator with Hysteresis
V+
2R
S
4.3k⍀
100k⍀
+V
HI
REF
1/4
CMP04
75pF
V+
0
1/4
R
S
f = 186kHz
CMP04
+V
IN
V
O
100k⍀
100k⍀
1/4
CMP04
V+
2R
S
100k⍀
+V
LOW
REF
Figure 13. Limit Comparator
Figure 16. Square Wave Oscillator
V+
V+
100k⍀
100k⍀
V
IN1
+V
3k⍀
REF
5.1k⍀
1/4
1/4
CMP04
CMP04
10k⍀
1N914
V
V
O
IN2
+V
IN
V
O
10M⍀
Figure 14. Noninverting Comparator with Hysteresis
Figure 17. Comparing Input Voltages of Opposite Polarity
REV. C
–6–
CMP04
V+
15k⍀
V+
0
V+
R1
1M⍀
D1
1N914
t0
1M⍀
10k⍀
1ms
R2
100k⍀
D2
1N914
100pF
V+
0
+V
IN
PW
1/4
CMP04
1N914
1M⍀
80pF
V+
t0 t1
0
1/4
CMP04
V
O
t0
t1
t2
0.01F
1M⍀
1M⍀
V+
FOR LARGE RATIOS OF R1/R2,
D1 CAN BE OMITTED.
1N914
1M⍀
1M⍀
Figure 18. One-Shot Multivibrator
Figure 20. Pulse Generator
V+
V+
39k⍀
200k⍀
3k⍀
3k⍀
100k⍀
100k⍀
+0.375V
A
B
C
+0.075V
1/4
CMP04
A
B
C
1k⍀
1/4
CMP04
1k⍀
f
V+
f
V+
100k⍀
100k⍀
100k⍀
100k⍀
0
1k⍀
0
"0" "1"
1k⍀
1 = A • B • C
"0" "1"
1 = A + B + C
Figure 19. AND Gate
Figure 21. OR Gate
V+
1M⍀
560k⍀
1M⍀
+4V
100k⍀
10M⍀
15k⍀
+V
IN
1S
1/4
CMP04
100k⍀
0
1/4
CMP04
100pF
V+
0
V
T
O
10M⍀
t0
t1
240k⍀
T = 0.3ms
62k⍀
Figure 22. One-Shot Multivibrator with Input Lockout
REV. C
–7–
CMP04
TYPICAL APPLICATIONS
V+
V+
V3
V2
3.0k⍀
3.0k⍀
3.0k⍀
10k⍀
15k⍀
200k⍀
10k⍀
10M⍀
V+
0
t0
t3
1/4
CMP04
V
V
C1
O3
V3
V1
0
V+
51k⍀
10k⍀
t0
t1
t2
t3
t4
10M⍀
V+
0
1/4
CMP04
10k⍀
t0 t2
V+
1/4
CMP04
C1
0.001F
V
+V
O2
IN
0
V2
V+
t0
t4
INPUT GATING SIGNAL
51k⍀
10k⍀
10M⍀
V+
0
t0 t1
1/4
CMP04
V
O1
V1
51k⍀
Figure 23. Time Delay Generator
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
14-Lead Cerdip
(Q-14)
14-Lead Plastic DIP
(N-14)
0.005 (0.13) MIN
14
0.098 (2.49) MAX
0.795 (20.19)
0.725 (18.42)
8
14
1
8
7
0.310 (7.87)
0.280 (7.11)
0.240 (6.10)
0.220 (5.59)
7
0.325 (8.25)
0.300 (7.62)
1
0.195 (4.95)
0.115 (2.93)
0.320 (8.13)
0.290 (7.37)
PIN 1
0.785 (19.94) MAX
0.060 (1.52)
0.015 (0.38)
PIN 1
0.060 (1.52)
0.210 (5.33)
MAX
0.015 (0.38)
0.200 (5.08)
MAX
0.130
(3.30)
MIN
0.150
(3.81)
MIN
0.160 (4.06)
0.115 (2.93)
0.200 (5.08)
0.125 (3.18)
0.015 (0.381)
0.008 (0.204)
SEATING
PLANE
0.022 (0.558)
0.100 0.070 (1.77)
0.015 (0.38)
0.008 (0.20)
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
0.100
(2.54)
BSC
(2.54)
BSC
0.070 (1.78)
0.014 (0.356)
0.045 (1.15)
15°
0°
0.030 (0.76)
14-Lead SOIC
(R-14)
0.3444 (8.75)
0.3367 (8.55)
14
1
8
7
0.1574 (4.00)
0.1497 (3.80)
0.2440 (6.20)
0.2284 (5.80)
0.0688 (1.75)
0.0532 (1.35)
PIN 1
0.0196 (0.50)
0.0099 (0.25)
x 45°
0.0098 (0.25)
0.0040 (0.10)
8°
0°
0.0500
(1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0500 (1.27)
0.0160 (0.41)
0.0099 (0.25)
0.0075 (0.19)
REV. C
–8–
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ADI
CMP05CZ
IC COMPARATOR, 2000 uV OFFSET-MAX, 125 ns RESPONSE TIME, CDIP8, HERMETIC SEALED, CERAMIC, MINI, DIP-8, Comparator
ADI
CMP05CZ/883
IC COMPARATOR, 2000 uV OFFSET-MAX, 125 ns RESPONSE TIME, CDIP8, HERMETIC SEALED, CERAMIC, MINI, DIP-8, Comparator
ADI
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