ADUM3210ARZ [ADI]
Dual-Channel Digital Isolators, Enhanced System-Level ESD Reliability; 双通道数字隔离器，增强的系统级ESD可靠性
| 型号： | ADUM3210ARZ |
| 厂家： | 
ADI |
| 描述： | Dual-Channel Digital Isolators, Enhanced System-Level ESD Reliability |
| 文件： | 总20页 (文件大小：526K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual-Channel Digital Isolators,
Enhanced System-Level ESD Reliability
ADuM3210/ADuM3211
GENERAL DESCRIPTION
FEATURES
Enhanced system-level ESD performance per IEC 61000-4-x
High temperature operation: 125°C
Default low output
Narrow body, RoHS-compliant, 8-lead SOIC
Low power operation
The ADuM321x1 are dual-channel, digital isolators based on
Analog Devices, Inc., iCoupler® technology. Combining high
speed CMOS and monolithic transformer technology, this
isolation component provides outstanding performance charac-
teristics superior to alternatives such as optocoupler devices.
5 V operation
By avoiding the use of LEDs and photodiodes, iCoupler
devices remove the design difficulties commonly associated
with optocouplers. The typical optocoupler concerns regarding
uncertain current transfer ratios, nonlinear transfer functions,
and temperature and lifetime effects are eliminated with the
simple iCoupler digital interfaces and stable performance charac-
teristics. The need for external drivers and other discrete
components is eliminated with these iCoupler products.
Furthermore, iCoupler devices consume one-tenth to one-
sixth the power of optocouplers at comparable signal data rates.
1.6 mA per channel maximum @ 0 Mbps to 2 Mbps
3.7 mA per channel maximum @ 10 Mbps
3 V operation
1.4 mA per channel maximum @ 0 Mbps to 2 Mbps
2.4 mA per channel maximum @ 10 Mbps
3 V/5 V level translation
High data rate: dc to 10 Mbps (NRZ)
Precise timing characteristics
3 ns maximum pulse-width distortion at 5 V operation
3 ns maximum channel-to-channel matching
High common-mode transient immunity: >25 kV/μs
Safety and regulatory approvals
The two channels of the ADuM321x are independent isolation
channels and are available in two channel configurations with
two different data rates up to 10 Mbps (see the Ordering Guide).
They operate with the supply voltage on either side ranging
from 2.7 V to 5.5 V, providing compatibility with lower voltage
systems as well as enabling voltage translation functionality across
the isolation barrier. The ADuM321x isolators have a default
output low characteristic in comparison to the ADuM3200/
ADuM3201 models that have a default output high characteristic.
The ADuM321x are also available in 125°C temperature grade.
UL recognition: 2500 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE Certificate of Conformity
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12
V
IORM = 560 V peak
APPLICATIONS
Size-critical multichannel isolation
SPI interface/data converter isolation
RS-232/RS-422/RS-485 transceiver isolation
Digital field bus isolation
In comparison to the ADuM120x isolator, the ADuM321x
isolators contain various circuit and layout changes providing
increased capability relative to system-level IEC 61000-4-x
testing (ESD, burst, and surge). The precise capability in these
tests for either the ADuM120x or ADuM321x products is strongly
determined by the design and layout of the user’s board or module.
For more information, see the AN-793 Application Note,
ESD/Latch-Up Considerations with iCoupler Isolation Products.
Gate drive interfaces
FUNCTIONAL BLOCK DIAGRAMS
ADuM3210
ADuM3211
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
V
V
V
V
V
V
V
V
DD1
DD2
OA
OB
DD1
DD2
IA
ENCODE
ENCODE
DECODE
DECODE
ENCODE
ENCODE
DECODE
DECODE
V
V
V
OA
IA
V
IB
IB
OB
GND
GND
GND
GND
2
1
2
1
Figure 1. ADuM3210 Functional Block Diagram
Figure 2. ADuM3211 Functional Block Diagram
1 Protected by U.S. Patents 5,952,849; 6,873,065; 7,075,239. Other patents pending.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007–2009 Analog Devices, Inc. All rights reserved.
ADuM3210/ADuM3211
TABLE OF CONTENTS
Features .............................................................................................. 1
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ............................................................................ 12
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—5 V, 105° Operation....................... 3
Electrical Characteristics—3 V, 105°C Operation ................... 4
Electrical Characteristics—Mixed 5 V/3 V, 105°C Operation 5
Electrical Characteristics—Mixed 3 V/5 V, 105°C Operation 6
Electrical Characteristics—5 V, 125°C Operation.................... 7
Electrical Characteristics—3 V, 125°C Operation..................... 8
Electrical Characteristics—Mixed 5 V/3 V, 125°C Operation 9
Recommended Operating Conditions .................................... 12
Absolute Maximum Ratings ......................................................... 13
ESD Caution................................................................................ 13
Pin Configuration and Function Descriptions........................... 14
Truth Tables................................................................................. 14
Typical Performance Characteristics ........................................... 15
Applications Information.............................................................. 16
PC Board Layout ........................................................................ 16
System-Level ESD Considerations and Enhancements ........ 16
Propagation Delay-Related Parameters................................... 16
DC Correctness and Magnetic Field Immunity........................... 16
Power Consumption .................................................................. 17
Insulation Lifetime..................................................................... 18
Outline Dimensions....................................................................... 19
Ordering Guide .......................................................................... 19
Electrical Characteristics—Mixed 3 V/5 V, 125°C Operation
....................................................................................................... 10
Package Characteristics ............................................................. 11
Regulatory Information............................................................. 11
Insulation and Safety-Related Specifications.......................... 11
REVISION HISTORY
9/09 –Rev. B to Rev. C
Added ADuM3210A and ADuM3211A .................... Throughout
Changes to General Description Section ...................................... 1
Reformatted Electrical Characteristics Tables.............................. 3
Moved Truth Tables Section.......................................................... 14
Changes to Ordering Guide .......................................................... 20
7/09—Rev. A to Rev. B
Added ADuM3211........................................................ Throughout
Changes to Specifications Section.................................................. 3
Added Table 16 ............................................................................... 19
Added Figure 5 and Table 18 ........................................................ 20
Added Figure 11.............................................................................. 21
Changes to Power Consumption Section.................................... 23
Changes to Ordering Guide .......................................................... 25
9/08—Rev. Sp0 to Rev. A
Changes to Features and General Description Sections ............. 1
Changes to Specifications Section.................................................. 3
Changes to Recommended Operating Conditions Section...... 11
Changes to Ordering Guide .......................................................... 18
7/07—Revision Sp0: Initial Version
Rev. C | Page 2 of 20
ADuM3210/ADuM3211
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V, 105° OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 1.
A Grade
Typ
B Grade
Typ
Parameter
Symbol
Min
20
Max
Min
20
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Output Rise/Fall Time
1
50
5
10
50
3
Mbps
ns
ns
ps/°C
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH
PWD
6
5
PW
tPSK
1000
100
Within PWD limit
Between any two units
20
15
tPSKCD
tPSKOD
tR/tF
5
20
3
15
ns
ns
ns
2.5
2.5
10% to 90%
Table 2.
1 Mbps—A Grade, B Grade
10 Mbps–B Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
1.3
1.0
1.1
1.3
1.7
1.6
1.5
1.8
3.5
1.7
2.6
3.1
4.6
2.8
3.4
4.0
mA
mA
mA
mA
ADuM3211
Table 3. For All Models
Parameter
Symbol
Min
0.7 VDDX
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
V
V
V
V
V
V
μA
0.3 VDDX
VDDX − 0.1
VDDX − 0.5
5.0
4.8
0.0
0.2
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
+0.01
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.4
0.5
0.19
0.05
0.8
0.6
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.2
1
|CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 3 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire recommended
operation range: ADuM3210 supply voltages 2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V; ADuM3211 supply voltages 3.0 V ≤ VDD1 ≤ 3.6 V,
3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS
signal levels, unless otherwise noted.
Table 4.
A Grade
Typ
B Grade
Typ
Parameter
Symbol
Min
Max
Min
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
ADuM3210
1
60
10
60
Mbps
ns
Within PWD limit
50% input to 50% output
tPHL, tPLH
PWD
20
20
|tPLH − tPHL
|
5
6
3
4
ns
ns
ADuM3211
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
6
5
ps/°C
ns
ns
PW
tPSK
1000
100
Within PWD limit
Between any two units
29
22
tPSKCD
tPSKOD
tR/tF
5
29
3
22
ns
ns
ns
Opposing-Direction
Output Rise/Fall Time
3.0
3.0
10% to 90%
Table 5.
1 Mbps—A Grade, B Grade
10 Mbps—B Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
0.8
0.7
0.7
0.8
1.3
1.0
1.3
1.6
2.0
1.1
1.5
1.9
3.2
1.7
2.1
2.4
mA
mA
mA
mA
ADuM3211
Table 6. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
0.7 VDDX
V
V
V
V
V
V
μA
0.3 VDDX
VDDX − 0.1
VDDX − 0.5
3.0
2.8
0.0
0.2
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
+0.01
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.3
0.3
0.10
0.03
0.5
0.5
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.1
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 4 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 105°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire
recommended operation range: ADuM3210 supply voltages 4.5 V ≤ VDD1 ≤ 5.5V, 2.7 V ≤ VDD2 ≤ 3.6 V; ADuM3211 supply voltages
4.5 V ≤ VDD1 ≤ 5.5V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with
CL = 15 pF, and CMOS signal levels, unless otherwise noted.
Table 7.
A Grade
Typ
B Grade
Typ
Parameter
Symbol
Min
15
Max
Min
15
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Output Rise/Fall Time
1
55
5
10
55
3
Mbps
ns
ns
ps/°C
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH
PWD
6
5
PW
tPSK
1000
100
Within PWD limit
Between any two units
29
22
tPSKCD
tPSKOD
tR/tF
5
29
3
22
ns
ns
ns
3.0
3.0
10% to 90%
Table 8.
1 Mbps—A Grade, B Grade
10 Mbps—B Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
1.3
0.7
1.1
0.8
1.7
1.0
1.5
1.6
3.5
1.1
2.6
1.9
4.6
1.7
3.4
2.4
mA
mA
mA
mA
ADuM3211
Table 9. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
0.7 VDDX
0.8
VDDX − 0.1
VDDX − 0.5
V
V
V
V
V
V
μA
0.3 VDDX
VDDX
VDDX − 0.2
0.0
0.2
+0.01
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.4
0.3
0.19
0.03
0.8
0.5
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.2
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 5 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V, 105°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3 V, VDD2 = 5.0 V. Minimum/maximum specifications apply over the entire
recommended operation range: ADuM3210 supply voltages 2.7 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; ADuM3211 supply voltages
3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications are tested with
CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 10.
A Grade
Typ
B Grade
Typ
Parameter
Symbol
Min
Max
Min
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
ADuM3210
1
55
10
55
Mbps
ns
Within PWD limit
50% input to 50% output
tPHL, tPLH
PWD
15
15
|tPLH − tPHL
|
5
6
3
4
ns
ns
ADuM3211
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
6
5
ps/°C
ns
ns
PW
tPSK
1000
100
Within PWD limit
Between any two units
29
22
tPSKCD
tPSKOD
tR/tF
15
29
3
22
ns
ns
ns
Opposing-Direction
Output Rise/Fall Time
2.5
2.5
10% to 90%
Table 11.
1 Mbps—A Grade, B Grade
10 Mbps—B Grade
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
0.8
1.0
0.7
1.3
1.3
1.6
1.3
1.8
2.0
1.7
1.5
3.1
3.2
2.8
2.1
4.0
mA
mA
mA
mA
ADuM3211
Table 12. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
VIH
VIL
0.7 VDDX
0.4
V
V
0.3 VDDX
Logic High Output Voltages
VOH
VDDX − 0. 1
VDDX − 0.5
VDDX
VDDX − 0.2
0.0
0.2
+0.01
V
V
V
V
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
μA
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.3
0.5
0.10
0.05
0.5
0.6
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.1
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 6 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—5 V, 125°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended
operation range: 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 13.
Parameter
Min
20
Typ
Max
Unit
Test Conditions/Comments
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Output Rise/Fall Time
10
50
3
Mbps
ns
ns
ps/°C
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH
PWD
5
PW
tPSK
100
Within PWD limit
Between any two units
15
tPSKCD
tPSKOD
tR/tF
3
15
ns
ns
ns
2.5
10% to 90%
Table 14.
1 Mbps
Typ
10 Mbps
Typ
Parameter
Symbol
Min
Max
Min
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
1.3
1.0
1.1
1.3
1.7
1.6
1.5
1.8
3.5
1.7
2.6
3.1
4.6
2.8
3.4
4.0
mA
mA
mA
mA
ADuM3211
Table 15. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
0.7 VDDX
V
V
V
V
V
V
μA
0.3 VDDX
VDDX − 0.1
VDDX − 0.5
5.0
4.8
0.0
0.2
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
+0.01
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.4
0.5
0.19
0.05
0.8
0.6
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.2
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 7 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—3 V, 125°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 16.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
ADuM3210
10
60
Mbps
ns
Within PWD limit
50% input to 50% output
tPHL, tPLH
PWD
20
|tPLH − tPHL
|
3
4
ns
ns
ADuM3211
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
5
ps/°C
ns
ns
PW
tPSK
100
Within PWD limit
Between any two units
22
tPSKCD
tPSKOD
tR/tF
3
22
ns
ns
ns
Opposing-Direction
Output Rise/Fall Time
3.0
10% to 90%
Table 17.
1 Mbps
10 Mbps
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
0.8
0.7
0.7
0.8
1.3
1.0
1.3
1.6
2.0
1.1
1.5
1.9
3.2
1.7
2.1
2.4
mA
mA
mA
mA
ADuM3211
Table 18. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
0.7 VDDX
V
V
V
V
V
V
μA
0.3 VDDX
VDDX − 0.1
VDDX − 0.5
3.0
2.8
0.0
0.2
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
+0.01
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.3
0.3
0.10
0.03
0.5
0.5
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.1
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 8 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V, 125°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, VDD2 = 3.0 V. Minimum/maximum specifications apply over the entire
recommended operation range: 4.5 V ≤ VDD1 ≤ 5.5V, 3.0 V ≤ VDD2 ≤ 3.6 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 19.
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
Opposing-Direction
Output Rise/Fall Time
10
55
3
Mbps
ns
ns
ps/°C
ns
ns
Within PWD limit
50% input to 50% output
|tPLH − tPHL|
tPHL, tPLH 15
PWD
5
PW
tPSK
100
Within PWD limit
Between any two units
22
tPSKCD
tPSKOD
tR/tF
3
22
ns
ns
ns
3.0
10% to 90%
Table 20.
1 Mbps
Typ
10 Mbps
Parameter
Symbol
Min
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
1.3
0.7
1.1
0.8
1.7
1.0
1.5
1.6
3.5
1.1
2.6
1.9
4.6
1.7
3.4
2.4
mA
mA
mA
mA
ADuM3211
Table 21. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
0.7 VDDX
0.8
VDDX − 0.1
VDDX − 0.5
V
V
V
V
V
V
μA
0.3 VDDX
VDDX
VDDX − 0.2
0.0
0.2
+0.01
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
−10
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.4
0.3
0.19
0.03
0.8
0.5
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
1.2
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 9 of 20
ADuM3210/ADuM3211
ELECTRICAL CHARACTERISTICS—MIXED 3 V/5 V, 125°C OPERATION
All typical specifications are at TA = 25°C, VDD1 = 3 V, VDD2 = 5.0 V. Minimum/maximum specifications apply over the entire
recommended operation range: 3.0 V ≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching
specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 22.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
ADuM3210
10
55
Mbps
ns
Within PWD limit
50% input to 50% output
tPHL, tPLH
PWD
15
|tPLH − tPHL
|
3
4
ns
ns
ADuM3211
Change vs. Temperature
Pulse Width
Propagation Delay Skew
Channel Matching
Codirectional
5
ps/°C
ns
ns
PW
tPSK
100
Within PWD limit
Between any two units
22
tPSKCD
tPSKOD
tR/tF
3
22
ns
ns
ns
Opposing-Direction
Output Rise/Fall Time
2.5
10% to 90%
Table 23.
1 Mbps
10 Mbps
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Unit
Test Conditions
SUPPLY CURRENT
ADuM3210
IDD1
IDD2
IDD1
IDD2
0.8
1.0
0.7
1.3
1.3
1.6
1.3
1.8
2.0
1.7
1.5
3.1
3.2
2.8
2.1
4.0
mA
mA
mA
mA
ADuM3211
Table 24. For All Models
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
VIH
VIL
VOH
0.7 VDDX
0.4
VDDX − 0.1
VDDX − 0.5
V
V
V
V
V
V
μA
0.3 VDDX
VDDX
VDDX − 0.2
0.0
0.2
+0.01
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDX
Logic Low Output Voltages
VOL
II
0.1
0.4
+10
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
−10
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.3
0.5
0.10
0.05
0.5
0.6
mA
mA
mA/Mbps
mA/Mbps
Common-Mode Transient Immunity1
|CM|
fr
25
35
kV/μs
Mbps
VIx = VDDX, VCM= 1000 V,
transient magnitude = 800 V
Refresh Rate
1.1
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. C | Page 10 of 20
ADuM3210/ADuM3211
PACKAGE CHARACTERISTICS
Table 25.
Parameter
Symbol
RI-O
CI-O
CI
θJCI
Min
Typ
1012
1.0
4.0
46
Max
Unit
Ω
pF
pF
°C/W
Test Conditions
Resistance (Input-to-Output)1
Capacitance (Input-to-Output)1
Input Capacitance
f = 1 MHz
IC Junction-to-Case Thermal Resistance, Side 1
Thermocouple located at center
of package underside
IC Junction-to-Case Thermal Resistance, Side 2
θJCO
41
°C/W
1 The device is considered a 2-terminal device; Pin 1 through Pin 4 are shorted together, and Pin 5 through Pin 8 are shorted together.
REGULATORY INFORMATION
The ADuM321x are approved by the organizations listed in Table 26.
Table 26.
UL
CSA
VDE
Recognized under UL 1577
Component Recognition
Program1
Approved under CSA Component Acceptance Notice #5A
Certified according to DIN V VDE V 0884-10
(VDE V 0884-10): 2006-122
Single/basic 2500 V rms
isolation voltage
Basic insulation per CSA 60950-1-03 and IEC 60950-1,
400 V rms (566 V peak) maximum working voltage
Reinforced insulation, 560 V peak
Functional insulation per CSA 60950-1-03 and IEC 60950-1,
800 V rms(1131 V peak) maximum working voltage
File E214100
File 205078
File 2471900-4880-0001
1 In accordance with UL 1577, each ADuM321x is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection limit = 5 μA).
2 In accordance with DIN V VDE V 0884-10, each ADuM321x is proof tested by applying an insulation test voltage ≥ 1050 Vpeak for 1 second (partial discharge detection
limit = 5 pC). An asterisk (*) marking on the component designates DIN V VDE V 0884-10 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 27.
Parameter
Symbol Value
Unit
Conditions
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
2500
4.90 min
V rms 1-minute duration
L(I01)
L(I02)
mm
mm
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Minimum External Tracking (Creepage)
4.01 min
Minimum Internal Gap (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
0.017 min mm
Insulation distance through insulation
DIN IEC 112/VDE 0303 Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
CTI
>175
IIIa
V
Rev. C | Page 11 of 20
ADuM3210/ADuM3211
DIN V VDE V 0884-10 (VDE V 0884-10) INSULATION CHARACTERISTICS
These isolators are suitable for reinforced isolation only within the safety limit data. Maintenance of the safety data is ensured by
protective circuits. The asterisk (*) marking on the package denotes DIN V VDE V 0884-10 approval for a 560 Vpeak working voltage.
Table 28.
Description
Conditions
Symbol Characteristic Unit
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method B1
I to IV
I to III
I to II
40/105/21
2
VIORM
VPR
560
1050
V peak
V peak
VIORM × 1.875 = VPR, 100% production test, tm = 1 sec,
partial discharge < 5 pC
Input-to-Output Test Voltage, Method A
After Environmental Tests Subgroup 1
After Input and/or Safety Test Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Safety-Limiting Values
VIORM × 1.6 = VPR, tm = 60 sec, partial discharge < 5 pC
VPR
896
672
V peak
V peak
VIORM × 1.2 = VPR, tm = 60 sec, partial discharge < 5 pC
Transient overvoltage, tTR = 10 sec
Maximum value allowed in the event of a failure
(see Figure 3)
VTR
4000
V peak
Case Temperature
Side 1 Current
Side 2 Current
TS
IS1
IS2
RS
150
150
160
>109
°C
mA
mA
Ω
Insulation Resistance at TS
VIO = 500 V
200
180
160
140
RECOMMENDED OPERATING CONDITIONS
Table 29.
Parameter
Symbol
Rating
SIDE #2
SIDE #1
Operating Temperature
ADuM3210AR/ADuM3210BR
ADuM3211AR/ADuM3211BR
ADuM3210TR/ADuM3211TR
Supply Voltages1
TA
120
100
80
60
40
20
0
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
VDD1, VDD2
ADuM3210AR/ADuM3210BR
ADuM3210TR/ADuM3211AR
ADuM3211BR/ADuM3211TR
2.7 V to 5.5 V
3 V to 5.5 V
Input Signal Rise and Fall Times
1 ms
0
50
100
150
200
CASE TEMPERATURE (°C)
1 All voltages are relative to their respective ground. See the DC Correctness
and Magnetic Field Immunity section for information on immunity to external
magnetic fields.
Figure 3. Thermal Derating Curve, Dependence of Safety-Limiting
Values on Case Temperature per DIN V VDE V 0884-10
Rev. C | Page 12 of 20
ADuM3210/ADuM3211
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Table 30.
Table 31. Maximum Continuous Working Voltage1
Parameter
Symbol
TST
TA
Rating
Parameter
Max Unit
Constraint
AC Voltage,
Bipolar Waveform
AC Voltage,
565
V peak 50-year minimum
lifetime
Storage Temperature
Ambient Operating
Temperature
−55°C to +150°C
−40°C to +105°C
Supply Voltages1
Input Voltage1, 2
Output Voltage1, 2
Average Output Current IO
per Pin3
VDD1, VDD2 −0.5 V to +7.0 V
Unipolar Waveform
Functional Insulation
1131 V peak Maximum approved
working voltage per
VIA, VIB
−0.5 V to VDDI + 0.5 V
−0.5 V to VDDO + 0.5 V
−35 mA to +35 mA
VOA, VOB
IEC 60950-1
Basic Insulation
560
V peak Maximum approved
working voltage per
IEC 60950-1 and
Common-Mode
Transients4
CMH, CML −100 kV/μs to +100 kV/μs
VDE V 0884-10
DC Voltage
Functional Insulation
1 All voltages are relative to their respective ground.
2 VDDI and VDDO refer to the supply voltages on the input and output sides of a
given channel, respectively.
1131 V peak Maximum approved
working voltage per
3 See Figure 3 for information on maximum allowable current for various
temperatures.
IEC 60950-1
4 Refers to common-mode transients across the insulation barrier. Common-
mode transients exceeding the Absolute Maximum Rating can cause
latch-up or permanent damage.
Basic Insulation
560
V peak Maximum approved
working voltage per
IEC 60950-1 and
VDE V 0884-10
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
1 Refers to continuous voltage magnitude imposed across the isolation
barrier. See the Insulation Lifetime for more details.
ESD CAUTION
Rev. C | Page 13 of 20
ADuM3210/ADuM3211
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
1
2
3
4
8
7
6
5
V
V
V
V
1
2
3
4
8
7
6
5
V
V
V
DD1
DD2
OA
OB
DD1
DD2
IA
ADuM3210
ADuM3211
V
V
OA
IA
IB
V
V
TOP VIEW
(Not to Scale)
TOP VIEW
(Not to Scale)
IB
OB
GND
GND
GND
GND
2
1
2
1
Figure 4. ADuM3210 Pin Configuration
Figure 5. ADuM3211 Pin Configuration
Table 32. ADuM3210 Pin Function Descriptions
Table 33. ADuM3211 Pin Function Descriptions
Pin No.
Mnemonic
Description
Pin No.
Mnemonic
Description
1
VDD1
Supply Voltage for Isolator Side 1,
2.7 V to 5.5 V.
1
VDD1
Supply Voltage for Isolator Side 1,
2.7 V to 5.5 V.
2
3
4
VIA
VIB
GND1
Logic Input A.
Logic Input B.
Ground 1. Ground reference for
Isolator Side 1.
2
3
4
VOA
VIB
GND1
Logic Output A.
Logic Input B.
Ground 1. Ground reference for
Isolator Side 1.
5
GND2
Ground 2. Ground reference for
Isolator Side 2.
5
GND2
Ground 2. Ground reference for
Isolator Side 2.
6
7
8
VOB
VOA
VDD2
Logic Output B.
Logic Output A.
Supply Voltage for Isolator Side 2,
2.7 V to 5.5 V.
6
7
8
VOB
VIA
VDD2
Logic Output B.
Logic Input A.
Supply Voltage for Isolator Side 2,
2.7 V to 5.5 V.
TRUTH TABLES
Table 34. ADuM3210 Truth Table (Positive Logic)
VIA Input
VIB Input
VDD1 State
Powered
Powered
Powered
Powered
Unpowered
VDD2 State
Powered
Powered
Powered
Powered
Powered
VOA Output
VOB Output
Notes
H
L
H
L
H
L
L
H
X
H
L
H
L
H
L
L
H
L
X
L
Outputs return to the input state within
1 μs of VDDI power restoration
X
X
Powered
Unpowered
Indeterminate
Indeterminate
Outputs return to the input state within
1 μs of VDDO power restoration
Table 35. ADuM3211 Truth Table (Positive Logic)
VIA Input
VIB Input
VDD1 State
Powered
Powered
Powered
Powered
Unpowered
VDD2 State
Powered
Powered
Powered
Powered
Powered
VOA Output
VOB Output
Notes
H
L
H
L
H
L
L
H
X
H
L
H
L
H
L
L
H
L
X
Indeterminate
Outputs return to the input state within
1 μs of VDDI power restoration
X
X
Powered
Unpowered
L
Indeterminate
Outputs return to the input state within
1 μs of VDDO power restoration
Rev. C | Page 14 of 20
ADuM3210/ADuM3211
TYPICAL PERFORMANCE CHARACTERISTICS
10
20
15
10
5
8
6
4
5V
5V
2
3V
3V
0
0
0
10
20
30
30
30
0
10
20
30
30
30
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 6. Typical Input Supply Current per Channel vs.
Data Rate for 5 V and 3 V Operation
Figure 9. Typical ADuM3210 VDD1 Supply Current vs.
Data Rate for 5 V and 3 V Operation
4
3
2
1
0
4
3
2
1
0
5V
5V
3V
3V
0
10
20
0
10
20
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 10. ADuM3210 Typical VDD2 Supply Current vs.
Data Rate for 5 V and 3 V Operation
Figure 7. Typical Output Supply Current per Channel vs.
Data Rate for 5 V and 3 V Operation (No Output Load)
10
8
4
3
2
1
0
6
5V
4
5V
2
3V
3V
0
0
10
20
0
10
20
DATA RATE (Mbps)
DATA RATE (Mbps)
Figure 8. Typical Output Supply Current per Channel vs.
Data Rate for 5 V and 3 V Operation (15 pF Output Load)
Figure 11. ADuM3211 Typical VDD1 or VDD2 Supply Current vs.
Data Rate for 5 V and 3 V Operation
Rev. C | Page 15 of 20
ADuM3210/ADuM3211
APPLICATIONS INFORMATION
PC BOARD LAYOUT
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions of more than 2 μs at the input, a periodic set of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives
no internal pulses for more than approximately 5 μs, the input
side is assumed to be unpowered or nonfunctional, in which
case, the isolator output is forced to a default state (see Table 34
and Table 35) by the watchdog timer circuit.
The ADuM321x digital isolators require no external interface
circuitry for the logic interfaces. Power supply bypassing is
strongly recommended at the input and output supply pins.
The capacitor value should be between 0.01 μF and 0.1 μF.
The total lead length between both ends of the capacitor
and the input power supply pin should not exceed 20 mm.
SYSTEM-LEVEL ESD CONSIDERATIONS AND
ENHANCEMENTS
System-level ESD reliability (for example, per IEC 61000-4-x)
is highly dependent on system design, which varies widely by
application. The ADuM321x incorporate many enhancements
to make ESD reliability less dependent on system design. The
enhancements include:
The ADuM321x is immune to external magnetic fields. The
limitation on the ADuM321x magnetic field immunity is set
by the condition in which induced voltage in the transformer
receiving coil is sufficiently large to either falsely set or reset
the decoder. The following analysis defines the conditions
under which this can occur. The 3 V operating condition of
the ADuM321x is examined because it represents the most
susceptible mode of operation.
•
•
ESD protection cells were added to all input/output interfaces.
Key metal trace resistances reduced using wider geometry
and paralleling of lines with vias.
•
The SCR effect inherent in CMOS devices is minimized
by use of a guarding and isolation technique between the
PMOS and NMOS devices.
The pulses at the transformer output have an amplitude greater
than 1.0 V. The decoder has a sensing threshold at about 0.5 V,
therefore establishing a 0.5 V margin in which induced voltages
can be tolerated. The voltage induced across the receiving coil is
given by
•
•
Areas of high electric field concentration are eliminated
using 45° corners on metal traces.
Supply pin overvoltage is prevented with larger ESD
clamps between each supply pin and its respective ground.
2
V = (−dβ/dt) ∑π rn , n = 1, 2, ... , N
While the ADuM321x improves system-level ESD reliability,
it is no substitute for a robust system-level design. For detailed
recommendations on board layout and system-level design,
see AN-793 Application Note, ESD/Latch-Up Considerations
with iCoupler Isolation Products.
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
PROPAGATION DELAY-RELATED PARAMETERS
Given the geometry of the receiving coil in the ADuM321x
and an imposed requirement that the induced voltage is at
most 50% of the 0.5 V margin at the decoder, a maximum
allowable magnetic field is calculated as shown in Figure 13.
100
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component. The propagation
delay to a logic low output can differ from the propagation
delay to a logic high output.
INPUT (V
)
50%
Ix
10
1
tPLH
tPHL
OUTPUT (V
)
50%
Ox
Figure 12. Propagation Delay Parameters
0.1
Pulse width distortion is the maximum difference between
these two propagation delay values and is an indication of
how accurately the input signal timing is preserved.
0.01
0.001
Channel-to-channel matching refers to the maximum amount
that the propagation delay differs between channels within a
single ADuM321x component.
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Propagation delay skew refers to the maximum amount that
the propagation delay differs between multiple ADuM321x
components operating under the same conditions.
Figure 13. Maximum Allowable External Magnetic Flux Density
Rev. C | Page 16 of 20
ADuM3210/ADuM3211
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event were to occur during a transmitted
pulse (and had the worst-case polarity), it would reduce the
received pulse from >1.0 V to 0.75 V, which is still well above
the 0.5 V sensing threshold of the decoder.
POWER CONSUMPTION
The supply current at a given channel of the ADuM321x
isolator is a function of the supply voltage, channel data
rate, and channel output load.
For each input channel, the supply current is given by
I
I
DDI = IDDI (Q)
f ≤ 0.5fr
f > 0.5fr
DDI = IDDI (D) × (2f – fr) + IDDI (Q)
The preceding magnetic flux density values correspond to
specific current magnitudes at given distances away from the
ADuM321x transformers. Figure 14 expresses these allowable
current magnitudes as a function of frequency for selected
distances. As shown, the ADuM321x is immune and can be
affected only by extremely large currents operated at a high
frequency and very close to the component. For the 1 MHz
example, one would have to place a 0.5 kA current 5 mm away
from the ADuM321x to affect the operation of the component.
1000
For each output channel, the supply current is given by
I
I
DDO = IDDO (Q)
f ≤ 0.5fr
DDO = (IDDO (D) + (0.5 × 10−3) × CLVDDO) × (2f – fr) + IDDO (Q)
f > 0.5fr
where:
DDI (D), IDDO (D) are the input and output dynamic supply currents
per channel (mA/Mbps).
DDI (Q), IDDO (Q) are the specified input and output quiescent
I
I
supply currents (mA).
DISTANCE = 1m
CL is the output load capacitance (pF).
100
V
DDO is the output supply voltage (V).
f is the input logic signal frequency (MHz, half of the input data
rate, NRZ signaling).
10
fr is the input stage refresh rate (Mbps).
DISTANCE = 100mm
To calculate the total IDD1 and IDD2 supply current, the supply
currents for each input and output channel corresponding to
IDD1 and IDD2 are calculated and totaled.
1
DISTANCE = 5mm
0.1
Figure 6 provides per-channel input supply currents as a function
of data rate. Figure 7 and Figure 8 provide per-channel output
supply currents as a function of data rate for an unloaded
output condition and for a 15 pF output condition, respectively.
Figure 9 through Figure 11 provide total IDD1 and IDD2 supply
current as a function of data rate for the ADuM3210 and
ADuM3211 channel configurations.
0.01
1k
10k
100k
1M
10M
100M
MAGNETIC FIELD FREQUENCY (Hz)
Figure 14. Maximum Allowable Current for Various
Current-to-ADuM3210/ADuM3211 Spacings
Note that at combinations of strong magnetic fields and high
frequencies, any loops formed by PCB traces may induce
sufficiently large error voltages to trigger the threshold of
succeeding circuitry. Care should be taken in the layout of
such traces to avoid this possibility.
Rev. C | Page 17 of 20
ADuM3210/ADuM3211
In the case of unipolar ac or dc voltage, the stress on the insulation
is significantly lower. This allows operation at higher working
voltages while still achieving a 50-year service life. The working
voltages listed in Table 31 can be applied while maintaining the
50-year minimum lifetime provided that the voltage conforms
to either the unipolar ac or dc voltage cases. Any cross-insulation
voltage waveform that does not conform to Figure 16 or Figure 17
should be treated as a bipolar ac waveform, and its peak voltage
should be limited to the 50-year lifetime voltage value listed
in Table 31.
INSULATION LIFETIME
All insulation structures eventually break down when subjected to
voltage stress over a sufficiently long period. The rate of insulation
degradation is dependent on the characteristics of the voltage
waveform applied across the insulation. In addition to the
testing performed by the regulatory agencies, Analog Devices
carries out an extensive set of evaluations to determine the
lifetime of the insulation structure within the ADuM321x.
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage.
Acceleration factors for several operating conditions are
determined. These factors allow calculation of the time to
failure at the actual working voltage.
Note that the voltage presented in Figure 16 is shown as sinusoidal
for illustration purposes only. It is meant to represent any voltage
waveform varying between 0 V and some limiting value. The
limiting value can be positive or negative, but the voltage cannot
cross 0 V.
The values shown in Table 31 summarize the peak voltage for
50 years of service life for a bipolar ac operating condition and
the maximum CSA/VDE approved working voltages. In many
cases, the approved working voltage is higher than the 50-year
service life voltage. Operation at these high working voltages
can lead to shortened insulation life in some cases.
RATED PEAK VOLTAGE
0V
Figure 15. Bipolar AC Waveform
The insulation lifetime of the ADuM321x depends on the voltage
waveform type imposed across the isolation barrier. The iCoupler
insulation structure degrades at different rates depending on
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 15,
Figure 16, and Figure 17 illustrate these different isolation
voltage waveforms.
RATED PEAK VOLTAGE
0V
Figure 16. Unipolar AC Waveform
A bipolar ac voltage environment is the most stringent. The
goal of a 50-year operating lifetime under the ac bipolar
condition determines the Analog Devices recommended
maximum working voltage.
RATED PEAK VOLTAGE
0V
Figure 17. DC Waveform
Rev. C | Page 18 of 20
ADuM3210/ADuM3211
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 18. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters (inches)
ORDERING GUIDE
Number
of Inputs,
VDD1 Side
Number
of Inputs,
VDD2 Side
Maximum
Data Rate
(Mbps)
Maximum
Propagation
Delay, 5 V (ns)
Maximum
Pulse Width
Distortion (ns)
Package
Model
Temperature Range
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +125°C
−40°C to +125°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +105°C
−40°C to +125°C
−40°C to +125°C
Option1
R-8
ADuM3210ARZ2
ADuM3210ARZ-RL72
ADuM3210BRZ2
ADuM3210BRZ-RL72
ADuM3210TRZ2
ADuM3210TRZ-RL72
ADuM3211ARZ2
ADuM3211ARZ-RL72
ADuM3211BRZ2
ADuM3211BRZ-RL72
ADuM3211TRZ2
ADuM3211TRZ-RL72
2
2
2
2
2
2
1
1
1
1
1
1
0
0
0
0
0
0
1
1
1
1
1
1
1
1
100
100
50
50
50
5
5
3
3
3
3
6
6
4
4
4
4
R-8
R-8
R-8
R-8
10
10
10
10
1
50
R-8
100
100
50
50
50
R-8
R-8
R-8
R-8
R-8
R-8
1
10
10
10
10
50
1 R-8 = 8-lead, narrow body SOIC_N.
2 Z = RoHS Compliant Part.
Rev. C | Page 19 of 20
ADuM3210/ADuM3211
NOTES
©2007–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06866-0-9/09(C)
Rev. C | Page 20 of 20
相关型号：
©2020 ICPDF网 联系我们和版权申明