ADR225-KGD-CHIP [ADI]
High Temperature, Low Drift, Micropower, 2.5V Reference;
| 型号： | ADR225-KGD-CHIP |
| 厂家： | 
ADI |
| 描述： | High Temperature, Low Drift, Micropower, 2.5V Reference |
| 文件： | 总6页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Temperature, 2.5 V
Precision Voltage Reference
ADR225-KGD-CHIPS
Known Good Die
FEATURES
METAL MASK DIE IMAGE
NC
Extreme high temperature operation
−40°C to +210°C
V
NC
1
OUT
8
7b
FORCE
Temperature coefficient: 40 ppm/°C typical
High output current: 10 mA
Low supply current: 60 µA maximum
Initial accuracy: 2.4% ( 60 mV maximum)
Low dropout voltage
V
2a
S
APPLICATIONS
Downhole drilling and instrumentation
Avionics
V
OUT
7a
V
SENSE
S
2b
Heavy industrial
High temperature environments
NC
6
GND
3
4
5
NC
NC
Figure 1.
GENERAL DESCRIPTION
The ADR225-KGD-CHIPS is a precision 2.5 V band gap voltage
reference specified for a high temperature operation of 210°C. It
uses a micropower core topology and laser trimming of highly
stable, thin film resistors to achieve a temperature coefficient of
80 ppm/°C (maximum) up to 210°C and an initial accuracy of
2.4% ( 60 mV maximum). A maximum operating current of
60 µA and a low dropout voltage allow the ADR225-KGD-CHIPS
to function very well in battery-powered equipment.
The ADR225-KGD-CHIPS is a member of a growing series of
high temperature qualified products offered by Analog Devices,
Inc. For a complete selection table of the available high temperature
products, see the high temperature product list and qualification
data available at www.analog.com/hightemp.
Additional application and technical information can be found
in the ADR225 data sheet.
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2016 Analog Devices, Inc. All rights reserved.
www.analog.com
ADR225-KGD-CHIPS
Known Good Die
TABLE OF CONTENTS
Features .............................................................................................. 1
Absolute Maximum Ratings ............................................................4
ESD Caution...................................................................................4
Pin Configuration and Function Descriptions..............................5
Outline Dimensions ..........................................................................6
Ordering Guide .............................................................................6
Applications....................................................................................... 1
Metal Mask Die Image..................................................................... 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
REVISION HISTORY
2/16—Revision 0: Initial Version
Rev. 0 | Page 2 of 6
Known Good Die
SPECIFICATIONS
ADR225-KGD-CHIPS
VIN = 3.3 V, VOUT = 2.5 V, TMIN < TA < TMAX, unless otherwise noted. Due to variations in assembly methods and normal yield loss, yield
after packaging is not guaranteed for standard product dice.
Table 1.
Parameter
Symbol
ISY
Test Conditions/Comments
No load
Min
Typ
40
5
Max
60
Unit
μA
SUPPLY CURRENT
INITIAL ACCURACY1
VOUT
IOUT = 0 mA
60
mV
2.4
80
%
TEMPERATURE COEFFICIENT2
REGULATION
TCVOUT
IOUT = 0 mA
40
ppm/°C
Line Regulation
Load Regulation3
VOLTAGE
ΔVOUT/∆VIN
ΔVOUT/∆ILOAD
3.0 V ≤ VS ≤ 15 V, IOUT = 0 mA
VS = 5.0 V, 0 mA ≤ IOUT ≤ 10 mA
0.25
0.25
1.5
1.5
mV/V
mV/mA
Dropout Voltage
Noise Voltage
VS – VOUT
eN
ILOAD = 10 mA
0.1 Hz to 10 Hz
1.00
V
25
μV p-p
1 For proper operation, a 1 µF capacitor is required between the outputs (VOUT SENSE and VOUT FORCE) and the GND pad of the device.
2 TCVOUT is defined as the ratio of output change with temperature variation to the specified temperature range, expressed in ppm/°C.
TCVOUT = (VMAX − VMIN)/VOUT(TMAX − TMIN
)
3 The load regulation specification includes the effect of self heating.
Rev. 0 | Page 3 of 6
ADR225-KGD-CHIPS
Known Good Die
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Rating
ESD CAUTION
Supply Voltage
Output to GND
Operating Temperature Range
−0.3 V to +18 V
−0.3 V to VS + 0.3 V
−40°C to +210°C
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. 0 | Page 4 of 6
Known Good Die
ADR225-KGD-CHIPS
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NC
V
OUT
NC
1
8
7b
FORCE
V
2a
S
V
OUT
7a
SENSE
V
2b
S
6
NC
GND
3
4
5
NC
NC
Figure 2. Pad Configuration
Table 3. Pad Function Descriptions1
Pad No. X-Axis (μm) Y-Axis (μm) Mnemonic Description
1
−368
−362
−360
−362
−149
+345
+368
+330
+587
+423
+18
−401
−525
−577
−256
+36
NC
VS
VS
GND
NC
NC
NC
No Connect. Do not connect to this pad.
Input. The input must be connected to both VS pads.
Input. The input must be connected to both VS pads.
Ground.
No Connect. Do not connect to this pad.
No Connect. Do not connect to this pad.
No Connect. Do not connect to this pad.
2a
2b
3
4
5
6
7a
VOUT SENSE Sense Output. The output must be connected to both VOUT SENSE and VOUT FORCE
pads.
7b
8
+339
−122
+576
+576
VOUT FORCE Force Output. The output must be connected to both VOUT SENSE and VOUT FORCE
pads.
NC
No Connect. Do not connect to this pad.
1 The die center is the reference location at 0.0 µm × 0.0 μm. The pad coordinates are to the center of each pad.
Rev. 0 | Page 5 of 6
ADR225-KGD-CHIPS
OUTLINE DIMENSIONS
Known Good Die
0.995
0.483
1
8
7b
2a
1.425
7a
2b
6
3
4
5
SIDE VIEW
TOP VIEW
(CIRCUIT SIDE)
0.092 × 0.086
0.092 × 0.172
Figure 3. 8-Pad Bare Die [CHIP]
(C-8-7)
Dimensions shown in millimeters
Table 4. Die Specifications
Parameter
Value
Unit
Chip Size
Scribe Line Width
Die Size
920 × 1350
75 × 75
995 × 1425
483
μm
μm
μm
μm
Thickness
Bond Pad
Bond Pad Composition
Passivation
Polyimide
Die Marker
92 × 86
AlCu (0.5)
Oxynitride
None
225
GND
μm
%
Not applicable
Not applicable
Not applicable
Not applicable
Backside
Table 5. Assembly Recommendations
Assembly Component
Die Attach
Recommendation
Epoxy adhesive
Bonding Method
Bonding Sequence
Gold ball or aluminum wedge
GND pad first
ORDERING GUIDE
Model
Temperature Range
−40°C to +210°C
Package Description
8-Pad Bare Die [CHIP]
Package Option
ADR225-KGD-CHIP
C-8-7
©2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14153-0-2/16(0)
Rev. 0 | Page 6 of 6
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