ADR03NBC_技术文档

Ultracompact, Precision

10.0 V/5.0 V/2.5 V/3.0 V Voltage References

ADR01/ADR02/ADR03/ADR06

FEATURES

PIN CONFIGURATIONS

Ultracompact SC70 and TSOT packages

Low temperature coefficient

8-lead SOIC: 3 ppm/°C

5-lead SC70, 5-lead TSOT: 9 ppm/°C

Initial accuracy 0.1ꢀ

No external capacitor required

Low noise 10 μV p-p (0.1 Hz to 10.0 Hz)

Wide operating range

ADR01/

TEMP

GND

1

2

3

5

TRIM

ADR02/

ADR03/

ADR06

V

TOP VIEW

(Not to Scale)

4

IN

OUT

Figure 1. 5-Lead, SC70/TSOT Surface-Mount Packages

TP

1

2

3

4

8

7

6

5

TP

NIC

V

ADR01/

ADR02/

ADR03/

ADR06

V

IN

TEMP

GND

ADR01: 12.0 V to 40.0 V

ADR02: 7.0 V to 40.0 V

ADR03: 4.5 V to 40.0 V

OUT

TOP VIEW

(Not to Scale)

TRIM

ADR06: 5.0 V to 40.0 V

High output current 10 mA

NIC = NO INTERNAL CONNECT

TP = TEST PIN (DO NOT CONNECT)

Wide temperature range: –40°C to +125°C

ADR01/ADR02/ADR03 pin compatible to industry-

standard REF01/REF02/REF03¹

Figure 2. 8-Lead, SOIC Surface-Mount Package

APPLICATIONS

Precision data acquisition systems

High resolution converters

Industrial process control systems

Precision instruments

PCMCIA cards

GENERAL DESCRIPTION

The ADR01, ADR02, ADR03, and ADR06 are compact, low

drift voltage references that provide an extremely stable output

voltage from a wide supply voltage range. They are available in

5-lead SC70 and TSOT packages, and 8-lead SOIC packages

with A, B, and C grade selections. All parts are specified over

the extended industrial (–40°C to +125°C) temperature range.

The ADR01, ADR02, ADR03, and ADR06 are precision 10.0 V,

5.0 V, 2.5 V, and 3.0 V band gap voltage references featuring high

accuracy, high stability, and low power. The parts are housed in

tiny, 5-lead SC70 and TSOT packages, as well as in 8-lead SOIC

versions. The SOIC versions of the ADR01, ADR02, and ADR03

are drop-in replacements¹to the industry-standard REF01,

REF02, and REF03. The small footprint and wide operating

range make the ADR0x references ideally suited for general-

purpose and space-constrained applications.

Table 1. Selection Guide

Part Number

Output Voltage

10.0 V

ADR01

ADR02

ADR03

ADR06

5.0 V

2.5 V

3.0 V

With an external buffer and a simple resistor network, the

TEMP terminal can be used for temperature sensing and

approximation. A TRIM terminal is provided on the devices for

fine adjustment of the output voltage.

¹ADRO1, ADR02, and ADR03 are component-level compatible with REF01, REF02, and REF03, respectively. No guarantees for syste-level compatibility are implied. SOIC

versions of ADR01/ADR02/ADR03 are pin-to-pin compatible with 8-lead SOIC versions of REF01/REF02/REF03, respectively, with the additional temperature

monitoring function.

Rev. K

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

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rights of third parties that may result from its use. Specifications subject to change without notice. No

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license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

ADR01/ADR02/ADR03/ADR06

TABLE OF CONTENTS

Features .............................................................................................. 1

ESD Caution...................................................................................8

Terminology.......................................................................................9

Typical Performance Characteristics ........................................... 10

Applications..................................................................................... 15

Applying the ADR01/ADR02/ADR03/ADR06...................... 15

Negative Reference..................................................................... 16

Low Cost Current Source.......................................................... 16

Precision Current Source with Adjustable Output................ 16

Programmable 4 mA to 20 mA Current Transmitter............ 17

Precision Boosted Output Regulator....................................... 17

Outline Dimensions....................................................................... 18

Ordering Guides......................................................................... 19

Applications....................................................................................... 1

Pin Configurations ........................................................................... 1

General Description......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

ADR01 Electrical Characteristics............................................... 3

ADR02 Electrical Characteristics............................................... 4

ADR03 Electrical Characteristics............................................... 5

ADR06 Electrical Characteristics............................................... 6

Die Electrical Characteristics...................................................... 7

Absolute Maximum Ratings............................................................ 8

Thermal Resistance ...................................................................... 8

REVISION HISTORY

2/08—Rev. J to Rev. K

8/03—Rev. C to Rev D

Changes to Terminology Section.................................................... 9

Changes to Ordering Guide .......................................................... 19

Added ADR06.....................................................................Universal

Change to Figure 27 ....................................................................... 13

3/07—Rev. I to Rev. J

6/03—Rev. B to Rev C

Renamed Parameters and Definitions Section............................. 9

Changes to Temperature Monitoring Section ............................ 15

Changes to Ordering Guide .......................................................... 19

Changes to Features Section ............................................................1

Changes to General Description Section .......................................1

Changes to Figure 2...........................................................................1

Changes to Specifications Section...................................................2

Addition of Dice Electrical Characteristics and Layout...............6

Changes to Absolute Maximum Ratings Section..........................7

Updated SOIC (R-8) Outline Dimensions.................................. 19

Changes to Ordering Guide.......................................................... 20

7/05—Rev. H to Rev. I

Changes to Table 5............................................................................ 7

Updated Outline Dimensions....................................................... 19

Changes to Ordering Guide .......................................................... 19

12/04—Rev. G to Rev. H

Changes to ADR06 Ordering Guide............................................ 20

2/03—Rev. A to Rev. B

Added ADR03.....................................................................Universal

Added TSOT-5 (UJ) Package............................................Universal

Updated Outline Dimensions....................................................... 18

9/04—Rev. F to Rev. G

Changes to Table 2............................................................................ 4

Changes to Table 3............................................................................ 5

Changes to Table 4............................................................................ 6

Changes to Table 5............................................................................ 7

Changes to Ordering Guide .......................................................... 19

12/02—Rev. 0 to Rev. A

Changes to Features Section ............................................................1

Changes to General Description .....................................................1

Table I deleted ....................................................................................1

Changes to ADR01 Specifications...................................................2

Changes to ADR02 Specifications...................................................3

Changes to Absolute Maximum Ratings Section..........................4

Changes to Ordering Guide.............................................................4

Updated Outline Dimensions....................................................... 12

7/04—Rev. E to Rev. F

Changes to ADR02 Electrical Characteristics, Table 2................ 4

Changes to Ordering Guide .......................................................... 19

2/04—Rev. D to Rev. E

Added C grade ....................................................................Universal

Changes to Outline Dimensions................................................... 19

Updated Ordering Guide............................................................... 20

Rev. K | Page 2 of 24

ADR01/ADR02/ADR03/ADR06

SPECIFICATIONS

ADR01 ELECTRICAL CHARACTERISTICS

V_IN= 12.0 V to 40.0 V, T_A= 25°C, unless otherwise noted.

Table 2.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

10.010

10

Unit

V

OUTPUT VOLTAGE

INITIAL ACCURACY

A and C grades

9.990 10.000

V_OERR

mV

0.1

10.005

5

%

OUTPUT VOLTAGE

INITIAL ACCURACY

V_O

B grade

9.995 10.000

V

V_OERR

mV

0.05

10

%

TEMPERATURE COEFFICIENT

TCV_O

3

1

ppm/°C

V

A grade, 8-lead SOIC, −40°C < T_A< +125°C

A grade, 5-lead TSOT, –40°C < T_A< +125°C

A grade, 5-lead SC70, –40°C < T_A< +125°C

B grade, 8-lead SOIC, –40°C < T_A< +125°C

B grade, 5-lead TSOT, –40°C < T_A< +125°C

B grade, 5-lead SC70, –40°C < T_A< +125°C

C grade, 8-lead SOIC, –40°C < T_A< +125°C

25

3

9

40

10

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

2

V_IN− V_O

∆V_O/∆V_IN

∆V_O/∆I_LOAD

V_IN= 12.0 V to 40.0 V, –40°C < T_A< +125°C

I_LOAD= 0 mA to 10 mA, –40°C < T_A< +125°C,

7

30

70

ppm/V

LOAD REGULATION

40

ppm/mA

V

_IN= 15.0 V

QUIESCENT CURRENT

I_IN

No load, –40°C < T_A< +125°C

0.1 Hz to 10.0 Hz

1 kHz

0.65

20

1

mA

VOLTAGE NOISE

e_{N p-p}

e_N

μV p-p

nV/√Hz

μs

VOLTAGE NOISE DENSITY

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

VOLTAGE OUTPUT AT TEMP PIN

TEMPERATURE SENSITIVITY

510

4

t_R

∆V_O

∆V_{O_HYS}

RRR

I_SC

1000 hours

f_IN= 10 kHz

50

ppm

dB

70

−75

30

mA

V_TEMP

TCV_TEMP

550

1.96

mV

mV/°C

¹The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. K | Page 3 of 24

ADR01/ADR02/ADR03/ADR06

ADR02 ELECTRICAL CHARACTERISTICS

V_IN= 7.0 V to 40.0 V, T_A= 25°C, unless otherwise noted.

Table 3.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

Unit

OUTPUT VOLTAGE

INITIAL ACCURACY

A and C grades

4.995 5.000 5.005

V

V_OERR

5

mV

0.1

%

OUTPUT VOLTAGE

INITIAL ACCURACY

V_O

B grade

4.997 5.000 5.003

V

V_OERR

3

mV

0.06

%

TEMPERATURE COEFFICIENT

T_CVO

A grade, 8-lead SOIC, –40°C < T_A< +125°C

A grade, 5-lead TSOT, –40°C < T_A< +125°C

A grade, 5-lead SC70, –40°C < T_A< +125°C

A grade, 5-lead SC70, –55°C < T_A< +125°C

B grade, 8-lead SOIC, –40°C < T_A< +125°C

B grade, 5-lead TSOT, –40°C < T_A< +125°C

B grade, 5-lead SC70, –40°C < T_A< +125°C

C grade, 8-lead SOIC, –40°C < T_A< +125°C

3

10

25

30

3

9

40

ppm/°C

V

1

10

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

V_IN− V_O

2

∆V_O/∆V_IN

V_IN= 7.0 V to 40.0 V, –40°C < T_A< +125°C

V_IN= 7.0 V to 40.0 V, –55°C < T_A< +125°C

I_LOAD= 0 mA to 10 mA, –40°C < T_A< +125°C,

7

30

40

70

ppm/V

ppm/mA

LOAD REGULATION

∆V_O/∆I_LOAD

40

V

_IN= 10.0 V

I_LOAD= 0 mA to 10 mA, –55°C < T_A< +125°C,

V_IN= 10.0 V

45

80

1

ppm/mA

QUIESCENT CURRENT

VOLTAGE NOISE

I_IN

No load, –40°C < T_A< +125°C

0.1 Hz to 10.0 Hz

1 kHz

0.65

10

mA

e_{N p-p}

e_N

μV p-p

nV/√Hz

μs

VOLTAGE NOISE DENSITY

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

230

4

t_R

∆V_O

∆V_{O_HYS}

1000 hours

50

ppm

dB

70

80

–55°C < T_A< +125°C

f_IN= 10 kHz

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

RRR

–75

30

I_SC

mA

VOLTAGE OUTPUT AT TEMP PIN

TEMPERATURE SENSITIVITY

V_TEMP

TCV_TEMP

550

1.96

mV

mV/°C

¹The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. K | Page 4 of 24

ADR01/ADR02/ADR03/ADR06

ADR03 ELECTRICAL CHARACTERISTICS

V_IN= 4.5 V to 40.0 V, T_A= 25°C, unless otherwise noted.

Table 4.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

2.505

5

Unit

V

OUTPUT VOLTAGE

INITIAL ACCURACY

A and C grades

2.495

2.500

V_OERR

mV

0.2

%

OUTPUT VOLTAGE

INITIAL ACCURACY

V_O

B grades

2.4975 2.5000 2.5025

V

V_OERR

2.5

0.1

mV

%

TEMPERATURE COEFFICIENT

TCV_O

A grade, 8-lead SOIC, –40°C < T_A< +125°C

A grade, 5-lead TSOT, –40°C < T_A< +125°C

A grade, 5-lead SC70, –40°C < T_A< +125°C

A grade, 5-lead SC70, –55°C < T_A< +125°C

B grade, 8-lead SOIC, –40°C < T_A< +125°C

B grade, 5-lead TSOT, –40°C < T_A< +125°C

B grade, 5-lead SC70, –40°C < T_A< +125°C

C grade, 8-lead SOIC, –40°C < T_A< +125°C

3

10

25

30

3

9

40

ppm/°C

1

10

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

2

V

V_IN− V_O

∆V_O/∆V_IN

V_IN= 4.5 V to 40.0 V, –40°C < T_A< +125°C

V_IN= 4.5 V to 40.0 V, –55°C < T_A< +125°C

7

30

40

70

ppm/V

LOAD REGULATION

∆ V_O/∆I_LOAD

I_LOAD= 0 mA to 10 mA, –40°C < T_A< +125°C,

V_IN= 7.0 V

25

ppm/mA

I_LOAD= 0 mA to 10 mA, –55°C < T_A< +125°C,

45

80

1

ppm/mA

V

_IN= 7.0 V

QUIESCENT CURRENT

VOLTAGE NOISE

I_IN

No load, –40°C < T_A< +125°C

0.1 Hz to 10.0 Hz

1 kHz

0.65

6

mA

e_{N p-p}

e_N

μV p-p

nV/√Hz

μs

VOLTAGE NOISE DENSITY

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

230

4

t_R

∆V_O

∆V_{O_HYS}

1000 hours

50

ppm

dB

70

–55°C < T_A< +125°C

f_IN= 10 kHz

80

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

RRR

–75

30

I_SC

mA

VOLTAGE OUTPUT AT TEMP PIN

TEMPERATURE SENSITIVITY

V_TEMP

TCV_TEMP

550

1.96

mV

mV/°C

¹The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. K | Page 5 of 24

ADR01/ADR02/ADR03/ADR06

ADR06 ELECTRICAL CHARACTERISTICS

V_IN= 5.0 V to 40.0 V, T_A= 25°C, unless otherwise noted.

Table 5.

Parameter

Symbol

V_O

Conditions

Min

Typ

Max

3.006

6

Unit

OUTPUT VOLTAGE

INITIAL ACCURACY

A and C grades

2.994

3.000

V

V_OERR

mV

0.2

3.003

3

%

OUTPUT VOLTAGE

INITIAL ACCURACY

V_O

B grade

2.997

3.000

V

V_OERR

mV

0.1

10

25

3

9

40

%

TEMPERATURE COEFFICIENT

TCV_O

A grade, 8-lead SOIC, –40°C < T_A< +125°C

A grade, 5-lead TSOT, –40°C < T_A< +125°C

A grade, 5-lead SC70, –40°C < T_A< +125°C

B grade, 8-lead SOIC, –40°C < T_A< +125°C

B grade, 5-lead TSOT, –40°C < T_A< +125°C

B grade, 5-lead SC70, –40°C < T_A< +125°C

C grade, 8-lead SOIC, –40°C < T_A< +125°C

3

ppm/°C

V

1

10

SUPPLY VOLTAGE HEADROOM

LINE REGULATION

V_IN– V_O

2

∆V_O/∆V_IN

V_IN= 5.0 V to 40.0 V, –40°C < T_A< +125°C

7

30

70

ppm/V

ppm/mA

LOAD REGULATION

∆V_O/∆I_LOADI_LOAD= 0 mA to 10 mA, –40°C < T_A< +125°C,

_IN= 7.0 V

40

V

QUIESCENT CURRENT

I_IN

No load, –40°C < T_A< +125°C

0.1 Hz to 10.0 Hz

1 kHz

0.65

10

1

mA

VOLTAGE NOISE

e_{N p-p}

e_N

μV p-p

nV/√Hz

μs

VOLTAGE NOISE DENSITY

TURN-ON SETTLING TIME

LONG-TERM STABILITY¹

OUTPUT VOLTAGE HYSTERESIS

RIPPLE REJECTION RATIO

SHORT CIRCUIT TO GND

VOLTAGE OUTPUT AT TEMP PIN

TEMPERATURE SENSITIVITY

510

4

t_R

∆V_O

∆V_{O_HYS}

RRR

I_SC

1000 hours

f_IN= 10 kHz

50

ppm

dB

70

–75

30

mA

V_TEMP

TCV_TEMP

550

1.96

mV

mV/°C

¹The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.

Rev. K | Page 6 of 24

ADR01/ADR02/ADR03/ADR06

DIE ELECTRICAL CHARACTERISTICS

V_IN= up to 40.0 V, T_A= 25°C, unless otherwise noted.

Table 6.

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

OUTPUT VOLTAGE

ADR01NBC

ADR03BNC

V_O

25°C

9.995

2.4975

10.004

2.501

10

10.005

2.5025

V

TEMPERATURE COEFFICIENT

LINE REGULATION

ADR01NBC

TCV_O

–40°C < T_A< +125°C

ppm/°C

∆V_O/∆V_IN

∆V_O/∆I_LOAD

I_IN

V_IN= 15.0 V to 40.0 V

V_IN= 4.5 V to 40.0 V

I_LOAD= 0 to 10 mA

No load

7

ppm/V

ppm/mA

mA

ADR03BNC

LOAD REGULATION

QUIESCENT CURRENT

VOLTAGE NOISE

40

0.65

25

e_{N p-p}

0.1 Hz to 10.0 Hz

μV p-p

TEMP

V

IN

GND

TRIM

V

OUT

(SENSE)

OUT

(FORCE)

DIE SIZE: 0.83mm × 1.01mm

Figure 3. Die Layout

Rev. K | Page 7 of 24

ADR01/ADR02/ADR03/ADR06

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

Ratings at 25°C, unless otherwise noted.

θ_JAis specified for the worst-case conditions, that is, a device

soldered in a circuit board for surface-mount packages.

Table 7.

Parameter

Rating

Table 8. Thermal Resistance

Supply Voltage

40.0 V

Output Short-Circuit Duration to GND

Storage Temperature Range

Operating Temperature Range

Junction Temperature Range

Indefinite

Package Type

θ_JA

θ_JC

Unit

°C/W

–65°C to +150°C

–40°C to +125°C

–65°C to +150°C

5-Lead SC70 (KS-5)

5-Lead TSOT (UJ-5)

8-Lead SOIC (R-8)

376

230

130

189

146

43

Lead Temperature Range (Soldering, 60 sec) 300°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

ESD CAUTION

Rev. K | Page 8 of 24

ADR01/ADR02/ADR03/ADR06

TERMINOLOGY

smaller for the subsequent 1000 hours of time points than for

the first.

Temperature Coefficient

The change of output voltage with respect to operating tempera-

ture changes normalized by the output voltage at 25°C. This

parameter is expressed in ppm/°C and can be determined by the

following equation:

Thermal Hysteresis

The change of output voltage after the device is cycled through

temperatures from +25°C to –40°C to +125°C and back to

+25°C. This is a typical value from a sample of parts put

through such a cycle.

V_O

(

T₂

)

− V_O

(

T

)

ppm

°C

⎡

⎤

1

TCV_O

=

× 10⁶

⎢

⎣

⎥

⎦

V_O25°C

)

×

(

T₂−T

)

1

V

_{O_HYS}= V_O(25°C) − V_{O_TC}

where:

V_O(25°C) = V_Oat 25°C.

V_O(T₁) = V_Oat Temperature 1.

V_O

(

25°C

)

−V_{O_TC}

V_{O_HYS}

[

ppm

]

=

×10⁶

V_O25°C

(

)

V_O(T₂) = V_Oat Temperature 2.

where:

V_O(25°C) = V_Oat 25°C.

_{O_TC}= V_Oat 25°C after temperature cycle at +25°C to −40°C

Line Regulation

The change in output voltage due to a specified change in input

voltage. This parameter accounts for the effects of self-heating. Line

regulation is expressed in either percent per volt, parts-per-million

per volt, or microvolts per volt change in input voltage.

V

to +125°C and back to +25°C.

Input Capacitor

Input capacitors are not required on the ADR01/ADR02/

ADR03/ADR06. There is no limit to the value of the capacitor

used on the input, but a 1 μF to 10 μF capacitor on the input

improves transient response in applications where the supply

suddenly changes. An additional 0.1 μF in parallel also helps to

reduce noise from the supply.

Load Regulation

The change in output voltage due to a specified change in load

current. This parameter accounts for the effects of self-heating.

Load regulation is expressed in either microvolts per milliampere,

parts-per-million per milliampere, or ohms of dc output resistance.

Long-Term Stability

Typical shift of output voltage at 25°C on a sample of parts

subjected to a test of 1000 hours at 25°C.

Output Capacitor

The ADR01/ADR02/ADR03/ADR06 do not require output

capacitors for stability under any load condition. An output

capacitor, typically 0.1 μF, filters out any low-level noise voltage

and does not affect the operation of the part. Alternatively, the

load transient response can be improved with an additional

1 μF to 10 μF output capacitor in parallel. A capacitor here acts

as a source of stored energy for a sudden increase in load

current. The only parameter that degrades by adding an output

capacitor is the turn-on time, and it depends on the size of the

capacitor chosen.

ΔV_O= V_O(t₀) −V_O(t₁)

V_O(t₀) −V_O(t₁)

ΔV_O[ppm] =

×10⁶

V_O(t₀)

where:

V_O(t₀) = V_Oat 25°C at Time 0.

V_O(t₁) = V_Oat 25°C after 100 hours of operation at 25°C.

The majority of the shift is seen in the first 200 hours, and as

time goes by, the drift decreases significantly. This drift is much

Rev. K | Page 9 of 24

ADR01/ADR02/ADR03/ADR06

TYPICAL PERFORMANCE CHARACTERISTICS

3.002

3.001

3.000

10.010

10.005

10.000

9.995

9.990

9.985

2.999

2.998

–40 –25 –10

5

20

35

50

65

80

95 110 125

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 4. ADR01 Typical Output Voltage vs. Temperature

Figure 7. ADR06 Typical Output Voltage vs. Temperature

5.008

0.8

0.7

0.6

5.004

5.000

+125°C

+25°C

–40°C

0.5

0.4

4.996

4.992

–40 –25 –10

5

20

35

50

65

80

95 110 125

12

16

20

24

28

32

36

40

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Figure 5. ADR02 Typical Output Voltage vs. Temperature

Figure 8. ADR01 Supply Current vs. Input Voltage

2.502

0.8

0.7

0.6

+125°C

2.501

2.500

+25°C

–40°C

0.5

0.4

2.499

2.498

8

12

16

20

24

28

32

36

40

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 6. ADR03 Typical Output Voltage vs. Temperature

Figure 9. ADR02 Supply Current vs. Input Voltage

Rev. K | Page 10 of 24

ADR01/ADR02/ADR03/ADR06

0.85

0.80

50

40

30

20

10

0

I

= 0mA TO 5mA

L

0.75

0.70

0.65

V

= 40V

IN

+125°C

+25°C

0.60

0.55

0.50

–40°C

V

= 8V

IN

–10

–20

0.45

0.40

5

10

15

20

25

30

35

40

–40

0

25

TEMPERATURE (°C)

85

125

INPUT VOLTAGE (V)

Figure 10. ADR03 Supply Current vs. Input Voltage

Figure 13. ADR02 Load Regulation vs. Temperature

0.80

0.75

0.70

0.65

0.60

0.55

0.50

0.45

0.40

60

50

I

= 0mA TO 10mA

L

V

= 7V

IN

+125°C

40

30

20

V

= 40V

IN

+25°C

–40°C

10

0

–40 –25 –10

5

20

35

50

65

80

95 110 125

5

10

15

20

25

30

35

40

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Figure 11. ADR06 Supply Current vs. Input Voltage

Figure 14. ADR03 Load Regulation vs. Temperature

40

30

40

30

I

= 0mA TO 10mA

L

I

= 0mA TO 10mA

L

V

= 40V

IN

V

= 40V

IN

20

10

20

10

0

V

= 14V

IN

0

–10

–20

V

= 7V

IN

–10

–20

–30

–40

0

50

TEMPERATURE (°C)

25

85

125

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 12. ADR01 Load Regulation vs. Temperature

Figure 15. ADR06 Load Regulation vs. Temperature

Rev. K | Page 11 of 24

ADR01/ADR02/ADR03/ADR06

10

8

2

V

= 14V TO 40V

IN

V

= 6V TO 40V

IN

0

–2

–4

–6

6

4

2

0

–8

–2

–10

–4

–40 –25 –10

5

20

35 50

65

80

95 110 125

–40 –25 –10

5

20

35

50

65

80

95 110 125

TEMPERATURE (°C)

Figure 19. ADR06 Line Regulation vs. Temperature

Figure 16. ADR01 Line Regulation vs. Temperature

5

8

4

V

= 8V TO 40V

IN

4

3

2

+125°C

0

–40°C

–4

1

0

+25°C

–8

0

2

4

6

8

10

–40 –25 –10

5

20

35

50

65

80

95 110 125

LOAD CURRENT (mA)

TEMPERATURE (°C)

Figure 20. ADR01 Minimum Input-Output

Voltage Differential vs. Load Current

Figure 17. ADR02 Line Regulation vs. Temperature

8

4

2

0

4

2

V

= 5V TO 40V

IN

+125°C

0

–40°C

–2

+25°C

–4

0

2

4

6

8

10

–40 –25 –10

5

20

35 50

65

80

95 110 125

LOAD CURRENT (mA)

TEMPERATURE (°C)

Figure 18. ADR03 Line Regulation vs. Temperature

Figure 21. ADR02 Minimum Input-Output

Voltage Differential vs. Load Current

Rev. K | Page 12 of 24

ADR01/ADR02/ADR03/ADR06

6

5

4

3

2

1

0

+125°C

+25°C

–40°C

TIME (1s/DIV)

0

2

4

6

8

10

LOAD CURRENT (mA)

Figure 25. ADR02 Typical Noise Voltage 0.1 Hz to 10.0 Hz

Figure 22. ADR03 Minimum Input-Output

Voltage Differential vs. Load Current

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

+125°C

+25°C

–40°C

TIME (1ms/DIV)

2

4

6

8

LOAD CURRENT (mA)

Figure 26. ADR02 Typical Noise Voltage 10 Hz to 10 kHz

Figure 23. ADR06 Minimum Input-Output

Voltage Differential vs. Load Current

0.70

0.65

0.60

10V

8V

T

= 25°C

A

V

5V/DIV

OUT

0.55

0.50

NO LOAD CAPACITOR

NO INPUT CAPACITOR

TIME (2ms/DIV)

2

4

6

8

LOAD CURRENT (mA)

Figure 24. ADR01 Quiescent Current vs. Load Current

Figure 27. ADR02 Line Transient Response

Rev. K | Page 13 of 24

ADR01/ADR02/ADR03/ADR06

C

= 0.01µF

NO LOAD CAPACITOR

IN

NO LOAD CAPACITOR

V

10V/DIV

IN

V

5V/DIV

IN

LOAD OFF

LOAD ON

V

100mV/DIV

V

5V/DIV

OUT

LOAD = 5mA

TIME (1ms/DIV)

TIME (4µs/DIV)

Figure 28. ADR02 Load Transient Response

Figure 31. ADR02 Turn-On Response

C

= 100nF

LOAD

V

10V/DIV

IN

V

5V/DIV

IN

C

= 0.01µF

L

NO INPUT CAPACITOR

LOAD OFF

LOAD ON

V

100mV/DIV

V

5V/DIV

OUT

LOAD = 5mA

TIME (1ms/DIV)

TIME (4µs/DIV)

Figure 29. ADR02 Load Transient Response

Figure 32. ADR02 Turn-Off with No Input Capacitor

C

= 0.01µF

L

NO INPUT CAPACITOR

V

10V/DIV

V

10V/DIV

IN

C

= 0.01µF

IN

NO LOAD CAPACITOR

V

5V/DIV

V

5V/DIV

OUT

TIME (4µs/DIV)

Figure 30. ADR02 Turn-Off Response

Figure 33. ADR02 Turn-Off with No Input Capacitor

Rev. K | Page 14 of 24

ADR01/ADR02/ADR03/ADR06

APPLICATIONS

U1

The ADR01/ADR02/ADR03/ADR06 are high precision, low

drift 10.0 V, 5.0 V, 2.5 V, and 3.0 V voltage references available

in an ultracompact footprint. The 8-lead SOIC versions of the

devices are drop-in replacements of the REF01/REF02/REF03

sockets with improved cost and performance.

ADR01/

ADR02/

ADR03/

ADR06

V

O

IN

OUT

C1

C2

0.1µF

TEMP TRIM

GND

0.1µF

These devices are standard band gap references (see Figure 35).

The band gap cell contains two NPN transistors (Q18 and Q19)

that differ in emitter area by 2×. The difference in their V_BE

produces a proportional-to-absolute temperature current

(PTAT) in R14, and, when combined with the V_BEof Q19,

produces a band gap voltage, V_BG, that is almost constant in

temperature. With an internal op amp and the feedback

network of R5 and R6, V_Ois set precisely at 10.0 V, 5.0 V, 2.5 V,

and 3.0 V for the ADR01, ADR02, ADR06, and ADR03,

respectively. Precision laser trimming of the resistors and other

proprietary circuit techniques are used to further enhance the

initial accuracy, temperature curvature, and drift performance

of the ADR01/ADR02/ADR03/ADR06.

Figure 34. Basic Configuration

V

IN

R1

Q1

R2

R3

R4

Q23

Q2

Q3

Q7

Q8

Q9

D1

D2

Q10

Q4

V

O

D3

C1

Q13

R5

Q12

R12

R13

I1

The PTAT voltage is made available at the TEMP pin of the

ADR01/ADR02/ADR03/ADR06. It has a stable 1.96 mV/°C

temperature coefficient, such that users can estimate the

temperature change of the device by knowing the voltage

change at the TEMP pin.

Q14 Q15

2×

V

R20

BG

1×

Q19

TRIM

Q18

R27

R14

TEMP

Q16

Q17

Q20

R6

R32

APPLYING THE ADR01/ADR02/ADR03/ADR06

R24

R41

R42

R17 R11

The devices can be used without any external components to

achieve the specified performance. Because of the internal op

amp amplifying the band gap cell to 10.0 V/5.0 V/2.5 V/3.0 V,

power supply decoupling helps the transient response of the

ADR01/ADR02/ADR03/ADR06. As a result, a 0.1 μF ceramic

type decoupling capacitor should be applied as close as possible

to the input and output pins of the device. An optional 1 μF to

10 μF bypass capacitor can also be applied at the V_INnode to

maintain the input under transient disturbance.

GND

Figure 35. Simplified Schematic Diagram

U1

ADR01/

ADR02/

ADR03/

ADR06

IN

V

IN

V

OUT

V

O

POT

10kΩ

TEMP TRIM

GND

R1

470kΩ

Output Adjustment

R2

1kΩ

The ADR01/ADR02/ADR03/ADR06 trim terminal can be used

to adjust the output voltage over a nominal voltage. This feature

allows a system designer to trim system errors by setting the

reference to a voltage other than 10.0 V/5.0 V/2.5 V/3.0 V. For

finer adjustment, add a series resistor of 470 kΩ. With the con-

figuration shown in Figure 36, the ADR01 can be adjusted from

9.70 V to 10.05 V, the ADR02 can be adjusted from 4.95 V to

5.02 V, the ADR06 can be adjusted from 2.8 V to 3.3 V, and the

ADR03 can be adjusted from 2.3 V to 2.8 V. Adjustment of the

output does not significantly affect the temperature performance

of the device, provided the temperature coefficients of the resis-

tors are relatively low.

Figure 36. Optional Trim Adjustment

Temperature Monitoring

As described at the end of the Applications section, the ADR01/

ADR02/ADR03/ADR06 provide a TEMP output (Pin 1 in Figure 1

and Pin 3 in Figure 2) that varies linearly with temperature. This

output can be used to monitor the temperature change in the

system. The voltage at V_TEMPis approximately 550 mV at 25°C,

and the temperature coefficient is approximately 1.96 mV/°C

(see Figure 37). A voltage change of 39.2 mV at the TEMP pin

corresponds to a 20°C change in temperature.

Rev. K | Page 15 of 24

ADR01/ADR02/ADR03/ADR06

U1

0.80

V

= 15V

IN

SAMPLE SIZE = 5

ADR01/

ADR02/

ADR03/

ADR06

0.75

0.70

V

OUT

+5V TO +15V

IN

0.65

0.60

TEMP TRIM

GND

+15V

U2

ΔV

/ΔT ≈ 1.96mV/°C

TEMP

V+

OP1177

V–

0.55

0.50

0.45

–V

REF

–15V

Figure 39. Negative Reference

0.40

–50

–25

0

25

50

75

100

125

V

IN

TEMPERATURE (°C)

I

IN

Figure 37. Voltage at TEMP Pin vs. Temperature

ADR01/

ADR02/

ADR03/

ADR06

V

OUT

The TEMP function is provided as a convenience rather than a

precise feature. Because the voltage at the TEMP node is

acquired from the band gap core, current pulling from this pin

has a significant effect on V_OUT. Care must be taken to buffer the

TEMP output with a suitable low bias current op amp, such as

the AD8601, AD820, or OP1177, all of which result in less than

a 100 μV change in ΔV_OUT(see Figure 38). Without buffering,

even tens of microamps drawn from the TEMP pin can cause

V_OUTto fall out of specification.

R

I

= (V

– V )/R

OUT L

SET

GND

V

L

I

≈ 0.6mA

Q

= I

SET

+ I

Q

R

L

Figure 40. Low Cost Current Source

U1

ADR01/

ADR02/

PRECISION CURRENT SOURCE WITH

ADJUSTABLE OUTPUT

ADR03/

15V

ADR06

V

O

IN

OUT

Alternatively, a precision current source can be implemented

with the circuit shown in Figure 41. By adding a mechanical or

digital potentiometer, this circuit becomes an adjustable current

source. If a digital potentiometer is used, the load current is

simply the voltage across Terminal B to Terminal W of the

TEMP TRIM

GND

V+

OP1177

V–

V

TEMP

1.9mV/°C

U2

digital potentiometer divided by R_SET

.

Figure 38. Temperature Monitoring

V_REF×D

(1)

I_L

=

R_SET

NEGATIVE REFERENCE

Without using any matching resistors, a negative reference can

be configured, as shown in Figure 39. For the ADR01, the

voltage difference between V_OUTand GND is 10.0 V. Because

V_OUTis at virtual ground, U2 closes the loop by forcing the

GND pin to be the negative reference node. U2 should be a

precision op amp with a low offset voltage characteristic.

where D is the decimal equivalent of the digital potentiometer

input code.

U1

ADR01/

ADR02/

ADR03/

0V TO (5V + V )

ADR06

L

V

OUT

+12V

IN

B

AD5201

LOW COST CURRENT SOURCE

W

TEMP TRIM

GND

100kΩ

Unlike most references, the ADR01/ADR02/ADR03/ADR06

employ an NPN Darlington in which the quiescent current

remains constant with respect to the load current, as shown in

Figure 24. As a result, a current source can be configured as

shown in Figure 40 where I_SET= (V_OUT− V_L)/R_SET. I_Lis simply

the sum of I_SETand I_Q. Although simple, I_Qvaries typically from

0.55 mA to 0.65 mA, limiting this circuit to general-purpose

applications.

A

+12V

R

1kΩ

SET

U2

V+

OP1177

V–

–5V TO V

V

L

R

L

1kΩ

I

L

–12V

Figure 41. Programmable 0 mA to 5 mA Current Source

Rev. K | Page 16 of 24

ADR01/ADR02/ADR03/ADR06

To optimize the resolution of this circuit, dual-supply op amps

should be used because the ground potential of ADR02 can

swing from −5.0 V at zero scale to V_Lat full scale of the

potentiometer setting.

latter is true, oscillation can occur. For this reason, connect

Capacitor C1 in the range of 1 pF to 10 pF between VP and the

output terminal of U4 to filter any oscillation.

V_t

I_t

R1′

R1′R2

R1R2′

Z_O

=

(3)

⎛

⎜

⎞

⎟

PROGRAMMABLE 4 mA TO 20 mA CURRENT

TRANSMITTER

−1

⎝

⎠

In this circuit, an ADR01 provides the stable 10.000 V reference

for the AD5544 quad 16-bit DAC. The resolution of the adjust-

able current is 0.3 μA/step; the total worst-case INL error is

merely 4 LSBs. Such error is equivalent to 1.2 μA or a 0.006%

system error, which is well below most systems’ requirements.

The result is shown in Figure 43 with measurement taken at 25°C

and 70°C; total system error of 4 LSBs at both 25°C and 70°C.

Because of their precision, adequate current handling, and small

footprint, the devices are suitable as the reference sources for

many high performance converter circuits. One of these

applications is the multichannel 16-bit, 4 mA to 20 mA current

transmitter in the industrial control market (see Figure 42).

This circuit employs a Howland current pump at the output to

yield better efficiency, a lower component count, and a higher

voltage compliance than the conventional design with op amps

and MOSFETs. In this circuit, if the resistors are matched such

that R1 = R1′, R2 = R2′, R3 = R3′, the load current is

5

R

= 500Ω

L

I

= 0mA TO 20mA

L

4

3

(R2 + R3) R1

R3′

V

_REF×D

I_L=

×

(2)

2^N

where D is similarly the decimal equivalent of the DAC input

code and N is the number of bits of the DAC.

2

25°C

70°C

1

According to Equation 2, R3′ can be used to set the sensitivity.

R3′ can be made as small as necessary to achieve the current

needed within U4 output current driving capability. Alter-

natively, other resistors can be kept high to conserve power.

0

–1

0

8192 16384 24576 32768 40960 49152 57344 65536

CODE (Decimal)

In this circuit, the AD8512 is capable of delivering 20 mA of

current, and the voltage compliance approaches 15.0 V.

Figure 43. Result of Programmable 4 mA to 20 mA Current Transmitter

0V TO –10V

PRECISION BOOSTED OUTPUT REGULATOR

5V

U2

+15V

R1

150kΩ

R2

15kΩ

U1

V

RF

V

A precision voltage output with boosted current capability can

be realized with the circuit shown in Figure 44. In this circuit,

U2 forces V_Oto be equal to V_REFby regulating the turn-on of

N1, thereby making the load current furnished by V_IN. In this

configuration, a 50 mA load is achievable at V_INof 15.0 V.

Moderate heat is generated on the MOSFET, and higher current

can be achieved with a replacement of a larger device. In

addition, for a heavy capacitive load with a fast edging input

signal, a buffer should be added at the output to enhance the

transient response.

DD

IO

15V

10V

AD5544

IO

V

U3

–15V

REF

IN

OUT

V

VP

X

R3

50Ω

GND

TEMP TRIM

GND

C1

10pF

U4

DIGITAL INPUT

CODE 20%–100% FULL SCALE

V

AD8512

O

R3'

50Ω

R2'

15kΩ

V

U1 = ADR01/ADR02/ADR03/ADR06, REF01

U2 = AD5543/AD5544/AD5554

U3, U4 = AD8512

L

VN

R1'

150kΩ

LOAD

500Ω

N1

V

IN

O

4mA TO 20mA

R

200Ω

C

L

1µF

U1

L

2N7002

15V

Figure 42. Programmable 4 mA to 20 mA Transmitter

ADR01/

ADR02/

ADR03/

ADR06

V

The Howland current pump yields a potentially infinite output

impedance, that is highly desirable, but resistance matching is

critical in this application. The output impedance can be deter-

mined using Equation 3. As shown by this equation, if the

resistors are perfectly matched, Z_Ois infinite. Alternatively, if

they are not matched, Z_Ois either positive or negative. If the

V

OUT

V+

OP1177

IN

TEMP TRIM

GND

V–

U2

Figure 44. Precision Boosted Output Regulator

Rev. K | Page 17 of 24

ADR01/ADR02/ADR03/ADR06

OUTLINE DIMENSIONS

2.20

2.00

1.80

1.35

1.25

1.15

2.40

2.10

1.80

5

1

4

3

2

PIN 1

0.65 BSC

1.00

0.90

0.70

0.40

0.10

1.10

0.80

0.46

0.36

0.26

0.30

0.15

0.22

0.08

0.10 M

AX

SEATING

PLANE

0.10 COPLANARITY

COMPLIANT TO JEDEC STANDARDS MO-203-AA

Figure 45. 5-Lead Thin Shrink Small Outline Transistor Package [SC70]

(KS-5)

Dimensions shown in millimeters

2.90 BSC

5

1

4

3

2.80 BSC

1.60 BSC

2

PIN 1

0.95 BSC

1.90

BSC

*

0.90

0.87

0.84

*

1.00 MAX

0.20

0.08

8°

4°

0°

0.10 MAX

0.60

0.45

0.30

0.50

0.30

SEATING

PLANE

*

COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

Figure 46. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions shown in millimeters

5.00 (0.1968)

4.80 (0.1890)

8

1

5

4

6.20 (0.2441)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

BSC

45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0°

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

1.27 (0.0500)

0.40 (0.0157)

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 47. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

Rev. K | Page 18 of 24

ADR01/ADR02/ADR03/ADR06

ORDERING GUIDES

ADR01 Ordering Guide

Output

Voltage

V_O(V)

Temperature

Coefficient

(ppm/°C)

Initial Accuracy

Temperature

Range

Package

Package Ordering

Model

(mV)

10

5

10

5

10

5

(ꢀ)

0.1

0.05

0.1

0.05

0.1

0.05

0.1

Description

8-Lead SOIC-N

5-Lead TSOT

5-Lead SC70

8-Lead SOIC-N

Die

Option

Quantity

Branding

ADR01AR

ADR01AR-REEL7

ADR01ARZ¹

ADR01ARZ-REEL7¹

ADR01BR

ADR01BR-REEL7

ADR01BRZ¹

ADR01BRZ-REEL7¹

ADR01AUJ-REEL7

ADR01AUJ-R2

ADR01AUJZ-REEL7¹

ADR01BUJ-REEL7

ADR01BUJ-R2

ADR01BUJZ-REEL7¹

ADR01AKS-REEL7

ADR01AKS-R2

10

3

25

9

25

9

–40°C to +125°C

R-8

98

R-8

1,000

98

R-8

1,000

98

R-8

1,000

98

R-8

1,000

3,000

250

3,000

250

3,000

250

3,000

250

UJ-5

KS-5

R-8

R8A

R1E

R8B

R1F

R8A

R1E

R8B

R1F

ADR01AKSZ-REEL7¹10

ADR01BKS-REEL7

ADR01BKS-R2

ADR01BKSZ-REEL7¹

ADR01CRZ¹

ADR01CRZ-REEL¹

ADR01NBC

10

3,000

98

10

5

40

10 (typ)

0.1

0.05

R-8

2,500

360

¹Z = RoHS Compliant Part.

Rev. K | Page 19 of 24

ADR01/ADR02/ADR03/ADR06

ADR02 Ordering Guide

Output

Temperature

Coefficient

(ppm/°C)

Initial Accuracy

Voltage

Temperature

Range

Package

Description

Package

Option

Ordering

Quantity

Model

V_O(V)

(mV)

(ꢀ)

Branding

ADR02AR

5

3

5

3

5

3

5

0.1

0.06

0.1

10

3

25

9

–40°C to +125°C

8-Lead SOIC-N R-8

98

ADR02AR-REEL

ADR02AR-REEL7

ADR02ARZ¹

ADR02ARZ-REEL¹

ADR02ARZ-REEL7¹

ADR02BR

2,500

1,000

98

2,500

98

1,000

98

1,000

3,000

250

ADR02BR-REEL7

ADR02BRZ¹

ADR02BRZ-REEL7¹

ADR02AUJ-REEL7

ADR02AUJ-R2

ADR02AUJZ-REEL7¹

ADR02BUJ-REEL7

ADR02BUJ-R2

ADR02BUJZ-R2¹

ADR02BUJZ-REEL7¹

ADR02AKS-REEL7

ADR02AKS-R2

ADR02AKSZ-REEL7¹

ADR02BKS-REEL7

ADR02BKS-R2

5-Lead TSOT

5-Lead SC70

UJ-5

R9A

R1G

R9B

R1H

R9A

R1G

R9B

R1H

0.1

UJ-5

KS-5

3,000

250

0.06

0.1

0.06

0.1

250

9

3,000

250

3,000

250

3,000

98

2,500

25

9

ADR02BKSZ-REEL7¹

ADR02CRZ¹

ADR02CRZ-REEL¹

40

8-Lead SOIC-N R-8

5

0.1

¹Z = RoHS Compliant Part.

Rev. K | Page 20 of 24

ADR01/ADR02/ADR03/ADR06

ADR03 Ordering Guide

Output

Voltage

V_O(V)

Temperature

Coefficient

(ppm/°C)

Initial Accuracy

Temperature

Range

Package

Package Ordering

Model

(mV)

5

(ꢀ)

0.2

0.1

0.2

0.1

0.2

0.1

Description

8-Lead SOIC-N

5-Lead TSOT

5-Lead SC70

8-Lead SOIC-N

Die

Option

Quantity

Branding

ADR03AR

ADR03AR-REEL7

ADR03ARZ¹

ADR03ARZ-REEL7¹

ADR03BR

ADR03BR-REEL7

ADR03BRZ¹

2.5

10

3

25

9

25

9

–40°C to +125°C

R-8

98

5

R-8

1,000

98

R-8

1,000

98

2.5

5

R-8

1,000

98

ADR03BRZ-REEL7¹

ADR03AUJ-REEL7

ADR03AUJ-R2

ADR03AUJZ-REEL7¹

ADR03BUJ-REEL7

ADR03BUJ-R2

ADR03BUJZ-REEL7¹

ADR03AKS-REEL7

ADR03AKS-R2

ADR03AKSZ-REEL7¹

ADR03BKS-REEL7

ADR03BKS-R2

ADR03BKSZ-REEL7¹

ADR03CRZ¹

R-8

1,000

3,000

250

3,000

250

3,000

250

3,000

250

UJ-5

KS-5

R-8

RFA

R1J

RFB

R1K

RFA

R1J

5

2.5

5

2.5

5

RFB

R1K

3,000

98

40

10 (typ)

ADR03CRZ-REEL¹

ADR03NBC

5

2.5

R-8

2,500

360

¹Z = RoHS Compliant Part.

Rev. K | Page 21 of 24

ADR01/ADR02/ADR03/ADR06

ADR06 Ordering Guide

Output

Voltage

V_O(V)

Temperature

Coefficient

(ppm/°C)

Initial Accuracy

Temperature

Range

Package

Description

Package Ordering

Model

(mV)

6

(ꢀ)

0.2

0.1

0.2

0.1

0.2

0.1

0.2

Option

Quantity

Branding

ADR06AR

3

10

3

–40°C to +125°C

R-8

98

8-Lead SOIC-N

5-Lead TSOT

5-Lead SC70

ADR06AR-REEL7

ADR06ARZ¹

ADR06ARZ-REEL7¹

6

R-8

1,000

98

6

R-8

6

R-8

1,000

98

ADR06BR

3

R-8

ADR06BR-REEL7

ADR06BRZ¹

3

R-8

1,000

98

3

R-8

ADR03BRZ-REEL7¹

ADR06AUJ-REEL7

ADR06AUJ-R2

ADR06AUJZ-REEL7¹

ADR06BUJ-REEL7

ADR06BUJ-R2

ADR06BUJZ-REEL7¹

ADR06AKS-REEL7

ADR06AKS-R2

ADR06AKSZ-REEL7¹

ADR06BKS-REEL7

ADR06BKS-R2

ADR06BKSZ-REEL7¹

ADR06CRZ¹

3

R-8

1,000

3,000

250

3,000

250

3,000

250

3,000

250

6

3

6

3

25

9

25

9

UJ-5

KS-5

R-8

RWA

R1L

RWB

R1M

RWA

R1L

5-Lead SC70

RWB

R1M

5-Lead SC70

3,000

98

6

40

8-Lead SOIC-N

ADR06CRZ-REEL¹

6

R-8

2,500

¹Z = RoHS Compliant Part.

Rev. K | Page 22 of 24

ADR01/ADR02/ADR03/ADR06

NOTES

Rev. K | Page 23 of 24

ADR01/ADR02/ADR03/ADR06

NOTES

registered trademarks are the property of their respective owners.

D02747-0-2/08(K)

Rev. K | Page 24 of 24


型号：	ADR03NBC
厂家：	ADI
描述：	IC 1-OUTPUT THREE TERM VOLTAGE REFERENCE, 2.501 V, UUC6, DIE-6, Voltage Reference 输出元件
文件：	总24页 (文件大小：654K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ADR03NBC [ADI]

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