ADMV1010AEZ [ADI]
12.6 GHz to 15.4 GHz, GaAs, MMIC, I/Q Downconverter;
| 型号： | ADMV1010AEZ |
| 厂家： | 
ADI |
| 描述： | 12.6 GHz to 15.4 GHz, GaAs, MMIC, I/Q Downconverter 射频 微波 |
| 文件： | 总21页 (文件大小：401K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
12.6 GHz to 15.4 GHz,
GaAs, MMIC, I/Q Downconverter
Data Sheet
ADMV1010
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VDRF
28
RF input frequency range: 12.6 GHz to 15.4 GHz
IF output frequency range: 2.7 GHz to 3.5 GHz
LO input frequency range: 9 GHz to 12.6 GHz
Power conversion gain: 15 dB typical
Image rejection: 25 dB typical
RFIN
3
LOIN 10
19
22
IF1
IF2
VDLO 14
2
4
SSB noise figure: 2 dB typical
Input IP3: 1 dBm typical
Input P1dB: −7 dBm typical
Single-ended, 50 Ω RF and LO input ports
4.9 mm × 4.9 mm, 32-terminal LCC with exposed pad
GND
GND
GND
11
ADMV1010
Figure 1.
APPLICATIONS
Point to point microwave radios
Radars and electronic warfare systems
Instrumentation and automatic test equipment
Satellite communications
GENERAL DESCRIPTION
The ADMV1010 is a compact, gallium arsenide (GaAs) design,
monolithic microwave integrated circuit (MMIC), I/Q down-
converter in a RoHS compliant package optimized for point to
point microwave radio designs that operates in the 12.6 GHz to
15.4 GHz frequency range. The ADMV1010 is optimized to work
as a low noise, upper sideband (low-side local oscillator (LO)),
image reject downconverter.
amplifier drives the LO. IF1 and IF2 mixer outputs are
provided, and an external 90° hybrid is needed to select the
required sideband. The I/Q mixer topology reduces the need for
filtering the unwanted sideband. The ADMV1010 is a much
smaller alternative to hybrid style SSB downconverter
assemblies, and it eliminates the need for wire bonding by
allowing the use of surface-mount manufacturing assemblies.
The ADMV1010 provides 15 dB of conversion gain with 25 dB
of image rejection. The ADMV1010 uses a radio frequency
(RF), low noise amplifier (LNA) followed by an in-phase/
quadrature (I/Q) double balanced mixer, where a driver
The ADMV1010 downconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal LCC package. The
ADMV1010 operates over the −40°C to +85°C temperature range.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Technical Support
©2017-2018 Analog Devices, Inc. All rights reserved.
www.analog.com
ADMV1010
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Leakage Performance................................................................. 13
Return Loss Performance.......................................................... 14
Spurious Performance ............................................................... 15
M × N Spurious Performance................................................... 15
Theory of Operation ...................................................................... 16
Mixer............................................................................................ 16
LNA .............................................................................................. 16
Applications Information.............................................................. 17
Typical Application Circuit....................................................... 17
Evaluation Board........................................................................ 18
Bill of Materials........................................................................... 20
Outline Dimensions....................................................................... 21
Ordering Guide .......................................................................... 21
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
IF Frequency = 2.7 GHz .............................................................. 6
IF Frequency = 3.1 GHz .............................................................. 8
IF Frequency = 3.5 GHz ............................................................ 10
IF Bandwidth .............................................................................. 12
REVISION HISTORY
4/2018—Rev. A to Rev. B
Changes to Thermal Resistance Section........................................ 4
Changes to Figure 2 and Table 4..................................................... 5
Changes to Figure 16 through Figure 18........................................8
Changes to Figure 21 and Figure 22................................................9
Changes to Figure 26 through Figure 28..................................... 10
Changes to Figure 31 and Figure 32............................................. 11
Changes to Figure 35 and Figure 36............................................. 12
Changes to Figure 37 through Figure 40..................................... 13
Changes to Figure 44 through Figure 46..................................... 14
Changes to M × N Spurious Performance Section and Table 5 .... 15
Changes to Applications Information Section and Figure 47........ 17
Changes to Ordering Guide.......................................................... 21
1/2018—Rev. 0 to Rev. A
Changes to General Description and Figure 1 ............................. 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Added Thermal Resistance Section and Table 3; Renumbered
Sequentially ....................................................................................... 4
Changes to Figure 2 and Table 4..................................................... 5
Changes to Figure 4.......................................................................... 6
Changes to Figure 11 and Figure 12............................................... 7
10/2017—Revision 0: Initial Version
Rev. B | Page 2 of 21
Data Sheet
ADMV1010
SPECIFICATIONS
Data taken at VDRF = 4 V, VDLO = 4 V, L O = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C; data taken using Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
Table 1.
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
RF INPUT FREQUENCY RANGE
LO
12.6
15.4
GHz
Input Frequency Range
Amplitude
9
−4
2.7
12.6
+4
GHz
dBm
GHz
0
IF OUTPUT FREQUENCY RANGE
RF PERFORMANCE
Conversion Gain
SSB Noise Figure
Input Third-Order Intercept
Input 1 dB Compression Point
Image Rejection
Leakage
3.5
With hybrid
11
15
2
+1
−8
35
17
2.6
dB
dB
dBm
dBm
dB
SSB NF
IP3
P1dB
At −23 dBm/tone
−0.5
−10
20
LO to RF
LO to IF
−35
−20
−25
−15
dBm
dBm
IM3 at Input
−20 dBm Input Power
−25 dBm Input Power
−30 dBm Input Power
Return Loss
46
52
56
49
55
59
dBc
dBc
dBc
RF Input
IF Output
LO Input
−12
−15
−15
−10
−10
−10
dB
dB
dB
POWER INTERFACE
Voltage
RF
LO
VDRF
VDLO
4
4
V
V
Current
RF
LO
IDRF
IDLO
78
83
0.7
100
100
0.8
mA
mA
W
Total Power
Rev. B | Page 3 of 21
ADMV1010
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 2.
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Parameter
Rating
Supply Voltage
VDRF
5.5 V
θJA is thermal resistance, junction to ambient (°C/W), and θJC is
thermal resistance, junction to case (°C/W).
VDLO
RF Input Power
5.5 V
15 dBm
LO Input Power
15 dBm
175°C
1.7 W
>1 million hours
−40°C to +85°C
−65°C to +150°C
260°C
Table 3.
Package Type
Maximum Junction Temperature (TJ)
Maximum Power Dissipation
Lifetime at Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
Lead Temperature Range (Soldering, 60 sec)
Moisture Sensitivity Level (MSL) Rating
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM)
1
1
θJA
33.4
θJC
Unit
E-32-1
51
°C/W
1 See JEDEC standard JESD51-2 for additional information on optimizing the
thermal impedance (PCB with 3 × 3 vias).
MSL3
ESD CAUTION
250 V
Field Induced Charged Device Model (FICDM) 500 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. B | Page 4 of 21
Data Sheet
ADMV1010
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
NIC
GND
RFIN
GND
NIC
NIC
NIC
NIC
1
2
3
4
5
6
7
8
24 NIC
23
22 IF2
21 NIC
NIC
ADMV1010
TOP VIEW
20
19
18
NIC
IF1
NIC
(Not to Scale)
17 NIC
NOTES
1. NIC = NOT INTERNALLY CONNECTED. THESE
PINS ARE NOT INTERNALLY CONNECTED. IT IS
RECOMMENDED TO GROUND THESE PINS ON THE PCB.
2. EXPOSED PAD. EXPOSED PAD MUST BE
CONNECTED TO GND. GOOD RF AND THERMAL
GROUNDING IS RECOMMENDED.
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic Description
1, 5 to 9, 12, 13, 15 to 18, NIC
20, 21, 23 to 27, 29 to 32
Not Internally Connected. These pins are not internally connected. It is recommended to ground
these pins on the PCB.
2, 4, 11
GND
Ground.
3
10
14
RFIN
LO_IN
VDLO
RF Input. This pin is ac-coupled internally and matched to 50 Ω, single-ended.
LO Input. This pin is ac-coupled internally and matched to 50 Ω single-ended.
Power Supply Voltage for the LO Amplifier. Refer to the Applications Information section for the
required external components and biasing.
19
22
28
IF1
IF2
VDRF
Quadrature IF Output 1. Matched to 50 Ω and ac coupled. No external dc block required.
Quadrature IF Output 2. Matched to 50 Ω and ac coupled. No external dc block required.
Power Supply Voltage for the RF Amplifier. Refer to the Applications Information section for the
required external components and biasing.
EPAD
Exposed Pad. The exposed pad must be connected to GND. Good RF and thermal grounding is
recommended.
Rev. B | Page 5 of 21
ADMV1010
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
IF FREQUENCY = 2.7 GHz
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
18
17
16
15
14
13
12
11
10
18
17
16
15
14
13
12
11
10
–40°C
+25°C
+85°C
–4dBm
0dBm
+4dBm
12.5
13.0
13.5
14.0
14.5
15.0
15.5
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 3. Conversion Gain vs. RF Frequency at Various Temperatures
Figure 6. Conversion Gain vs. RF Frequency at Various LO Powers
55
55
–40°C
–4dBm
0dBm
+4dBm
+25°C
+85°C
50
50
45
40
35
30
25
20
45
40
35
30
25
20
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 4. Image Rejection vs. RF Frequency at Various Temperatures
Figure 7. Image Rejection vs. RF Frequency at Various LO Powers
10
10
–40°C
–4dBm
0dBm
+4dBm
+25°C
+85°C
8
6
8
6
4
4
2
2
0
0
–2
–4
–6
–2
–4
–6
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 5. Input IP3 vs. RF Frequency at Various Temperatures
Figure 8. Input IP3 vs. RF Frequency at Various LO Powers
Rev. B | Page 6 of 21
Data Sheet
ADMV1010
0
0
–2
–40°C
+25°C
+85°C
–4dBm
0dBm
+4dBm
–2
–4
–4
–6
–6
–8
–8
–10
–12
–10
–12
12.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 9. Input P1dB vs. RF Frequency at Various Temperatures
Figure 11. Input P1dB vs. RF Frequency at Various LO Powers
3.0
2.5
2.0
1.5
1.0
3.0
–4dBm
0dBm
+4dBm
2.5
2.0
1.5
1.0
0.5
0
0.5
–40°C
+25°C
+85°C
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
12.5
13.0
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 10. Noise Figure vs. RF Frequency at Various Temperatures
Figure 12. Noise Figure vs. RF Frequency at Various LO Powers
Rev. B | Page 7 of 21
ADMV1010
Data Sheet
IF FREQUENCY = 3.1 GHz
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
17
16
15
14
13
12
11
10
–4dBm
–40°C
+25°C
+85°C
9
0dBm
+4dBm
8
12.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 16. Conversion Gain vs. RF Frequency at Various LO Powers
Figure 13. Conversion Gain vs. RF Frequency at Various Temperatures
50
45
40
35
30
25
20
15
50
45
40
35
30
25
20
15
10
10
+4dBm
–40°C
5
+0dBm
–4dBm
5
0
+25°C
+85°C
0
12.0 12.4 12.8 13.2 13.6 14.0 14.4 14.8 15.2 15.6 16.0
RF FREQUENCY (GHz)
12.0 12.4 12.8 13.2 13.6 14.0 14.4 14.8 15.2 15.6 16.0
RF FREQUENCY (GHz)
Figure 17. Image Rejection vs. RF Frequency at Various LO Powers
Figure 14. Image Rejection vs. RF Frequency at Various Temperatures
20
20
–40°C
–4dBm
+25°C
0dBm
18
18
16
+85°C
+4dBm
16
14
12
10
8
14
12
10
8
6
6
4
4
2
2
0
0
–2
12.0
–2
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 18. Input IP3 vs. RF Frequency at Various LO Powers
Figure 15. Input IP3 vs. RF Frequency at Various Temperatures
Rev. B | Page 8 of 21
Data Sheet
ADMV1010
0
0
–2
–4dBm
0dBm
+4dBm
–40°C
+25°C
+85°C
–2
–4
–4
–6
–6
–8
–8
–10
–12
–10
–12
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 21. Input P1dB vs. RF Frequency at Various LO Powers
Figure 19. Input P1dB vs. RF Frequency at Various Temperatures
3.0
3.0
2.5
2.0
1.5
1.0
–4dBm
0dBm
+4dBm
2.5
2.0
1.5
1.0
0.5
0
0.5
–40°C
+25°C
+85°C
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
12.5
13.0
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 22. Noise Figure vs. RF Frequency at Various LO Powers
Figure 20. Noise Figure vs. RF Frequency at Various Temperatures
Rev. B | Page 9 of 21
ADMV1010
Data Sheet
IF FREQUENCY = 3.5 GHz
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
18
16
14
12
10
8
18
16
14
12
10
8
6
6
4
4
–4dBm
0dBm
2
–40°C
+25°C
+85°C
2
+4dBm
0
12.0
0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 26. Conversion Gain vs. RF Frequency at Various LO Powers
Figure 23. Conversion Gain vs. RF Frequency at Various Temperatures
60
60
50
40
30
20
10
–4dBm
0dBm
+4dBm
50
40
30
20
10
0
–40°C
+25°C
+85°C
0
12.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 27. Image Rejection vs. RF Frequency at Various LO Powers
Figure 24. Image Rejection vs. RF Frequency at Various Temperatures
16
16
–40°C
–4dBm
+25°C
0dBm
14
14
+85°C
+4dBm
12
10
8
12
10
8
6
6
4
4
2
2
0
0
–2
–4
–2
–4
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 25. Input IP3 vs. RF Frequency at Various Temperatures
Figure 28. Input IP3 vs. RF Frequency at Various LO Powers
Rev. B | Page 10 of 21
Data Sheet
ADMV1010
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
–10
0
–4dBm
0dBm
–40°C
+25°C
–1
+4dBm
+85°C
–2
–3
–4
–5
–6
–7
–8
–9
–10
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 31. Input P1dB vs. RF Frequency at Various LO Powers
Figure 29. Input P1dB vs. RF Frequency at Various Temperatures
3.0
3.0
2.5
2.0
1.5
1.0
0.5
–4dBm
0dBm
+4dBm
2.5
2.0
1.5
1.0
0.5
0
–40°C
+25°C
+85°C
0
12.5
12.5
13.0
13.5
14.0
14.5
15.0
15.5
13.0
13.5
14.0
14.5
15.0
15.5
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 30. Noise Figure vs. RF Frequency at Various Temperatures
Figure 32. Noise Figure vs. RF Frequency at Various LO Powers
Rev. B | Page 11 of 21
ADMV1010
Data Sheet
IF BANDWIDTH
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm at 9 GHz, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits
QCN-45+ power splitter as upper sideband (low-side LO), unless otherwise noted.
18
16
14
12
10
8
18
16
14
12
10
8
+4dBm
+0dBm
–4dBm
–40°C
+25°C
+85°C
6
6
4
4
2
2
0
2.0
0
2.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 33. Conversion Gain vs. IF Frequency at Various Temperatures
Figure 35. Conversion Gain vs. IF Frequency at Various LO Powers
8
8
–40°C
+4dBm
+0dBm
–4dBm
+25°C
+85°C
6
6
4
4
2
2
0
0
–2
–4
–2
–4
2.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
2.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 34. Input IP3 vs. IF Frequency at Various Temperatures
Figure 36. Input IP3 vs. IF Frequency at Various LO Powers
Rev. B | Page 12 of 21
Data Sheet
ADMV1010
LEAKAGE PERFORMANCE
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted.
–20
–22
–24
–26
–28
–30
–32
–34
–36
–38
–40
–20
–22
–24
–26
–28
–30
–32
–34
–36
–38
–40
+4dBm
+0dBm
–4dBm
–40°C
+25°C
+85°C
8
9
10
11
12
13
14
8
9
10
11
12
13
14
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 39. LO Leakage at RFIN vs. LO Frequency at Various LO Powers
Figure 37. LO Leakage at RFIN vs. LO Frequency at Various Temperatures
0
0
+4dBm
–40°C
+0dBm
+25°C
–5
–5
–4dBm
+85°C
–10
–15
–20
–25
–30
–35
–40
–45
–50
–10
–15
–20
–25
–30
–35
–40
–45
–50
8
9
10
11
12
13
14
8
9
10
11
12
13
14
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 40. LO Leakage at IF Output vs. LO Frequency at Various LO Powers
Figure 38. LO Leakage at IF Output vs. LO Frequency at Various Temperatures
Rev. B | Page 13 of 21
ADMV1010
Data Sheet
RETURN LOSS PERFORMANCE
Data taken at VDRF = 4 V, VDLO = 4 V, LO = −4 dBm ≤ LO ≤ +4 dBm, −40°C ≤ TA ≤ +85°C, data taken with Mini-Circuits QCN-45+
power splitter as upper sideband (low-side LO), unless otherwise noted. Measurement includes trace loss and RF connector loss.
–10
–12
–14
–16
–18
–20
–22
–24
–26
–28
–30
–10
–12
–14
–16
–18
–20
–22
–24
–26
–28
–30
–40°C
+25°C
+85°C
+4dBm
+0dBm
–4dBm
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
12.0
12.5
13.0
13.5
14.0
14.5
15.0
15.5
16.0
RF FREQUENCY (GHz)
RF FREQUENCY (GHz)
Figure 44. RF Input Return Loss vs. RF Frequency at Various LO Powers
Figure 41. RF Input Return Loss vs. RF Frequency at Various Temperatures
–10
–10
+4dBm
+0dBm
–4dBm
–40°C
+25°C
+85°C
–15
–20
–25
–30
–35
–15
–20
–25
–30
–35
8
9
10
11
12
13
14
8
9
10
11
12
13
14
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 45. LO Input Return Loss vs. LO Frequency at Various LO Powers
Figure 42. LO Input Return Loss vs. LO Frequency at Various Temperatures
–8
–8
+4dBm
–40°C
+25°C
+85°C
+0dBm
–4dBm
–10
–10
–12
–14
–16
–18
–20
–22
–12
–14
–16
–18
–20
–22
2.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
2.0
2.2
2.4
2.6
2.8
3.0
3.0
3.4
3.6
3.8
4.0
IF FREQUENCY (GHz)
IF FREQUENCY (GHz)
Figure 46. IF Output Return Loss vs. IF Frequency at Various LO Powers
Figure 43. IF Output Return Loss vs. IF Frequency at Various Temperatures
Rev. B | Page 14 of 21
Data Sheet
ADMV1010
IF = 3100 MHz, RF = 13.3 GHz at −20 dBm; all values in dBc
below the IF power level. N/A means not applicable.
SPURIOUS PERFORMANCE
Data taken at VDRF = 4 V, VDLO = 4 V, LO = 0 dBm, −40°C ≤
TA ≤ +85°C; data taken with Mini-Circuits QCN-45+ power
splitter as upper sideband (low-side LO), unless otherwise noted.
N × LO
−2
−1
N/A
N/A
0
0
+1
N/A
13
+2
25
40
40
72
N/A
N/A
N/A
55
N/A
N/A
24
−1
0
Table 5. LO Harmonic Leakage (dBm) at IF Output
Harmonics
M × RF
50
+1
+2
LO Frequency (MHz)1 1.0
2.0
3.0
4.0
78
61
63
9000
9500
−36
−22
−20
−18
−19
−28
−42
−43
−48
−47
−47
−48
−46
−41
−47
−46
−47
−45
−43
−42
−41
−38
−35
−32
−49
−50
−60
−53
−50
−65
−60
−61
10,000
10,500
11,000
11,500
12,000
12,600
IF = 3500 MHz, RF = 13.3 GHz at −20 dBm; all values in dBc
below the IF power level. N/A means not applicable.
N × LO
−2
−1
N/A
N/A
0
0
+1
N/A
14
+2
24
38
44
70
N/A
N/A
N/A
54
N/A
N/A
24
−1
0
M × RF
1 LO Input Power = 0 dBm.
49
+1
+2
M × N SPURIOUS PERFORMANCE
66
60
61
LO = 4 dBm, Upper Sideband
IF = 2700 MHz, RF = 13.3 GHz at −20 dBm; all values in dBc
below the IF power level. N/A means not applicable.
N × LO
−2
−1
N/A
N/A
0
0
+1
N/A
13
+2
28
39
43
71
N/A
N/A
N/A
52
N/A
N/A
24
−1
0
M × RF
51
+1
+2
86
61
65
Rev. B | Page 15 of 21
ADMV1010
Data Sheet
THEORY OF OPERATION
The ADMV1010 is a compact GaAs, MMIC, single sideband
(SSB) downconverter in a RoHS compliant package optimized
for upper sideband point to point microwave radio applications
operating in the 12.6 GHz to 15.4 GHz input frequency range.
The ADMV1010 supports LO input frequencies of 9 GHz to
12.6 GHz and IF output frequencies of 2.7 GHz to 3.5 GHz.
MIXER
The mixer is an I/Q double balanced mixer, and this mixer
topology reduces the need for filtering the unwanted sideband.
An external 90° hybrid is required to select the upper sideband
of operation. The ADMV1010 has been optimized to work with
the Mini-Circuits QCN-45+ RF 90° hybrid.
The ADMV1010 uses a RF LNA amplifier followed by an I/Q
double balanced mixer, where a driver amplifier drives the LO
(see Figure 1). The combination of design, process, and pack-
aging technology allows the functions of these subsystems to be
integrated into a single die, using mature packaging and inter-
connection technologies to provide a high performance, low
cost design with excellent electrical, mechanical, and thermal
properties. In addition, the need for external components is
minimized, optimizing cost and size.
LNA
The LNA is self biased, and it requires only a single dc bias
voltage (VDRF) to operate. The bias current for the LNA is
60 mA at 4 V typically.
The application circuit (see Figure 47) provided shows the
necessary external components on the bias lines to eliminate
any undesired stability problems for the RF amplifier and the
LO amplifier.
The ADMV1010 is a much smaller alternative to hybrid style
image reject converter assemblies, and it eliminates the need for
wire bonding by allowing the use of surface-mount manufacturing
assemblies.
LO DRIVER AMPLIFIER
The LO driver amplifier takes a single LO input and amplifies it
to the desired LO signal level for the mixer to operate optimally.
The LO driver amplifier is self biased, and it only requires a
single dc bias voltage (VDLO) to operate. The bias current for
the LO amplifier is 100 mA at 4 V typically. The LO drive range
of −4 dBm to +4 dBm makes it compatible with Analog Devices,
Inc., wideband synthesizer portfolio without the need for an
external LO driver amplifier.
The ADMV1010 downconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal ceramic leadless chip
carrier (LCC) package. The ADMV1010 operates over the
−40°C to +85°C temperature range.
Rev. B | Page 16 of 21
Data Sheet
ADMV1010
APPLICATIONS INFORMATION
The evaluation board and typical application circuit are
optimized for low-side LO (upper sideband) performance with
the Mini-Circuit QCN-45+ RF 90° hybrid. Because the I/Q
mixers are double balanced, the ADMV1010 can support IF
TYPICAL APPLICATION CIRCUIT
The typical applications circuit is shown in Figure 47. The
application circuit shown here has been replicated for the
evaluation board circuit.
frequencies from 3.5 GHz to low frequency.
VDLNA
1
VDLNA
C9
1µF
C8
0.01µF
C7
100pF
IF_OUTPUT
AGND
IF_OUTPUT
1
4
3 2
DUT
X1
AGND
1
4
6
SUM_PORT
PORT_1
PORT_2
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
NIC
NIC
RF_INPUT
1
GND
RFIN
GND
NIC
NIC
IF2
RF_INPUT
3
50_OHM_TERM
GND GND
GND
GND
IF1
4
3 2
ADMV1010AEZ
13/15 DC
5
2
QCN-45+
R3
NIC
50Ω
NIC
GND
NIC
AGND
NIC
AGND
AGND
C1
AGND
AGND
100pF
C2
LO_INPUT
1
LO_INPUT
0.01µF
C3
4
3 2
1µF
AGND
AGND
VDLO
VDLO
1
Figure 47. Typical Application Circuit
Rev. B | Page 17 of 21
ADMV1010
Data Sheet
Layout
EVALUATION BOARD
Solder the exposed pad on the underside of the ADMV1010 to
a low thermal and electrical impedance ground plane. This pad
is typically soldered to an exposed opening in the solder mask
on the evaluation board. Connect these ground vias to all other
ground layers on the evaluation board to maximize heat dissi-
pation from the device package. Figure 48 shows the printed
circuit board (PCB) land pattern footprint for the ADMV1010-
EVALZ, and Figure 49 shows the solder paste stencil for the
ADMV1010-EVALZ.
The circuit board used in the application must use RF circuit
design techniques. Signal lines must have 50 Ω impedance, and
the package ground leads and exposed pad must be connected
directly to the ground plane similarly to that shown in Figure 48
and Figure 49. Use a sufficient number of via holes to connect
the top and bottom ground planes. The evaluation circuit board
shown in Figure 50 is available from Analog Devices upon
request.
0.217" SQUARE
0.004" MASK/METAL OVERLAP
0.010" MINIMUM MASK WIDTH
SOLDER MASK
GROUND PAD
PAD SIZE
0.026" × 0.010"
PIN 1
0.197"
[0.50]
0.156"
MASK
OPENING
ø.034"
TYPICAL
VIA SPACING
ø.010"
TYPICAL VIA
0.010" REF
0.138" SQUARE MASK OPENING
0.02 × 45° CHAMFER FOR PIN 1
0.030"
MASK OPENING
0.146" SQUARE
GROUND PAD
Figure 48. PCB Land Pattern Footprint of the ADMV1010-EVALZ
Rev. B | Page 18 of 21
Data Sheet
ADMV1010
0.017
0.0197
TYP
0.219
SQUARE
0.132
SQUARE
0.017
0.027
TYP
R0.0040 TYP
132 PLCS
0.010
TYP
Figure 49. Solder Paste Stencil of the ADMV1010-EVALZ
Figure 50. ADMV1010-EVALZ Evaluation Board, Top Layer
Rev. B | Page 19 of 21
ADMV1010
Data Sheet
BILL OF MATERIALS
Table 6.
Qty. Reference Designator
Description
Manufacturer/Part No.
1
2
Not applicable
C1, C7
PCB
Analog Devices/042361
Murata/GRM1555C1H101JA01D
100 pF multilayer ceramic capacitors, high
temperature, 0402
2
2
C2, C8
C3, C9
0.01 µF ceramic capacitors, X7R, 0402
1 µF monolithic ceramic capacitors, SMD, X5R,
0402
Murata/GRM155R71E103KA01D
Taiyo Yuden/UMK107AB7105KA-T
4
3
GND, GND1, VDLO, VDLNA
LO_INPUT, RF_INPUT, IF_OUTPUT
Connection PCB SMT test points, CNKEY5016TP
Connection PCB SMA, K_SRI-NS,
CNSMAL460W295H156
Keystone Electronics Corporation/5016
SRI Connector Gage Co./25-146-1000-92
1
1
R3
X1
50 Ω, high frequency chip resistor, 0402
XFMR power splitter/combiner, 2500 MHz to
4500 MHz, TSML126W63H42
Vishay Precision Group/FC0402E50R0FST1
Mini-Circuits/QCN-45+
1
1
Device Under Test (DUT)
Heatsink
GaAs, MMIC, I/Q downconverter
Heatsink
Analog Devices/ADMV1010AEZ
Analog Devices/111332
Rev. B | Page 20 of 21
Data Sheet
ADMV1010
OUTLINE DIMENSIONS
5.05
4.90 SQ
4.75
0.36
0.30
0.24
PIN 1
0.08
REF
INDICATOR
PIN 1
32
25
24
1
0.50
BSC
3.60
3.50 SQ
3.40
EXPOSED
PAD
17
8
16
9
0.38
0.32
0.26
0.20 MIN
BOTTOM VIEW
3.50 REF
TOP VIEW
SIDE VIEW
1.10
1.00
0.90
4.10 REF
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SEATING
PLANE
SECTION OF THIS DATA SHEET.
Figure 51. 32-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-32-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range Package Body Material Lead Finish
Package Description
Package Option
ADMV1010AEZ
ADMV1010AEZ-R7 −40°C to +85°C
ADMV1010-EVALZ
−40°C to +85°C
Alumina Ceramic
Alumina Ceramic
Gold Over Nickel 32-Terminal Ceramic LCC E-32-1
Gold Over Nickel 32-Terminal Ceramic LCC E-32-1
Evaluation Board
1 Z = RoHS Compliant Part.
©2017-2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D15788-0-4/18(B)
Rev. B | Page 21 of 21
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明