ADL5387ACPZ-R2 [ADI]
30 MHz TO 2 GHz Quadrature Demodulator;
| 型号： | ADL5387ACPZ-R2 |
| 厂家： | 
ADI |
| 描述： | 30 MHz TO 2 GHz Quadrature Demodulator 电信 电信集成电路 |
| 文件： | 总28页 (文件大小：695K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
30 MHz to 2 GHz
Quadrature Demodulator
Data Sheet
ADL5387
FEATURES
FUNCTIONAL BLOCK DIAGRAM
24
CMRF CMRF RFIP RFIN CMRF VPX
VPA
23
22
21
20
19
Operating RF frequency
30 MHz to 2 GHz
LO input at 2 × fLO
1
2
3
4
5
6
VPB 18
VPB 17
QHI 16
QLO 15
IHI 14
60 MHz to 4 GHz
COM
BIAS
VPL
VPL
VPL
Input IP3: 31 dBm @ 900 MHz
Input IP2: 62 dBm @ 900 MHz
Input P1dB: 13 dBm @ 900 MHz
Noise figure (NF)
12.0 dB @ 140 MHz
14.7 dB @ 900 MHz
Voltage conversion gain > 4 dB
Quadrature demodulation accuracy
Phase accuracy ~0.4°
Amplitude balance ~0.05 dB
Demodulation bandwidth ~240 MHz
Baseband I/Q drive 2 V p-p into 200 Ω
Single 5 V supply
DIVIDE-BY-2
PHASE SPLITTER
ILO 13
CML LOIP LOIN CML CML COM
10 11 12
7
8
9
Figure 1.
APPLICATIONS
QAM/QPSK RF/IF demodulators
W-CDMA/CDMA/CDMA2000/GSM
Microwave point-to-(multi)point radios
Broadband wireless and WiMAX
Broadband CATVs
GENERAL DESCRIPTION
The ADL5387 is a broadband quadrature I/Q demodulator that
covers an RF/IF input frequency range from 30 MHz to 2 GHz.
With a NF = 13.2 dB, IP1dB = 12.7 dBm, and IIP3 = 32 dBm @
450 MHz, the ADL5387 demodulator offers outstanding dynamic
range suitable for the demanding infrastructure direct-conversion
requirements. The differential RF/IF inputs provide a well-
behaved broadband input impedance of 50 Ω and are best
driven from a 1:1 balun for optimum performance.
The fully balanced design minimizes effects from second-order
distortion. The leakage from the LO port to the RF port is
<−70 dBc. Differential dc-offsets at the I and Q outputs are
<10 m V. Both of these factors contribute to the excellent IIP2
specifications > 60 dBm.
The ADL5387 operates off a single 4.75 V to 5.25 V supply. The
supply current is adjustable with an external resistor from the
BIAS pin to ground.
Ultrabroadband operation is achieved with a divide-by-2 method
for local oscillator (LO) quadrature generation. Over a wide
range of LO levels, excellent demodulation accuracy is
achieved with amplitude and phase balances ~0.05 dB and
~0.4°, respectively. The demodulated in-phase (I) and
quadrature (Q) differential outputs are fully buffered and
provide a voltage conversion gain of >4 dB. The buffered
baseband outputs are capable of driving a 2 V p-p differential
signal into 200 Ω.
The ADL5387 is fabricated using the Analog Devices, Inc.
advanced silicon-germanium bipolar process and is available in
a 24-lead exposed paddle LFCSP.
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2007–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
ADL5387
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Mixers .......................................................................................... 14
Emitter Follower Buffers ........................................................... 14
Bias Circuit.................................................................................. 14
Applications Information.............................................................. 15
Basic Connections...................................................................... 15
Power Supply............................................................................... 15
Local Oscillator (LO) Input ...................................................... 15
RF Input....................................................................................... 16
Baseband Outputs ...................................................................... 16
Error Vector Magnitude (EVM) Performance ....................... 17
Low IF Image Rejection............................................................. 18
Example Baseband Interface..................................................... 18
Characterization Setups................................................................. 21
Evaluation Board ............................................................................ 23
Outline Dimensions....................................................................... 26
Ordering Guide .......................................................................... 26
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
Distributions for fRF = 140 MHz............................................... 10
Distributions for fRF = 450 MHz............................................... 11
Distributions for fRF = 900 MHz............................................... 12
Distributions for fRF = 1900 MHz............................................. 13
Circuit Description......................................................................... 14
LO Interface................................................................................. 14
V-to-I Converter......................................................................... 14
REVISION HISTORY
5/13—Rev. 0 to Rev. A
Changed Minimum Operating RF Frequency from 50 MHz to
30 MHz (Throughout) ..................................................................... 1
Changed Minimum LO Input at 2 × fLO from 100 MHz to
60 MHz (Throughout) ..................................................................... 1
Added Dynamic Performance @ RF = 30 MHz Parameters ...... 3
Changes to Local Oscillator (LO) Input Section........................ 15
Changes to Table 4.......................................................................... 24
Updated Outline Dimensions....................................................... 26
Changes to Ordering Guide .......................................................... 26
10/07—Revision 0: Initial Version
Rev. A | Page 2 of 28
Data Sheet
ADL5387
SPECIFICATIONS
VS = 5 V, TA = 25°C, fRF = 900 MHz, fIF = 4.5 MHz, PLO = 0 dBm, BIAS pin open, ZO = 50 Ω, unless otherwise noted, baseband outputs
differentially loaded with 450 Ω.
Table 1.
Parameter
Condition
Min
Typ
Max Unit
OPERATING CONDITIONS
LO Frequency Range
RF Frequency Range
LO INPUT
External input = 2xLO frequency
0.06
0.03
4
2
GHz
GHz
LOIP, LOIN
Input Return Loss
AC-coupled into LOIP with LOIN bypassed,
measured at 2 GHz
−10
0
dB
LO Input Level
−6
+6
dBm
I/Q BASEBAND OUTPUTS
Voltage Conversion Gain
QHI, QLO, IHI, ILO
450 Ω differential load on I and Q outputs
(@ 900 MHz)
200 Ω differential load on I and Q outputs
(@ 900 MHz)
4.3
3.2
dB
dB
Demodulation Bandwidth
Quadrature Phase Error
I/Q Amplitude Imbalance
Output DC Offset (Differential)
Output Common-Mode
0.1 dB Gain Flatness
Output Swing
1 V p-p signal 3 dB bandwidth
@ 900 MHz
240
0.4
0.1
5
VPOS − 2.8
40
2
MHz
Degrees
dB
mV
V
MHz
V p-p
mA
0 dBm LO input
Differential 200 Ω load
Each pin
Peak Output Current
POWER SUPPLIES
12
VPA, VPL, VPB, VPX
Voltage
4.75
5.25
V
Current
BIAS pin open
RBIAS = 4 kΩ
180
157
mA
mA
DYNAMIC PERFORMANCE @ RF = 30 MHz
Conversion Gain
Input P1dB (IP1dB)
Second-Order Input Intercept (IIP2)
Third-Order Input Intercept (IIP3)
I/Q Magnitude Imbalance
I/Q Phase Imbalance
RFIP, RFIN, L1, L2 = 680 nH, C10, C11 = 0.01 μF1
4.5
12
69
31
0.1
0.3
dB
dBm
dBm
dBm
dB
−5 dBm each input tone
−5 dBm each input tone
Degrees
DYNAMIC PERFORMANCE @ RF = 140 MHz
Conversion Gain
Input P1dB (IP1dB)
Second-Order Input Intercept (IIP2)
Third-Order Input Intercept (IIP3)
LO to RF
RFIP, RFIN
4.7
13
67
31
−100
dB
dBm
dBm
dBm
dBm
−5 dBm each input tone
−5 dBm each input tone
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the RF port
RF to LO
LOIN, LOIP terminated in 50 Ω
−95
0.05
0.2
dBc
dB
Degrees
dBm
I/Q Magnitude Imbalance
I/Q Phase Imbalance
LO to I/Q
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the BB port
−39
Noise Figure
Noise Figure under Blocking Conditions
12.0
14.4
dB
dB
With a −5 dBm interferer 5 MHz away
Rev. A | Page 3 of 28
ADL5387
Data Sheet
Parameter
Condition
Min Typ
Max Unit
DYNAMIC PERFORMANCE @ RF = 450 MHz
Conversion Gain
4.4
dB
Input P1dB (IP1dB)
12.7
69.2
32.8
−87
dBm
dBm
dBm
dBm
Second-Order Input Intercept (IIP2)
Third-Order Input Intercept (IIP3)
LO to RF
−5 dBm each input tone
−5 dBm each input tone
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the RF port
RF to LO
LOIN, LOIP terminated in 50 Ω
−90
0.05
0.6
dBc
dB
Degrees
dBm
I/Q Magnitude Imbalance
I/Q Phase Imbalance
LO to I/Q
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the BB port
−38
Noise Figure
13.2
dB
DYNAMIC PERFORMANCE @ RF = 900 MHz
Conversion Gain
4.3
dB
Input P1dB (IP1dB)
12.8
61.7
31.2
−79
dBm
dBm
dBm
dBm
Second-Order Input Intercept (IIP2)
Third-Order Input Intercept (IIP3)
LO to RF
−5 dBm each input tone
−5 dBm each input tone
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the RF port
RF to LO
LOIN, LOIP terminated in 50 Ω
−88
0.05
0.2
dBc
dB
Degrees
dBm
I/Q Magnitude Imbalance
I/Q Phase Imbalance
LO to I/Q
RFIN, RFIP terminated in 50 Ω,
1XLO appearing at the BB port
−41
Noise Figure
Noise Figure under Blocking Conditions
DYNAMIC PERFORMANCE @ RF = 1900 MHz
14.7
15.8
dB
dB
With a −5 dBm interferer 5 MHz away
Conversion Gain
3.8
dB
Input P1dB (IP1dB)
12.8
59.8
27.4
−75
dBm
dBm
dBm
dBm
Second-Order Input Intercept (IIP2)
Third-Order Input Intercept (IIP3)
LO to RF
−5 dBm each input tone
−5 dBm each input tone
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the RF port
RF to LO
LOIN, LOIP terminated in 50 Ω
−70
0.05
0.3
dBc
dB
Degrees
dBm
I/Q Magnitude Imbalance
I/Q Phase Imbalance
LO to I/Q
RFIN, RFIP terminated in 50 Ω, 1xLO
appearing at the BB port
−43
Noise Figure
Noise Figure under Blocking Conditions
16.5
18.7
dB
dB
With a −5 dBm interferer 5 MHz away
1 See Figure 63 for locations of L1, L2, C10, and C11.
Rev. A | Page 4 of 28
Data Sheet
ADL5387
ABSOLUTE MAXIMUM RATINGS
ESD CAUTION
Table 2.
Parameter
Rating
Supply Voltage VPOS1, VPOS2, VPOS3
LO Input Power
5.5 V
13 dBm (re: 50 Ω)
15 dBm (re: 50 Ω)
1100 mW
RF/IF Input Power
Internal Maximum Power Dissipation
θJA
54°C/W
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
150°C
−40°C to +85°C
−65°C to +125°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 5 of 28
ADL5387
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VPA 1
COM 2
BIAS 3
VPL 4
VPL 5
VPL 6
18 VPB
17 VPB
16 QHI
15 QLO
14 IHI
ADL5387
TOP VIEW
(Not to Scale)
13 ILO
NOTES
1. CONNECT THE EXPOSED PADDLE TO A
LOW IMPEDANCE GROUND PLANE.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 4 to 6,
17 to 19
VPA, VPL, VPB, VPX Supply. Positive supply for LO, IF, biasing and baseband sections, respectively. These pins should
be decoupled to board ground using appropriate sized capacitors.
2, 7, 10 to 12, COM, CML, CMRF
20, 23, 24
Ground. Connect to a low impedance ground plane.
3
BIAS
Bias Control. A resistor can be connected between BIAS and COM to reduce the mixer core current.
The default setting for this pin is open.
8, 9
LOIP, LOIN
Local Oscillator. External LO input is at 2xLO frequency. A single-ended LO at 0 dBm can be applied
through a 1000 pF capacitor to LOIP. LOIN should be ac-grounded, also using a 1000 pF. These inputs
can also be driven differentially through a balun (recommended balun is M/A-COM ETC1-1-13).
13 to 16
21, 22
ILO, IHI, QLO, QHI
RFIN, RFIP
EP
I-Channel and Q-Channel Mixer Baseband Outputs. These outputs have a 50 Ω differential output
impedance (25 Ω per pin). The bias level on these pins is equal to VPOS − 2.8 V. Each output pair can
swing 2 V p-p (differential) into a load of 200 Ω. Output 3 dB bandwidth is 240 MHz.
RF Input. A single-ended 50 Ω signal can be applied to the RF inputs through a 1:1 balun (recommended
balun is M/A-COM ETC1-1-13). Ground-referenced inductors must also be connected to RFIP and
RFIN (recommended values = 120 nH).
Exposed Paddle. Connect to a low impedance ground plane.
Rev. A | Page 6 of 28
Data Sheet
ADL5387
TYPICAL PERFORMANCE CHARACTERISTICS
VS = 5 V, TA = 25°C, LO drive level = 0 dBm, RBIAS = open, unless otherwise noted.
20
15
10
5
5
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
NORMALIZED TO 1MHz
0
–5
INPUT P1dB
–10
–15
–20
–25
–30
GAIN
0
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
1
10
100
1000
BB FREQUENCY (MHz)
Figure 3. Conversion Gain and Input 1 dB Compression Point (IP1dB) vs.
RF Frequency
Figure 6. Normalized I/Q Baseband Frequency Response
80
19
17
15
13
11
9
I CHANNEL
Q CHANNEL
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= +85°C
= +25°C
= –40°C
A
A
A
A
A
A
70
60
50
40
30
20
10
INPUT IP2
INPUT IP3
(I AND Q CHANNELS)
7
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
Figure 4. Input Third-Order Intercept (IIP3) and
Figure 7. Noise Figure vs. RF Frequency
Input Second-Order Intercept Point (IIP2) vs. RF Frequency
2.0
1.5
4
3
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
1.0
2
0.5
1
0
0
–0.5
–1.0
–1.5
–2.0
–1
–2
–3
–4
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
Figure 5. I/Q Gain Mismatch vs. RF Frequency
Figure 8. I/Q Quadrature Phase Error vs. RF Frequency
Rev. A | Page 7 of 28
ADL5387
Data Sheet
20
80
65
50
35
20
20
15
10
5
80
INPUT IP2, Q CHANNEL
INPUT IP2, I CHANNEL
NOISE FIGURE
15
65
50
35
20
INPUT IP2, I CHANNEL
INPUT P1dB
INPUT P1dB
INPUT IP2, Q CHANNEL
10
5
NOISE FIGURE
GAIN
GAIN
INPUT IP3
INPUT IP3
0
0
–6 –5 –4 –3 –2 –1
0
1
2
3
4
5
6
–6 –5 –4 –3 –2 –1
0
1
2
3
4
5
6
LO LEVEL (dBm)
LO LEVEL (dBm)
Figure 9. Conversion Gain, Noise Figure, IIP3, IIP2, and IP1dB vs.
LO Level, fRF = 140 MHz
Figure 12. Conversion Gain, Noise Figure, IIP3, IIP2, and IP1dB vs.
LO Level, fRF = 900 MHz
32
195
185
175
165
155
145
135
32
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
28
24
20
16
12
8
28
24
20
16
12
8
INPUT IP3
INPUT IP3
SUPPLY
CURRENT
NOISE FIGURE
NOISE FIGURE
1
10
(kΩ)
100
1
10
(kΩ)
100
R
R
BIAS
BIAS
Figure 10. Noise Figure, IIP3, and Supply Current vs. RBIAS, fRF = 140 MHz
Figure 13. IIP3 and Noise Figure vs. RBIAS, fRF = 900 MHz
25
80
70
60
50
40
30
20
10
0
20
R
= 100kΩ
BIAS
140MHz: GAIN
R
= 10kΩ
BIAS
140MHz: IP1dB
15
10
5
140MHz: IIP2, I CHANNEL
140MHz: IIP2, Q CHANNEL
450MHz: GAIN
R
= 4kΩ
BIAS
450MHz: IP1dB
R
= 1.4kΩ
BIAS
450MHz: IIP2, I CHANNEL
450MHz: IIP2, Q CHANNEL
0
–30
–25
–20
–15
–10
–5
0
5
1
10
100
RF BLOCKER INPUT POWER (dBm)
R
(kΩ)
BIAS
Figure 11. Noise Figure vs. Input Blocker Level, fRF = 900 MHz
(RF Blocker 5 MHz Offset)
Figure 14. Conversion Gain, IP1dB, IIP2 I Channel, and IIP2 Q Channel vs. RBIAS
Rev. A | Page 8 of 28
Data Sheet
ADL5387
35
30
25
20
15
80
75
70
65
60
55
50
–20
–30
–40
–50
–60
–70
–80
–90
–100
IIP3
INPUT IP2,
I CHANNEL
INPUT IP2,
Q CHANNEL
1xLO
10
5
T
T
T
= –40°C
= +25°C
= +85°C
IP1dB
25
A
A
A
2xLO
0
5
10
15
20
30
35
40
45
50
0
200 400 600 800 1000 1200 1400 1600 1800 2000
INTERNAL 1xLO FREQUENCY (MHz)
BB FREQUENCY (MHz)
Figure 15. IIIP3, IIP2, IP1dB vs. Baseband Frequency
Figure 18. LO-to-RF Leakage vs. Internal 1xLO Frequency
0
–20
–40
–10
–20
–30
–40
–50
–60
–70
–80
–60
1xLO (INTERNAL)
–80
2xLO (EXTERNAL)
–100
–120
0
200 400 600 800 1000 1200 1400 1600 1800 2000
INTERNAL 1xLO FREQUENCY (MHz)
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
Figure 16. LO-to-BB Feedthrough vs. 1xLO Frequency (Internal LO Frequency)
Figure 19. RF-to-LO Leakage vs. RF Frequency
0
0
–5
–5
–10
–15
–20
–25
–10
–15
–20
–25
–30
0
200 400 600 800 1000 1200 1400 1600 1800 2000
RF FREQUENCY (MHz)
0
500
1000
1500
2000
2500
3000
3500
4000
FREQUENCY (MHz)
Figure 17. RF Port Return Loss vs. RF Frequency, Measured on
Characterization Board through ETC1-1-13 Balun with 120 nH Bias Inductors
Figure 20. Single-Ended LO Port Return Loss vs.
LO Frequency, LOIN AC-Coupled to Ground
Rev. A | Page 9 of 28
ADL5387
Data Sheet
DISTRIBUTIONS FOR fRF = 140 MHz
100
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
80
60
40
20
0
I CHANNEL
Q CHANNEL
28
29
30
31
32
33
60
65
70
75
INPUT IP3 (dBm)
INPUT IP2 (dBm)
Figure 21. IIP3 Distributions
Figure 24. IIP2 Distributions for I Channel and Q Channel
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
10
11
12
13
14
15
10.5
11.0
11.5
12.0
12.5
13.0
13.5
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 22. IP1dB Distributions
Figure 25. Noise Figure Distributions
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
–0.2
–0.1
0
0.1
0.2
–1.0
–0.5
0
0.5
1.0
I/Q GAIN MISMATCH (dB)
QUADRATURE PHASE ERROR (Degrees)
Figure 23. I/Q Gain Mismatch Distributions
Figure 26. I/Q Quadrature Error Distributions
Rev. A | Page 10 of 28
Data Sheet
ADL5387
DISTRIBUTIONS FOR fRF = 450 MHz
100
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
80
60
40
20
0
I CHANNEL
Q CHANNEL
30
31
32
33
34
35
60
65
70
75
INPUT IP3 (dBm)
INPUT IP2 (dBm)
Figure 27. IIP3 Distributions
Figure 30. IIP2 Distributions for I Channel and Q Channel
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
10
11
12
13
14
15
12.0
12.5
13.0
13.5
14.0
14.5
15.0
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 28. IP1dB Distributions
Figure 31. Noise Figure Distributions
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
–0.2
–0.1
0
0.1
0.2
–1.0
–0.5
0
0.5
1.0
I/Q GAIN MISMATCH (dB)
QUADRATURE PHASE ERROR (Degrees)
Figure 29. I/Q Gain Mismatch Distributions
Figure 32. I/Q Quadrature Error Distributions
Rev. A | Page 11 of 28
ADL5387
Data Sheet
DISTRIBUTIONS FOR fRF = 900 MHz
100
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
80
60
40
20
0
I CHANNEL
Q CHANNEL
30
31
32
33
34
35
55
60
65
70
75
INPUT IP3 (dBm)
INPUT IP2 (dBm)
Figure 33. IIP3 Distributions
Figure 36. IIP2 Distributions for I Channel and Q Channel
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
10
11
12
13
14
15
13.0
13.5
14.0
14.5
15.0
15.5
16.0
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 34. IP1dB Distributions
Figure 37. Noise Figure Distributions
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
–0.2
–0.1
0
0.1
0.2
–1.0
–0.5
0
0.5
1.0
I/Q GAIN MISMATCH (dB)
QUADRATURE PHASE ERROR (Degrees)
Figure 35. I/Q Gain Mismatch Distributions
Figure 38. I/Q Quadrature Error Distributions
Rev. A | Page 12 of 28
Data Sheet
ADL5387
DISTRIBUTIONS FOR fRF = 1900 MHz
100
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
I CHANNEL
Q CHANNEL
26
27
28
29
30
31
52
54
56
58
60
62
64
66
68
18.0
1.0
INPUT IP3 (dBm)
INPUT IP2 (dBm)
Figure 39. IIP3 Distributions
Figure 42. IIP2 Distributions for I Channel and Q Channel
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
10
11
12
13
14
15
15.0
15.5
16.0
16.5
17.0
17.5
INPUT P1dB (dBm)
NOISE FIGURE (dB)
Figure 40. IP1dB Distributions
Figure 43. Noise Figure Distributions
100
80
60
40
20
0
100
80
60
40
20
0
T
T
T
= –40°C
= +25°C
= +85°C
T
T
T
= –40°C
= +25°C
= +85°C
A
A
A
A
A
A
–0.2
–0.1
0
0.1
0.2
–1.0
–0.5
0
0.5
I/Q GAIN MISMATCH (dB)
QUADRATURE PHASE ERROR (Degrees)
Figure 41. I/Q Gain Mismatch Distributions
Figure 44. I/Q Quadrature Error Distributions
Rev. A | Page 13 of 28
ADL5387
Data Sheet
CIRCUIT DESCRIPTION
The ADL5387 can be divided into five sections: the local
oscillator (LO) interface, the RF voltage-to-current (V-to-I)
converter, the mixers, the differential emitter follower outputs,
and the bias circuit. A detailed block diagram of the device is
shown in Figure 45.
V-TO-I CONVERTER
The differential RF input signal is applied to a resistively
degenerated common base stage, which converts the differential
input voltage to output currents. The output currents then
modulate the two half-frequency LO carriers in the mixer stage.
BIAS
MIXERS
The ADL5387 has two double-balanced mixers: one for the
in-phase channel (I channel) and one for the quadrature channel
(Q channel). These mixers are based on the Gilbert cell design
of four cross-connected transistors. The output currents from
the two mixers are summed together in the resistive loads that
then feed into the subsequent emitter follower buffers.
IHI
ILO
LOIP
RFIP
DIVIDE-BY-TWO
EMITTER FOLLOWER BUFFERS
QUADRATURE
PHASE SPLITTER
RFIN
The output emitter followers drive the differential I and Q
signals off-chip. The output impedance is set by on-chip 25 Ω
series resistors that yield a 50 Ω differential output impedance
for each baseband port. The fixed output impedance forms a
voltage divider with the load impedance that reduces the effective
gain. For example, a 500 Ω differential load has 1 dB lower
effective gain than a high (10 kΩ) differential load impedance.
LOIN
QHI
QLO
Figure 45. Block Diagram
BIAS CIRCUIT
The LO interface generates two LO signals at 90° of phase
difference to drive two mixers in quadrature. RF signals are
converted into currents by the V-to-I converters that feed into
the two mixers. The differential I and Q outputs of the mixers
are buffered via emitter followers. Reference currents to each
section are generated by the bias circuit. A detailed description
of each section follows.
A band gap reference circuit generates the proportional-to-
absolute temperature (PTAT) as well as temperature-independent
reference currents used by different sections. The mixer current
can be reduced via an external resistor between the BIAS pin
and ground. When the BIAS pin is open, the mixer runs at
maximum current and hence the greatest dynamic range. The
mixer current can be reduced by placing a resistance to ground;
therefore, reducing overall power consumption, noise figure,
and IIP3. The effect on each of these parameters is shown in
Figure 10, Figure 13, and Figure 14.
LO INTERFACE
The LO interface consists of a buffer amplifier followed by a
frequency divider that generate two carriers at half the input
frequency and in quadrature with each other. Each carrier is
then amplified and amplitude-limited to drive the double-
balanced mixers.
Rev. A | Page 14 of 28
Data Sheet
ADL5387
APPLICATIONS INFORMATION
BASIC CONNECTIONS
Figure 47 shows the basic connections schematic for the ADL5387.
8
9
LOIP
LOIN
LO INPUT
1000pF
POWER SUPPLY
1000pF
The nominal voltage supply for the ADL5387 is 5 V and is
applied to the VPA, VPB, VPL, and VPX pins. Ground should
be connected to the COM, CML, and CMRF pins. Each of
the supply pins should be decoupled using two capacitors;
recommended capacitor values are 100 pF and 0.1 µF.
Figure 46. Single-Ended LO Drive
The recommended LO drive level is between −6 dBm and
+6 dBm. For operation below 50 MHz, a minimum LO drive
level of 0 dBm should be used. The LO frequency at the input to
the device should be twice that of the desired LO frequency at
the mixer core. The applied LO frequency range is between
60 MHz and 4 GHz.
LOCAL OSCILLATOR (LO) INPUT
The LO port is driven in a single-ended manner. The LO signal
must be ac-coupled via a 1000 pF capacitor directly into LOIP,
and LOIN is ac-coupled to ground also using a 1000 pF capacitor.
The LO port is designed for a broadband 50 Ω match and
therefore exhibits excellent return loss from 60 MHz to 4 GHz.
The LO return loss can be seen in Figure 20. Figure 46 shows
the LO input configuration.
ETC1-1-13
RFC
120nH
120nH
1000pF 1000pF
V
POS
24
23
22
21
20
19
V
1 VPA
VPB 18
POS
0.1µF
100pF
100pF
0.1µF
2 COM
3 BIAS
4 VPL
5 VPL
6 VPL
VPB 17
QHI 16
QLO15
IHI 14
QHI
QLO
ADL5387
V
POS
0.1µF
IHI
ILO
100pF
ILO13
7
8
9
10
11
12
1000pF
LO
1000pF
Figure 47. Basic Connections Schematic for ADL5387
Rev. A | Page 15 of 28
ADL5387
Data Sheet
The differential RF port return loss has been characterized as
shown in Figure 49.
RF INPUT
The RF inputs have a differential input impedance of
–10
approximately 50 Ω. For optimum performance, the RF port
should be driven differentially through a balun. The recommended
balun is M/A-COM ETC1-1-13. The RF inputs to the device
should be ac-coupled with 1000 pF capacitors. Ground-referenced
choke inductors must also be connected to RFIP and RFIN
(recommended value = 120 nH, Coilcraft 0402CS-R12XJL) for
appropriate biasing. Several important aspects must be taken
into account when selecting an appropriate choke inductor for
this application. First, the inductor must be able to handle the
approximately 40 mA of standing dc current being delivered
from each of the RF input pins (RFIP, RFIN). (The suggested
0402 inductor has a 50 mA current rating). The purpose of the
choke inductors is to provide a very low resistance dc path to
ground and high ac impedance at the RF frequency so as not to
affect the RF input impedance. A choke inductor that has a self-
resonant frequency greater than the RF input frequency ensures
that the choke is still looking inductive and therefore has a more
predictable ac impedance (jωL) at the RF frequency. Figure 48
shows the RF input configuration.
–12
–14
–16
–18
–20
–22
–24
–26
–28
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
FREQUENCY (GHz)
Figure 49. Differential RF Port Return Loss
BASEBAND OUTPUTS
The baseband outputs QHI, QLO, IHI, and ILO are fixed
impedance ports. Each baseband pair has a 50 Ω differential
output impedance. The outputs can be presented with differential
loads as low as 200 Ω (with some degradation in linearity and
gain) or high impedance differential loads (500 Ω or greater
impedance yields the same excellent linearity) that is typical of
an ADC. The TCM9-1 9:1 balun converts the differential IF
output to single-ended. When loaded with 50 Ω, this balun
presents a 450 Ω load to the device. The typical maximum
linear voltage swing for these outputs is 2 V p-p differential.
The bias level on these pins is equal to VPOS − 2.8 V. The
output 3 dB bandwidth is 240 MHz. Figure 50 shows the
baseband output configuration.
120nH
21
22
RFIN
RFIP
1000pF
1000pF
ETC1-1-13
RF INPUT
120nH
Figure 48. RF Input
16
QHI
QLO
IHI
QHI
QLO
IHI
15
14
13
ILO
ILO
Figure 50. Baseband Output Configuration
Rev. A | Page 16 of 28
Data Sheet
ADL5387
Figure 52 shows the EVM performance of the ADL5387 when
ac-coupled, with an IEEE 802.16e WiMAX signal.
ERROR VECTOR MAGNITUDE (EVM)
PERFORMANCE
0
EVM is a measure used to quantify the performance of a digital
radio transmitter or receiver. A signal received by a receiver
would have all constellation points at the ideal locations; however,
various imperfections in the implementation (such as carrier
leakage, phase noise, and quadrature error) cause the actual
constellation points to deviate from the ideal locations.
–5
–10
–15
–20
–25
–30
–35
–40
–45
–50
The ADL5387 shows excellent EVM performance for various
modulation schemes. Figure 51 shows typical EVM performance
over input power range for a point-to-point application with
16 QAM modulation schemes and zero-IF baseband. The
differential dc offsets on the ADL5387 are in the order of a
few mV. However, ac coupling the baseband outputs with 10 µF
capacitors helps to eliminate dc offsets and enhances EVM
performance. With a 10 MHz BW signal, 10 µF ac coupling
capacitors with the 500 Ω differential load results in a high-pass
corner frequency of ~64 Hz which absorbs an insignificant
amount of modulated signal energy from the baseband signal.
By using ac coupling capacitors at the baseband outputs, the dc
offset effects, which can limit dynamic range at low input power
levels, can be eliminated.
–50
–40
–30
–20
–10
0
10
20
INPUT POWER (dBm)
Figure 52. RF = 750 MHz MHz, IF = 0 Hz, EVM vs. Input Power for a 16 QAM
10 MHz Bandwidth Mobile WiMAX Signal (AC-Coupled Baseband Outputs)
Figure 53 exhibits the zero IF EVM performance of a WCDMA
signal over a wide RF input power range.
0
–5
–10
–15
–20
–25
–30
–35
–40
–45
0
–5
–10
–15
–20
–25
–30
–35
–40
–45
–50
–70
–60
–50
–40
–30
–20
–10
0
10
INPUT POWER (dBm)
Figure 53. RF = 1950 MHz, IF = 0 Hz, EVM vs. Input Power for a WCDMA
(AC-Coupled Baseband Outputs)
–70
–60
–50
–40
–30
–20
–10
0
10
INPUT POWER (dBm)
Figure 51. RF = 140 MHz, IF = 0 Hz, EVM vs. Input Power for a 16 QAM
10 Msym/s Signal (AC-Coupled Baseband Outputs)
Rev. A | Page 17 of 28
ADL5387
Data Sheet
COSωLOt
0°
ωIF
ωIF
0
0
+
+
ωIF
–
ωIF
0
+ωIF
–90°
+90°
ωLSB ωLO ωUSB
0°
ωIF
–ωIF
0
+ωIF
SINωLO
t
Figure 54. Illustration of the Image Problem
LOW IF IMAGE REJECTION
EXAMPLE BASEBAND INTERFACE
The image rejection ratio is the ratio of the intermediate
frequency (IF) signal level produced by the desired input
frequency to that produced by the image frequency. The image
rejection ratio is expressed in decibels. Appropriate image
rejection is critical because the image power can be much
higher than that of the desired signal, thereby plaguing the
down conversion process. Figure 54 illustrates the image
problem. If the upper sideband (lower sideband) is the desired
band, a 90° shift to the Q channel (I channel) cancels the image
at the lower sideband (upper sideband).
In most direct conversion receiver designs, it is desirable to
select a wanted carrier within a specified band. The desired
channel can be demodulated by tuning the LO to the appropriate
carrier frequency. If the desired RF band contains multiple
carriers of interest, the adjacent carriers would also be down
converted to a lower IF frequency. These adjacent carriers can
be problematic if they are large relative to the wanted carrier as
they can overdrive the baseband signal detection circuitry. As a
result, it is often necessary to insert a filter to provide sufficient
rejection of the adjacent carriers.
Figure 55 shows the excellent image rejection capabilities of the
ADL5387 for low IF applications, such as CDMA2000. The
ADL5387 exhibits image rejection greater than 45 dB over the
broad frequency range for an IF = 1.23 MHz.
0
It is necessary to consider the overall source and load impedance
presented by the ADL5387 and ADC input to design the filter
network. The differential baseband output impedance of the
ADL5387 is 50 Ω. The ADL5387 is designed to drive a high
impedance ADC input. It may be desirable to terminate the
ADC input down to lower impedance by using a terminating
resistor, such as 500 Ω. The terminating resistor helps to better
define the input impedance at the ADC input. The order and
type of filter network depends on the desired high frequency
rejection required, pass-band ripple, and group delay. Filter
design tables provide outlines for various filter types and orders,
illustrating the normalized inductor and capacitor values for a
1 Hz cutoff frequency and 1 Ω load. After scaling the normalized
prototype element values by the actual desired cut-off frequency
and load impedance, the series reactance elements are halved to
realize the final balanced filter network component values.
–10
–20
–30
–40
–50
–60
–70
50
250 450 650 850 1050 1250 1450 1650 1850
RF INPUT FREQUENCY (MHz)
Figure 55. Image Rejection vs.
RF Input Frequency for a CDMA2000 Signal, IF = 1.23 MHz
Rev. A | Page 18 of 28
Data Sheet
ADL5387
As an example, a second-order, Butterworth, low-pass filter
design is shown in Figure 56 where the differential load impedance
is 500 Ω, and the source impedance of the ADL5387 is 50 Ω.
The normalized series inductor value for the 10-to-1, load-to-
source impedance ratio is 0.074 H, and the normalized shunt
capacitor is 14.814 F. For a 10.9 MHz cutoff frequency, the
single-ended equivalent circuit consists of a 0.54 µH series
inductor followed by a 433 pF shunt capacitor.
Figure 57 and Figure 58 show the measured frequency response
and group delay of the filter.
10
5
0
–5
The balanced configuration is realized as the 0.54 µH inductor
is split in half to realize the network shown in Figure 56.
–10
–15
–20
R
= 50Ω
L
= 0.074H
S
N
NORMALIZED
SINGLE-ENDED
CONFIGURATION
V
C
14.814F
R = 500Ω
S
N
L
R
R
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
S
L
fC = 1Hz
= 0.1
FREQUENCY (MHz)
R
= 50Ω
0.54µH
S
Figure 57. Baseband Filter Response
DENORMALIZED
SINGLE-ENDED
EQUIVALENT
900
800
700
600
500
400
300
200
100
V
V
433pF
433pF
R = 500Ω
S
L
fC = 10.9MHz
R
2
S
= 25Ω
= 25Ω
0.27µH
R
2
L
= 250Ω
= 250Ω
BALANCED
CONFIGURATION
S
R
L
2
R
0.27µH
S
2
Figure 56. Second-Order, Butterworth, Low-Pass Filter Design Example
A complete design example is shown in Figure 59. A sixth-order
Butterworth differential filter having a 1.9 MHz corner frequency
interfaces the output of the ADL5387 to that of an ADC input.
The 500 Ω load resistor defines the input impedance of the
ADC. The filter adheres to typical direct conversion WCDMA
applications, where 1.92 MHz away from the carrier IF frequency,
1 dB of rejection is desired and 2.7 MHz away 10 dB of rejection
is desired.
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
FREQUENCY (MHz)
Figure 58. Baseband Filter Group Delay
Rev. A | Page 19 of 28
ADL5387
Data Sheet
ETC1-1-13
RFC
120nH
120nH
1000pF 1000pF
C
AC
10µF
27µH
27µH
10µH
V
POS
24
23
22
21
20
19
C
AC
10µF
V
1 VPA
VPB 18
VPB 17
QHI 16
QLO15
IHI 14
POS
0.1µF
100pF
100pF
0.1µF
27µH
27µH
10µH
2 COM
3 BIAS
4 VPL
5 VPL
6 VPL
ADL5387
V
POS
0.1µF
100pF
ILO13
C
AC
10µF
27µH
27µH
10µH
7
8
9
10
11
12
C
AC
10µF
1000pF
LO
1000pF
27µH
27µH
10µH
Figure 59. Sixth Order Low-Pass Butterworth Baseband Filter Schematic
Rev. A | Page 20 of 28
Data Sheet
ADL5387
CHARACTERIZATION SETUPS
Figure 60 to Figure 62 show the general characterization bench
setups used extensively for the ADL5387. The setup shown in
Figure 62 was used to do the bulk of the testing and used sinusoidal
signals on both the LO and RF inputs. An automated Agilent-
VEE program was used to control the equipment over the IEEE
bus. This setup was used to measure gain, IP1dB, IIP2, IIP3, I/Q
gain match, and quadrature error. The ADL5387 characterization
board had a 9-to-1 impedance transformer on each of the
differential baseband ports to do the differential-to-single-
ended conversion.
10 MHz. For the case where a blocker was applied, the output
blocker was at 15 MHz baseband frequency. Note that great care
must be taken when measuring NF in the presence of a blocker.
The RF blocker generator must be filtered to prevent its noise
(which increases with increasing generator output power) from
swamping the noise contribution of the ADL5387. At least
30 dB of attention at the RF and image frequencies is desired.
For example, with a 2xLO of 1848 MHz applied to the ADL5387,
the internal 1xLO is 924 MHz. To obtain a 15 MHz output
blocker signal, the RF blocker generator is set to 939 MHz and
the filters tuned such that there is at least 30 dB of attenuation
from the generator at both the desired RF frequency (934 MHz)
and the image RF frequency (914 MHz). Finally, the blocker
must be removed from the output (by the 10 MHz low-pass
filter) to prevent the blocker from swamping the analyzer.
The two setups shown in Figure 60 and Figure 61 were used
for making NF measurements. Figure 60 shows the setup for
measuring NF with no blocker signal applied while Figure 61
was used to measure NF in the presence of a blocker. For both
setups, the noise was measured at a baseband frequency of
SNS
CONTROL
AGILENT N8974A
NOISE FIGURE ANALYZER
OUTPUT
R1
50Ω
RF
Q
GND
ADL5387
CHAR BOARD
V
POS
I
LO
HP 6235A
POWER SUPPLY
INPUT
LOW-PASS
FILTER
AGILENT 8665B
SIGNAL GENERATOR
IEEE
PC CONTROLLER
Figure 60. General Noise Figure Measurement Setup
Rev. A | Page 21 of 28
ADL5387
Data Sheet
BAND-PASS
TUNABLE FILTER
BAND-REJECT
TUNABLE FILTER
R&S SMT03
SIGNAL GENERATOR
R&S FSEA30
SPECTRUM ANALYZER
R1
50Ω
RF
Q
I
GND
ADL5387
LOW-PASS
FILTER
6dB PAD
CHAR BOARD
V
POS
LO
HP 6235A
POWER SUPPLY
BAND-PASS
CAVITY FILTER
HP87405
LOW NOISE
PREAMP
AGILENT 8665B
SIGNAL GENERATOR
Figure 61. Measurement Setup for Noise Figure in the Presence of a Blocker
3dB PAD
RF
AMPLIFIER
IN
OUT
3dB PAD
3dB PAD
RF
VP GND
AGILENT
11636A
3dB PAD
R&S SMT-06
RF
R&S SMT-06
RF
Q
I
6dB PAD
GND
SWITCH
MATRIX
ADL5387
CHAR BOARD
V
POS
6dB PAD
LO
AGILENT E3631
PWER SUPPLY
RF
INPUT
AGILENT E8257D
SIGNAL GENERATOR
IEEE
IEEE
R&S FSEA30
SPECTRUM ANALYZER
HP 8508A
VECTOR VOLTMETER
PC CONTROLLER
Figure 62. General ADL5387 Characterization Setup
Rev. A | Page 22 of 28
Data Sheet
ADL5387
EVALUATION BOARD
The ADL5387 evaluation board is available. The board can be
used for single-ended or differential baseband analysis. The default
configuration of the board is for single-ended baseband analysis.
T1
RFC
C11
C10
L2
24
L1
19
R8
R7
V
POS
23
22
21
20
R1
R6
V
1 VPA
VPB 18
POS
C1
C2
C8
C9
2 COM
3 BIAS
4 VPL
5 VPL
6 VPL
VPB 17
QHI 16
QLO15
IHI 14
R2
R9
Q OUTPUT OR QHI
R14
R15
T2
ADL5387
C12
R3
V
POS
R16
C3
C4
QLO
ILO13
R10
R11
7
8
9
10
11
12
I OUTPUT OR IHI
R4
R5
T3
C13
C5
R13
ILO
C6
R17
C7
T4
R12
LO
Figure 63. Evaluation Board Schematic
Rev. A | Page 23 of 28
ADL5387
Data Sheet
Table 4. Evaluation Board Configuration Options
Component Function
Default Condition
VPOS, GND
R1, R3, R6
Power Supply and Ground Vector Pins.
Not Applicable
Power Supply Decoupling. Shorts or power supply decoupling resistors.
The capacitors provide the required dc coupling up to 2 GHz.
R1, R3, R6 = 0 Ω (0805)
C1, C2, C3,
C4, C8, C9
C2, C4, C8 = 100 pF (0402)
C1, C3, C9 = 0.1 µF (0603)
C5, C6, C7,
C10, C11
AC Coupling Capacitors. These capacitors provide the required ac coupling from
50 MHz to 2 GHz. For operation down to 30 MHz, C10 and C11 should be changed to
0.01 µF.
C5, C6, C10, C11 = 1000 pF (0402),
C7 = Open
R4, R5,
R9 to R16
Single-Ended Baseband Output Path. This is the default configuration of the evaluation
board. R14 to R16 and R4, R5, and R13 are populated for appropriate balun interface.
R9, R10 and R11, R12 are not populated. Baseband outputs are taken from QHI and IHI.
R4, R5, R13 to R16 = 0 Ω (0402),
R9 to R12 = Open
The user can reconfigure the board to use full differential baseband outputs. R9 to R12
provide a means to bypass the 9:1 TCM9-1 transformer to allow for differential baseband
outputs. Access the differential baseband signals by populating R9 to R12 with 0 Ω and
not populating R4, R5, R13 to R16. This way the transformer does not need to be removed.
The baseband outputs are taken from the SMAs of Q_HI, Q_LO, I_HI, and I_LO.
L1, L2,
R7, R8
Input Biasing. Inductance and resistance sets the input biasing of the common base
input stage. Default value is 120 nH for operation above 50 MHz. For operation down to
30 MHz, L1 and L2 should be changed to 680 nH.
L1, L2 = 120 nH (0402)
R7, R8 = 0 Ω (0402)
T2, T3
IF Output Interface. TCM9-1 converts a differential high impedance IF output to a single- T2, T3 = TCM9-1, 9:1 (Mini-Circuits)
ended output. When loaded with 50 Ω, this balun presents a 450 Ω load to the device.
The center tap can be decoupled through a capacitor to ground.
C12, C13
R17
Decoupling Capacitors. C12 and C13 are the decoupling capacitors used to reject noise
on the center tap of the TCM9-1.
C12, C13 = 0.1 µF (0402)
LO Input Interface. The LO is driven as a single-ended signal. Although, there is no
performance change for a differential signal drive, the option is available by placing a
transformer (T4, ETC1-1-13) on the LO input path.
R17 = 0 Ω (0402)
T1
R2
RF Input Interface. ETC1-1-13 is a 1:1 RF balun that converts the single-ended RF input
to differential signal.
T1 = ETC1-1-13, 1:1 (M/A COM)
R2 = Open
RBIAS. Optional bias setting resistor. See the Bias Circuit section to see how to use this feature.
Rev. A | Page 24 of 28
Data Sheet
ADL5387
Figure 66. Evaluation Board Bottom Layer
Figure 64. Evaluation Board Top Layer
Figure 67. Evaluation Board Bottom Layer Silkscreen
Figure 65. Evaluation Board Top Layer Silkscreen
Rev. A | Page 25 of 28
ADL5387
Data Sheet
OUTLINE DIMENSIONS
4.10
4.00 SQ
3.90
0.60 MAX
2.50 REF
0.60 MAX
PIN 1
INDICATOR
19
18
24
1
0.50
BSC
PIN 1
INDICATOR
2.45
2.30 SQ
2.15
3.75 BSC
SQ
EXPOSED
PAD
6
13
12
7
0.50
0.40
0.30
0.25 MIN
BOTTOM VIEW
TOP VIEW
0.80 MAX
0.65 TYP
12° MAX
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
1.00
0.85
0.80
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
0.30
0.23
0.18
SEATING
PLANE
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2
Figure 68. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-24-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
ADL5387ACPZ-R2
ADL5387ACPZ-R7
ADL5387ACPZ-WP
ADL5387-EVALZ
Temperature Range
–40°C to +85°C
–40°C to +85°C
Package Description
Package Option
CP-24-2
CP-24-2
Ordering Quantity
24-Lead LFCSP_VQ
250
1,500
64
24-Lead LFCSP_VQ, 7”Tape and Reel
24-Lead LFCSP_VQ, Waffle Pack
Evaluation Board
–40°C to +85°C
CP-24-2
1 Z = RoHS Compliant Part.
Rev. A | Page 26 of 28
Data Sheet
NOTES
ADL5387
Rev. A | Page 27 of 28
ADL5387
NOTES
Data Sheet
©2007–2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06764-0-5/13(A)
Rev. A | Page 28 of 28
相关型号：
ADL5390ACPZ-REEL7
SPECIALTY TELECOM CIRCUIT, QCC24, 4 X 4 MM, LEAD FREE, MO-220-VGGD-2, LFCSP-24
ROCHESTER
ADL5390ACPZ-WP
SPECIALTY TELECOM CIRCUIT, QCC24, 4 X 4 MM, LEAD FREE, MO-220-VGGD-2, LFCSP-24
ROCHESTER
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