ADIS16IMU2/PCBZ [ADI]

Compact, Precision Six Degrees of Freedom Inertial Sensor;
ADIS16IMU2/PCBZ
型号: ADIS16IMU2/PCBZ
厂家: ADI    ADI
描述:

Compact, Precision Six Degrees of Freedom Inertial Sensor

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Compact, Precision Six Degrees of  
Freedom Inertial Sensor  
ADIS16446  
Data Sheet  
FEATURES  
GENERAL DESCRIPTION  
Triaxial digital gyroscope with digital range scaling  
2ꢀ0°/sec, ꢀ00°/sec, 1000°/sec settings  
Axis to axis misalignment: 0.0ꢀ°  
Triaxial digital accelerometer dynamic range: 18 g minimum  
Autonomous operation and data collection  
No external configuration commands required  
20ꢀ ms typical power-on start-up time  
Factory calibrated sensitivity, bias, and axial alignment  
Calibration temperature range: −40°C to +8ꢀ°C  
SPI-compatible  
Optional burst read sequence for fast data transfer  
Embedded temperature sensor  
The ADIS16446 iSensor® device is a complete inertial system  
that includes a triaxial gyroscope, a triaxial accelerometer, and a  
temperature sensor. Each sensor in the ADIS16446 combines  
industry-leading iMEMS® technology with signal conditioning  
that optimizes dynamic performance. The factory calibration  
characterizes each sensor for sensitivity, bias, and alignment.  
As a result, each sensor has its own dynamic compensation  
formulas that provide accurate sensor measurements.  
The ADIS16446 provides a simple, cost-effective method for  
integrating accurate multiaxis inertial sensing into industrial  
systems, especially when compared with the complexity and  
investment associated with discrete designs. All necessary motion  
testing and calibration are part of the production process at the  
factory, greatly reducing system integration time. Tight orthogonal  
alignment simplifies inertial frame alignment in navigation systems.  
The serial peripheral interface (SPI) and register structures  
provide a simple interface for data collection and configuration  
control.  
Programmable operation and control  
Automatic and manual bias correction controls  
Bartlett window FIR length, number of taps  
Digital I/O: data ready, alarm indicator, general-purpose  
Alarms for condition monitoring  
Optional external sync input clock up to 1.1 kHz  
Single command self test  
Power supply voltage range: 3.1ꢀ V to 3.4ꢀ V  
2000 g mechanical shock survivability  
Operating temperature range: −40°C to +10ꢀ°C  
The ADIS16446 has a compatible pinout for systems that currently  
use other Analog Devices, Inc., inertial measurement unit (IMU)  
products, such as the ADIS16334, ADIS16485, or ADIS16448.  
The ADIS16446 is a 20-lead module that is 24.15 mm ×  
37.70 mm × 10.80 mm and has a standard connector interface.  
APPLICATIONS  
Platform stabilization and control  
Navigation  
Robotics  
FUNCTIONAL BLOCK DIAGRAM  
DIO1 DIO2 DIO3 DIO4/CLKIN RST  
VDD  
POWER  
MANAGEMENT  
SELF TEST  
I/O  
ALARMS  
GND  
TRIAXIAL  
GYROSCOPE  
OUTPUT  
DATA  
CS  
TRIAXIAL  
REGISTERS  
ACCELEROMETER  
SCLK  
DIN  
CALIBRATION  
CONTROLLLER  
AND  
SPI  
FILTERS  
TEMPERATURE  
VDD  
USER  
CONTROL  
REGISTERS  
DOUT  
CLOCK  
ADIS16446  
Figure 1.  
Rev. 0  
Document Feedback  
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
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Tel: 781.329.4700  
Technical Support  
©2021 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 
ADIS16446  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Product Identification................................................................ 14  
Self-Test Function ...................................................................... 14  
Status and Error Flags................................................................ 15  
Input and Output Configuration.................................................. 16  
Data Ready Indicator................................................................. 16  
General-Purpose Input and Output ........................................ 16  
Digital Processing Configuration................................................. 17  
Gyroscopes and Accelerometers .............................................. 17  
Input Clock Configuration ....................................................... 17  
Calibration....................................................................................... 18  
Gyroscopes.................................................................................. 18  
Accelerometers ........................................................................... 18  
Alarms.............................................................................................. 20  
Static Alarm Use......................................................................... 20  
Dynamic Alarm Use .................................................................. 20  
Alarm Reporting ........................................................................ 20  
Applications Information.............................................................. 21  
Mounting Tips ............................................................................ 21  
Power Supply Considerations................................................... 21  
Evaluation Tools ......................................................................... 21  
X-Ray Sensitivity ........................................................................ 22  
Outline Dimensions....................................................................... 23  
Ordering Guide .......................................................................... 23  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagram .............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Timing Specifications .................................................................. 5  
Absolute Maximum Ratings............................................................ 6  
Thermal Resistance...................................................................... 6  
ESD Caution.................................................................................. 6  
Pin Configuration and Function Descriptions............................. 7  
Typical Performance Characteristics ............................................. 8  
Theory of Operation ........................................................................ 9  
Device Operation ......................................................................... 9  
Reading Sensor Data.................................................................. 10  
Device Configuration ................................................................ 10  
User Registers.................................................................................. 11  
Output Data Registers.................................................................... 12  
Gyroscopes .................................................................................. 12  
Accelerometers............................................................................ 12  
Internal Temperature ................................................................. 13  
System Functions............................................................................ 14  
Global Commands ..................................................................... 14  
REVISION HISTORY  
2/2021—Revision 0: Initial Version  
Rev. 0 | Page 2 of 23  
 
Data Sheet  
ADIS16446  
SPECIFICATIONS  
TA = 25°C, VDD = 3.3 V, angular rate = 0°/sec, and dynamic range = 1000°/sec 1 g, unless otherwise noted.  
Table 1.  
Parameter  
Test Conditions/Comments  
Min  
1000  
Typ  
1200  
0.04  
0.02  
0.01  
Max  
Unit  
GYROSCOPES  
Dynamic Range  
Initial Sensitivity  
°/sec  
1000°/sec, see Table 12  
500°/sec, see Table 12  
250°/sec, see Table 12  
−40°C ≤ TA ≤ +85°C  
°/sec/LSB  
°/sec/LSB  
°/sec/LSB  
%
Repeatability1  
1
Sensitivity Temperature Coefficient  
Misalignment  
−40°C ≤ TA ≤ +85°C  
Axis to axis  
40  
0.05  
0.5  
0.1  
0.5  
14.5  
0.66  
0.005  
0.015  
0.2  
0.27  
0.0135  
330  
ppm/°C  
Degrees  
Degrees  
% of FS  
°/sec  
Axis to frame (package)  
Best fit straight line  
−40°C ≤ TA ≤ +85°C, 1 σ  
1 σ, SMPL_PRD = 0x0001  
1 σ, SMPL_PRD = 0x0001  
−40°C ≤ TA ≤ +85°C  
Any axis, 1 σ  
−40°C ≤ TA ≤ +85°C  
1000°/sec range, no filtering  
f = 25 Hz, 1000°/sec range, no filtering  
Nonlinearity  
Bias Repeatability1, 2  
In-Run Bias Stability  
Angular Random Walk  
Bias Temperature Coefficient  
Linear Acceleration Effect on Bias  
Bias Supply Sensitivity  
Output Noise  
°/hr  
°/√hr  
°/sec/°C  
°/sec/g  
°/sec/V  
°/sec rms  
°/sec/√Hz rms  
Hz  
Rate Noise Density  
−3 dB Bandwidth  
Sensor Resonant Frequency  
ACCELEROMETERS  
Dynamic Range  
17.5  
kHz  
Each axis  
18  
g
Sensitivity  
See Table 16 for data format  
−40°C ≤ TA ≤ +85°C  
−40°C ≤ TA ≤ +85°C  
Axis to axis  
Axis to frame (package)  
Best fit straight line  
−40°C ≤ TA ≤ +85°C, 1 σ  
1 σ, SMPL_PRD = 0x0001  
1 σ, SMPL_PRD = 0x0001  
−40°C ≤ TA ≤ +85°C  
−40°C ≤ TA ≤ +85°C  
No filtering  
0.833  
mg/LSB  
%
Repeatability1  
1
Sensitivity Temperature Coefficient  
Misalignment  
40  
0.2  
0.5  
0.2  
20  
0.25  
0.11  
0.15  
5
ppm/°C  
Degrees  
Degrees  
% of FS  
mg  
Nonlinearity  
Bias Repeatability1, 2, 3  
In-Run Bias Stability  
Velocity Random Walk  
Bias Temperature Coefficient  
Bias Supply Sensitivity  
Output Noise  
mg  
m/sec/√hr  
mg/°C  
mg/V  
mg rms  
mg/√Hz rms  
Hz  
5.1  
Noise Density  
−3 dB Bandwidth  
Sensor Resonant Frequency  
TEMPERATURE  
No filtering  
0.23  
330  
5.5  
kHz  
Sensitivity  
Factory Calibration Temperature Range  
See Table 17  
0.07386  
°C/LSB  
°C  
−40  
+85  
Rev. 0 | Page 3 of 23  
 
 
ADIS16446  
Data Sheet  
Parameter  
LOGIC INPUTS4  
Test Conditions/Comments  
Min  
Typ  
Max  
Unit  
Input High Voltage, VIH  
Input Low Voltage, VIL  
Logic 1 Input Current, IIH  
Logic 0 Input Current, IIL  
2.0  
V
V
µA  
0.8  
10  
VIH = 3.3 V  
VIL = 0 V  
0.2  
All Pins Except  
40  
1
60  
µA  
mA  
pF  
RST  
Pin  
RST  
Input Capacitance, CIN  
DIGITAL OUTPUTS4  
10  
Output High Voltage, VOH  
Output Low Voltage, VOL  
FLASH MEMORY  
Source current (ISOURCE) = 1.6 mA  
Sink current (ISINK) = 1.6 mA  
Endurance5  
2.4  
V
V
0.4  
10,000  
20  
Cycles  
Years  
Data Retention6  
TJ = 85°C  
FUNCTIONAL TIMES7  
Time until new data is available  
Power-On Start-Up Time  
Reset Recovery Time8  
Flash Memory Back-Up Time  
Flash Memory Test Time  
Automatic Self-Test Time  
CONVERSION RATE  
205  
90  
75  
20  
45  
ms  
ms  
ms  
ms  
ms  
SMPL_PRD = 0x0001  
SMPL_PRD = 0x0001  
xGYRO_OUT and xACCL_OUT  
Clock Accuracy  
819.2  
SPS  
%
3
Optional External Sync Input Clock9  
POWER SUPPLY VOLTAGE RANGE  
Power Supply Current  
0.8  
1.1  
kHz  
V
mA  
VDD  
3.15  
3.3  
76  
3.45  
104  
1 The repeatability specifications represent analytical projections, which are based off of the following drift contributions and conditions: temperature hysteresis (−40°C  
to +85°C), electronics drift (high temperature operating life test: 85°C, 500 hours), drift from temperature cycling (JESD22, Method A104-C, Method N, 500 cycles,  
−40°C to +85°C), rate random walk (10 year projection), and broadband noise.  
2 Bias repeatability describes a long-term behavior, over a variety of conditions. Short-term repeatability is related to the in-run bias stability and noise density  
specifications.  
3 X-ray exposure may degrade this performance metric.  
4 The digital I/O signals are driven by an internal 3.3 V supply, and the inputs are 5 V tolerant.  
5 Endurance is qualified as per JEDEC Standard 22, Method A117, and measured at −40°C, +25°C, +85°C, and +125°C.  
6 The data retention lifetime equivalent is at TJ of 85°C as per JEDEC Standard 22, Method A117. Data retention lifetime decreases with junction temperature.  
7 These times do not include thermal settling and internal filter response times (330 Hz bandwidth), which may affect overall accuracy.  
8
RST  
The  
line must be held low for at least 10 µs to assure a proper reset and recovery sequence.  
9 The sync input clock functions below the specified minimum value but at reduced performance levels.  
Rev. 0 | Page 4 of 23  
Data Sheet  
ADIS16446  
TIMING SPECIFICATIONS  
TA = 25°C and VDD = 3.3 V, unless otherwise noted.  
Table 2.  
Normal Mode  
Burst Read  
Parameter  
fSCLK  
tSTALL  
tREADRATE  
tCS  
Description  
Serial clock  
Stall period between data  
Read rate  
Chip select to SCLK edge  
Min1 Typ Max Min1 Typ Max Unit  
0.01  
20  
2.0  
0.01  
N/A2  
1.0  
MHz  
μs  
40  
μs  
48.8  
48.8  
ns  
tDAV  
tDSU  
tDHD  
tSCLKR, tSCLKF  
tDR, tDF  
tSFS  
DOUT valid after SCLK edge  
DIN setup time before SCLK rising edge  
DIN hold time after SCLK rising edge  
SCLK rise and fall times, not shown in the Timing Diagrams section  
DOUT rise and fall times, not shown in the Timing Diagrams section  
100  
100  
ns  
ns  
ns  
ns  
ns  
ns  
μs  
μs  
μs  
μs  
24.4  
48.8  
24.4  
48.8  
5
5
12.5  
12.5  
5
5
12.5  
12.5  
high after SCLK edge  
5
5
CS  
t1  
tSTDR  
tNV  
Input sync positive pulse width  
Input sync to data ready valid transition  
Data invalid time  
25  
25  
600  
210  
600  
210  
t3  
Input sync period  
910  
910  
1 Guaranteed by design and characterization but not tested in production.  
2 When using the burst read function, the stall period is not applicable.  
Timing Diagrams  
CS  
tCS  
tSFS  
1
2
3
4
5
6
15  
16  
SCLK  
DOUT  
tDAV  
MSB  
DB14  
tDSU  
DB13  
A5  
DB12  
DB11  
A3  
DB10  
A2  
DB2  
DB1  
D1  
LSB  
LSB  
tDHD  
DIN  
R/W  
A6  
A4  
D2  
Figure 2. SPI Timing and Sequence  
tREADRATE  
tSTALL  
CS  
SCLK  
Figure 3. Stall Time and Data Rate  
3
STDR  
1
CLOCK  
DATA  
READY  
NV  
Figure 4. Input Clock Timing Diagram  
Rev. 0 | Page 5 of 23  
 
 
 
 
ADIS16446  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Table 3.  
THERMAL RESISTANCE  
Thermal performance is directly linked to printed circuit board  
(PCB) design and operating environment. Careful attention to  
PCB thermal design is required.  
Parameter  
Rating  
Mechanical Shock Survivability  
Any Axis, Unpowered, 0.5 ms, ½ Sine  
Any Axis, Powered, 0.5 ms, ½ Sine  
VDD to GND  
Digital Input Voltage to GND  
Digital Output Voltage to GND  
Temperature  
2000 g  
2000 g  
−0.3 V to +3.45 V  
−0.3 V to VDD + 0.3 V  
−0.3 V to VDD + 0.3 V  
θJA is the junction to ambient thermal resistance, and θJC is the  
junction to case thermal resistance.  
Table 4. Thermal Resistance  
Package Type  
θJA (°C/W)  
θJC (°C/W)  
Mass (grams)  
Operating Range  
Storage Range1, 2  
−40°C to +105°C  
−65°C to +125°C  
20-Lead ML-20-3  
36.5  
16.9  
15  
1 Extended exposure to temperatures outside the specified temperature  
range of −40°C to +105°C can adversely affect the accuracy of factory  
calibration. For best accuracy, store the device within the specified  
operating range of −40°C to +105°C.  
ESD CAUTION  
2 Although the device is capable of withstanding short-term exposure to  
150°C, long-term exposure threatens internal mechanical integrity.  
Stresses at or above those listed under Absolute Maximum  
Ratings may cause permanent damage to the product. This is a  
stress rating only; functional operation of the product at these  
or any other conditions above those indicated in the operational  
section of this specification is not implied. Operation beyond  
the maximum operating conditions for extended periods may  
affect product reliability.  
Rev. 0 | Page 6 of 23  
 
 
 
Data Sheet  
ADIS16446  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
ADIS16446  
TOP VIEW  
(Not to Scale)  
19 17 15 13 11  
9
7
8
5
6
3
4
1
2
20 18 16 14 12 10  
PIN 1  
PIN 20  
NOTES  
1. THIS REPRESENTATION DISPLAYS THE TOP VIEW WHEN THE  
CONNECTOR IS VISIBLE AND FACING UP.  
2. MATING CONNECTOR: SAMTEC CLM-110-02 OR EQUIVALENT.  
3. DNC = DO NOT CONNECT.  
Figure 6. Pin Locations  
Figure 5. Pin Configuration  
Table 5. Pin Function Descriptions  
Pin No.  
1
Mnemonic Type  
Description  
Configurable Digital Input and Output.  
DIO3  
Input/output  
2
3
4
5
DIO4/CLKIN Input/output  
Configurable Digital Input and Output or Sync Clock Input.  
SPI Serial Clock.  
SPI Data Output. DOUT clocks the output on the SCLK falling edge.  
SPI Data Input. DIN clocks the input on the SCLK rising edge.  
SPI Chip Select.  
SCLK  
DOUT  
DIN  
Input  
Output  
Input  
6
CS  
Input  
7
8
DIO1  
RST  
Input/output  
Input  
Configurable Digital Input and Output.  
Reset.  
9
DIO2  
VDD  
Input/output  
Supply  
Configurable Digital Input and Output.  
Power Supply. It is recommended to place a 10 µF capacitor between the VDD pins and  
the GND pins.  
10, 11, 12  
13, 14, 15  
GND  
Supply  
Power Ground.  
16, 17, 18, 19, 20 DNC  
Not applicable Do Not Connect. Do not connect to the DNC pins.  
Rev. 0 | Page 7 of 23  
 
ADIS16446  
Data Sheet  
TYPICAL PERFORMANCE CHARACTERISTICS  
10  
1000  
AVERAGE  
AVERAGE  
1
100  
+δ  
+δ  
0.1  
10  
–δ  
–δ  
0.01  
0.01  
1
0.01  
0.1  
1
10  
100  
1000  
0.1  
1
10  
100  
1000  
TAU (Seconds)  
TAU (Seconds)  
Figure 7. Gyroscope Root Allan Variance  
Figure 8. Accelerometer Root Allan Variance  
Rev. 0 | Page 8 of 23  
 
 
Data Sheet  
ADIS16446  
THEORY OF OPERATION  
The ADIS16446 is an autonomous system that requires no  
user initialization. When the device has a valid power supply,  
it initializes itself and starts sampling, processing, and loading  
sensor data into the output registers at a sample rate of 819.2 SPS.  
DIO1 pulses high after each sample cycle concludes. The SPI  
enables simple integration with many embedded processor  
platforms, as shown in Figure 9 (electrical connection) and  
Table 6 (pin functions). Note that the use of 33 Ω series  
resistors placed near the transmitters on the SPI lines shown  
in Figure 9 can provide additional signal integrity but are  
not required in most applications.  
The ADIS16446 SPI supports full duplex serial communication  
(simultaneous transmit and receive) and uses the bit sequence  
shown in Figure 10. Table 7 provides a list of the most common  
settings used to initialize the serial port of a processor for the  
ADIS16446 SPI.  
Table 7. Generic Master Processor SPI Settings  
Processor Setting  
Description  
Master  
The ADIS16446 operates as a slave  
SCLK Rate ≤ 2 MHz1 Maximum serial clock rate  
SPI Mode 3  
CPOL = 1 (polarity), and CPHA = 1 (phase)  
I/O LINES ARE COMPATIBLE WITH  
3.3V LOGIC LINES  
MSB First Mode  
16-Bit Mode  
Bit sequence  
Shift register and data length  
VDD  
+3.3V  
11  
SYSTEM  
1 For burst read, SCLK rate ≤ 1 MHz.  
PROCESSOR  
SPI MASTER  
6
3
5
4
7
CS  
SS  
ADIS16446  
SCLK  
DIN  
DEVICE OPERATION  
SCLK  
MOSI  
During normal operation, the ADIS16446 generates a data  
ready pulse every time a new sample is available. In the default  
configuration, the 819.2 SPS sample clock that generates the  
data ready pulse is internally generated, although the user has  
the option of synchronizing the data sampling to an external  
clock. The ADIS16446 registers are updated when the data  
ready signal is inactive. Therefore, the user must not attempt to  
read the ADIS16446 registers during this time.  
DOUT  
MISO  
IRQ  
DIO1  
(USER-CONFIGURABLE.  
FACTORY DEFAULT IS DIO1)  
13  
14  
Figure 9. Electrical Connection Diagram  
Table 6. Generic Master Processor Pin Names and Functions  
Pin Name  
Function  
Slave select  
When performing operations such as part configuration, reset,  
self test, or flash memory update, the best way to know if the  
operation is complete is by monitoring the data ready pulse  
because the data ready pulse automatically resumes after the  
desired operation completes. Note that excessive SPI transactions  
(such as polling a status register) during a self test or flash  
memory update delay completion of the task. See the Data  
Ready Indicator section for further information on the data  
ready indicator.  
SS  
SCLK  
MOSI  
MISO  
IRQ  
Serial clock  
Master output, slave input  
Master input, slave output  
Interrupt request  
CS  
SCLK  
DIN  
R/W A6  
A5  
R/W A6  
D15 D14 D13 D12 D11 D10  
NOTES  
A5  
A4  
A3  
A2  
A1  
D9  
A0 DC7 DC6 DC5 DC4 DC3 DC2 DC1 DC0  
D8 D7 D6 D5 D4 D3 D2 D1 D0  
DOUT  
D15 D14 D13  
1. THE DOUT BIT PATTERN REFLECTS THE ENTIRE CONTENTS OF THE REGISTER IDENTIFIED BY [A6:A0]  
IN THE PREVIOUS 16-BIT DIN SEQUENCE WHEN R/W = 0.  
2. IF R/W = 1 DURING THE PREVIOUS SEQUENCE, DOUT IS NOT DEFINED.  
Figure 10. SPI Communication Bit Sequence  
Rev. 0 | Page 9 of 23  
 
 
 
 
 
 
ADIS16446  
Data Sheet  
SPI Read Test Sequence  
READING SENSOR DATA  
Figure 14 provides a test pattern for testing SPI communication. In  
this pattern, write 0x5600 to the DIN line in a repeating pattern  
The ADIS16446 provides two different options for acquiring  
sensor data: the single register and the burst register. A single  
register read requires two 16-bit SPI cycles. The first cycle  
requests the contents of the register using the bit assignments in  
Figure 10. Bit DC7 to Bit DC0 are don’t cares for a read, and then  
the output register contents follow on DOUT during the second  
sequence. Figure 11 includes three single register reads in  
succession. In this example, the process starts with DIN =  
0x0400 to request the contents of XGYRO_OUT, then follows  
with 0x0600 to request YGYRO_OUT, and 0x0800 to request  
ZGYRO_OUT. Full duplex operation enables processors to  
use the same 16-bit SPI cycle to read data from DOUT while  
requesting the next set of data on DIN. Figure 12 provides an  
example of the four SPI signals when reading XGYRO_OUT in  
a repeating pattern.  
CS  
CS  
and raise in between each repeating 16-bit sequence. must  
remain high for at least the tSTALL time listed in Table 2 in between  
each 16-bit sequence. Starting with the second 16-bit sequence,  
DOUT produces the contents of the PROD_ID register (see  
Table 22), 0x403E.  
CS  
SCLK  
DIN = 0101 0110 0000 0000 = 0x5600  
DIN  
DOUT HIGH-Z  
HIGH-Z  
DOUT = 0100 0000 001111110 = 0x403E = 16446 DECIMAL  
Figure 14. SPI Test Read Pattern DIN = 0x5600, DOUT = 0x403E  
DEVICE CONFIGURATION  
The control registers in Table 8 provide users with a variety of  
configuration options. The SPI provides access to these registers,  
one byte at a time, using the bit assignments in Figure 10. Each  
register has 16 bits, where Bits[7:0] represent the lower address,  
and Bits[15:8] represent the upper address. Figure 15 provides an  
example of writing 0x04 to Address 0x36 (SMPL_PRD, Bits[15:8],  
using DIN = 0xB704. This example reduces the sample rate by a  
factor of eight (see Table 28).  
DIN  
0x0400  
0x0600  
0x0800  
DOUT  
XGYRO_OUT  
YGYRO_OUT  
ZGYRO_OUT  
Figure 11. SPI Read Example  
CS  
SCLK  
DIN  
DIN = 0000 0100 0000 0000 = 0x0400  
CS  
SCLK  
DIN  
DOUT  
DOUT = 1111 10011101 1010 = 0xF9DA = –1574 LSBs ≥ –62.96°/sec  
Figure 12. Example SPI Read, Second 16-Bit Sequence  
DIN = 1011 0110 0000 0100 = 0xB604, WRITES 0x04 TO ADDRESS 0x36.  
Burst Read Function  
Figure 15. Example SPI Write Sequence  
Dual Memory Structure  
The burst read function provides a way to read all of the data  
in one continuous stream of bits (no stall time). As shown in  
Figure 13, start this mode by setting DIN = 0x3E00 while  
Writing configuration data to a control register updates its SRAM  
contents, which are volatile. After optimizing each relevant control  
register setting in a system, set GLOB_CMD, Bit 3 = 1 (DIN =  
0xBE08) to backup these settings in the nonvolatile flash memory.  
The flash backup process requires a valid power supply level for  
the entire process time, 75 ms. Table 8 provides a user register  
memory map that includes a flash backup column. A yes in this  
column indicates that a register has a mirror location in flash and,  
when backed up properly, it automatically restores itself during  
startup or after a reset. Figure 16 provides a diagram of the dual  
memory structure used to manage operation and store critical  
user settings.  
CS  
keeping  
low for 8 additional 16-bit read cycles. These  
8 cycles produce the following sequence of output registers  
on DOUT: DIAG_STAT, XGYRO_OUT, YGYRO_OUT,  
ZGYRO_OUT, XACCL_OUT, YACCL_OUT, ZACCL_OUT,  
and TEMP_OUT. Note that Figure 13 shows the first, second,  
and final bytes of the burst sequence only.  
1
2
3
9
CS  
SCLK  
DIN  
GLOB_CMD  
MANUAL  
FLASH  
BACKUP  
DOUT  
DIAG_STAT  
XGYRO_OUT  
TEMP_OUT  
Figure 13. Burst Read Sequence  
NONVOLATILE  
FLASH MEMORY  
VOLATILE  
SRAM  
(NO SPI ACCESS)  
SPI ACCESS  
START-UP  
RESET  
Figure 16. SRAM and Flash Memory Diagram  
Rev. 0 | Page 10 of 23  
 
 
 
 
 
 
 
 
Data Sheet  
ADIS16446  
USER REGISTERS  
Table 8. User Register Memory Map1  
Name  
FLASH_CNT  
Reserved  
R/W Flash Backup Address2  
Default  
N/A  
N/A  
Function  
Flash memory write count  
N/A  
Bit Assignments  
See Table 26  
N/A  
R
Yes  
0x00  
N/A N/A  
0x02  
XGYRO_OUT  
YGYRO_OUT  
ZGYRO_OUT  
XACCL_OUT  
YACCL_OUT  
ZACCL_OUT  
Reserved  
TEMP_OUT  
XGYRO_OFF  
YGYRO_OFF  
ZGYRO_OFF  
XACCL_OFF  
YACCL_OFF  
ZACCL_OFF  
Reserved  
GPIO_CTRL  
MSC_CTRL  
SMPL_PRD  
SENS_AVG  
Reserved  
DIAG_STAT  
GLOB_CMD  
ALM_MAG1  
ALM_MAG2  
ALM_SMPL1  
ALM_SMPL2  
ALM_CTRL  
Reserved  
R
R
R
R
R
R
No  
No  
No  
No  
No  
No  
0x04  
0x06  
0x08  
0x0A  
0x0C  
0x0E  
0x10 to 0x17  
0x18  
0x1A  
0x1C  
0x1E  
0x20  
0x22  
0x24  
0x26 to 0x31  
0x32  
0x34  
0x36  
0x38  
0x3A to 0x3B  
0x3C  
0x3E  
0x40  
0x42  
0x44  
0x46  
0x48  
0x4A to 0x51  
0x52  
0x54  
0x56  
0x58  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
N/A  
X-axis gyroscope output  
Y-axis gyroscope output  
Z-axis gyroscope output  
X-axis accelerometer output  
Y-axis accelerometer output  
Z-axis accelerometer output  
Reserved  
See Table 9  
See Table 10  
See Table 11  
See Table 13  
See Table 14  
See Table 15  
N/A  
See Table 17  
See Table 30  
See Table 31  
See Table 32  
See Table 33  
See Table 34  
See Table 35  
N/A  
See Table 27  
See Table 24  
See Table 28  
See Table 29  
N/A  
See Table 25  
See Table 19  
See Table 36  
See Table 37  
See Table 38  
See Table 39  
See Table 40  
N/A  
N/A No  
No  
R
Temperature output  
R/W Yes  
R/W Yes  
R/W Yes  
R/W Yes  
R/W Yes  
R/W Yes  
N/A No  
R/W No  
R/W Yes  
R/W Yes  
R/W Yes  
N/A N/A  
0x0000  
0x0000  
0x0000  
0x0000  
0x0000  
0x0000  
N/A  
0x0000  
0x0006  
0x0001  
0x0402  
N/A  
0x0000  
0x0000  
0x0000  
0x0000  
0x0000  
0x0000  
0x0000  
N/A  
X-axis gyroscope bias offset factor  
Y-axis gyroscope bias offset factor  
Z-axis gyroscope bias offset factor  
X-axis acceleration bias offset factor  
Y-axis acceleration bias offset factor  
Z-axis acceleration bias offset factor  
Reserved  
Auxiliary digital input/output control  
Miscellaneous control  
Internal sample period (rate) control  
Dynamic range and digital filter control  
Reserved  
System status  
System command  
Alarm 1 amplitude threshold  
Alarm 2 amplitude threshold  
Alarm 1 sample size  
R
W
No  
N/A  
R/W Yes  
R/W Yes  
R/W Yes  
R/W Yes  
R/W Yes  
N/A N/A  
R
R
R
R
Alarm 2 sample size  
Alarm control  
Reserved  
Lot identification number  
Lot identification number  
LOT_ID1  
LOT_ID2  
PROD_ID  
SERIAL_NUM  
Yes  
Yes  
Yes  
Yes  
N/A  
N/A  
0x403E  
N/A  
See Table 20  
See Table 21  
Product identifier (0x403E equals 16446 decimal) See Table 22  
Lot specific serial number See Table 23  
1 N/A means not applicable.  
2 Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1.  
Rev. 0 | Page 11 of 23  
 
 
ADIS16446  
Data Sheet  
OUTPUT DATA REGISTERS  
Each sensor in the ADIS16446 has a dedicated output register  
in the user register map (see Table 8). Figure 17 provides arrows  
that describe the direction or rotation (gX, gY, gZ) and acceleration  
(aX, aY, aZ) that produce a positive response in its output data.  
ACCELEROMETERS  
XACCL_OUT (see Table 13) contains x-axis accelerometer data  
(aX in Figure 17), YACCL_OUT (see Table 14) contains y-axis  
accelerometer data (aY in Figure 17), and ZACCL_OUT (see  
Table 15) contains z-axis accelerometer data (aZ in Figure 17).  
Table 16 illustrates the accelerometer data format with numerical  
examples.  
GYROSCOPES  
XGYRO_OUT (see Table 9) contains x-axis gyroscope data (gX  
in Figure 17), YGYRO_OUT (see Table 10) contains y-axis gyro-  
scope data (gY in Figure 17), and ZGYRO_OUT (see Table 11)  
contains z-axis gyroscope data (gZ in Figure 17). Table 12  
illustrates the gyroscope data format with numerical examples.  
Table 13. XACCL_OUT (Base Address = 0x0A), Read Only  
Bits  
Description  
[15:0]  
X-axis acceleration data, twos complement format,  
Table 9. XGYRO_OUT (Base Address = 0x04), Read Only  
1200 LSB/g, 0 g = 0x0000  
Bits  
Description  
Table 14. YACCL_OUT (Base Address = 0x0C), Read Only  
[15:0] X-axis gyroscope data, twos complement format,  
25 LSB/°/sec (SENS_AVG, Bits[15:8] = 0x04), 0°/sec = 0x0000  
Bits  
Description  
[15:0]  
Y-axis acceleration data, twos complement format,  
1200 LSB/g, 0 g = 0x0000  
Table 10. YGYRO_OUT (Base Address = 0x06), Read Only  
Bits  
Description  
Table 15. ZACCL_OUT (Base Address = 0x0E), Read Only  
[15:0] Y-axis gyroscope data, twos complement format,  
25 LSB/°/sec (SENS_AVG, Bits[15:8] = 0x04), 0°/sec = 0x0000  
Bits  
Description  
[15:0]  
Z-axis acceleration data, twos complement format,  
1200 LSB/g, 0 g = 0x0000  
Table 11. ZGYRO_OUT (Base Address = 0x08), Read Only  
Bits  
Description  
Table 16. Acceleration, Twos Complement Format  
[15:0] Z-axis gyroscope data, twos complement format,  
25 LSB/°/sec (SENS_AVG, Bits[15:8] = 0x04), 0°/sec = 0x0000  
Acceleration (g)  
Decimal Hex  
Binary  
+18  
+21,600 0x5460 0101 0100 0101 0000  
Table 12. Rotation Rate, Twos Complement Format1  
Rotation  
+2 ÷ 1200  
+1 ÷ 1200  
0
−1 ÷ 1200  
−2 ÷ 1200  
−18  
+2  
+1  
0
0x0002 0000 0000 0000 0010  
0x0001 0000 0000 0000 0001  
0x0000 0000 0000 0000 0000  
Rate (°/sec)  
+1000  
Decimal  
+25,000  
+2  
+1  
0
−1  
−2  
−25,000  
Hex  
Binary  
0x61A8  
0x0002  
0x0001  
0x0000  
0xFFFF  
0xFFFE  
0x9E58  
0110 0001 1010 1000  
0000 0000 0000 0010  
0000 0000 0000 0001  
0000 0000 0000 0000  
1111 1111 1111 1111  
1111 1111 1111 1110  
1001 1110 0101 1000  
−1  
−2  
0xFFFF  
0xFFFE  
1111 1111 1111 1111  
1111 1111 1111 1110  
+2 ÷ 25  
+1 ÷ 25  
0
−1 ÷ 25  
−2 ÷ 25  
−1000  
−21,600 0xABA0 1010 1011 1010 0000  
1 SENS_AVG, Bits[15:8] = 0x04, see Table 29.  
Z-AXIS  
aZ  
gZ  
X-AXIS  
Y-AXIS  
aY  
aX  
gX  
gY  
Figure 17. Inertial Sensor Direction Reference  
Rev. 0 | Page 12 of 23  
 
 
 
 
 
 
 
 
 
 
 
 
Data Sheet  
ADIS16446  
Table 18. Temperature, Twos Complement Format  
INTERNAL TEMPERATURE  
Temperature (°C)  
+105  
+85  
+31.14772  
+31.07386  
+31  
Decimal  
+1002  
+731  
+2  
Hex  
3EA  
2DB  
2
Binary  
The internal temperature measurement data loads into the  
TEMP_OUT register (see Table 17). Table 18 illustrates the  
temperature data format. Note that this temperature represents  
an internal temperature reading and does not precisely represent  
external conditions. The intended use of TEMP_OUT is to  
monitor relative changes in temperature.  
0011 1110 1010  
0010 1101 1011  
0000 0000 0010  
0000 0000 0001  
0000 0000 0000  
1111 1111 1111  
1111 1111 1110  
1100 0011 1110  
+1  
0
0
0
+30.92614  
+30.85228  
−40  
−1  
−2  
−962  
FFF  
FFE  
C3E  
Table 17. TEMP_OUT (Base Address = 0x18), Read Only  
Bits  
Description  
[15:12]  
[11:0]  
Not used  
Twos complement, 0.07386°C/LSB, 31°C = 0x000  
Rev. 0 | Page 13 of 23  
 
 
 
ADIS16446  
Data Sheet  
SYSTEM FUNCTIONS  
Table 21. LOT_ID2 (Base Address = 0x54), Read Only  
GLOBAL COMMANDS  
Bits  
Description  
The GLOB_CMD register in Table 19 provides trigger bits  
for software reset, flash memory management, and calibration  
control. Start each of these functions by writing a 1 to the assigned  
bit in the GLOB_CMD register. After completing the task, the  
bit automatically returns to 0. For example, set GLOB_CMD, Bit 7  
= 1 (DIN = 0xBE80) to initiate a software reset. Set GLOB_CMD,  
Bit 3 = 1 (DIN = 0xBE08) to back up the user register contents  
in the nonvolatile flash. This sequence includes loading the  
control registers with the data in their respective flash memory  
locations prior to producing new data.  
[15:0]  
Lot identification, binary code  
Table 22. PROD_ID (Base Address = 0x56), Read Only  
Bits  
[15:0]  
Description (Default = 0x403E)  
Product identification = 0x403E. Note that 0x403E  
equals 16,446 decimal.  
Table 23. SERIAL_NUM (Base Address = 0x58), Read Only  
Bits  
[15:12]  
[11:0]  
Description  
Reserved  
Serial number, 1 to 4094 (0xFFE)  
Table 19. GLOB_CMD (Base Address = 0x3E), Write Only  
SELF-TEST FUNCTION  
Bits  
Description (Default = 0x0000)  
The MSC_CTRL register in Table 24 provides a self test function  
for the gyroscopes and accelerometers. This function allows the  
user to verify the mechanical integrity of each MEMS sensor.  
When enabled, the self test function applies an electrostatic force  
to each internal sensor element which causes them to move. The  
movement in each element simulates its response to actual rotation  
and/or acceleration and generates a predictable electrical response  
in the sensor outputs. Set MSC_CTRL, Bit 10 = 1 (DIN = 0xB504)  
to activate the internal self test routine, which compares the  
response to an expected range of responses and reports a pass  
or fail response to DIAG_STAT, Bit 5. If this is high, review  
DIAG_STAT, Bits[15:10] to identify the failing sensor.  
[15:8]  
Not used  
7
Software reset  
[6:4]  
Not used  
3
2
1
0
Flash update  
Not used  
Factory calibration restore  
Gyroscope bias correction  
Flash Update  
When using the user calibration registers to optimize system  
level accuracy, set GLOB_CMD, Bit 3 = 1 (DIN = 0xBE04) to save  
these settings in the nonvolatile flash memory. Be sure to consider  
the endurance rating of the flash memory when determining how  
often to update the user correction factors in the flash memory.  
Table 24. MSC_CTRL (Base Address = 0x34), Read/Write  
Bits  
[15:12]  
11  
Description (Default = 0x0006)  
Not used, always set to 0000  
Checksum memory test (cleared upon completion)1  
1 = enabled, 0 = disabled  
Restoring Factory Calibration  
Set GLOB_CMD, Bit 1 = 1 (DIN = 0xBE02) to execute the  
factory calibration restore function, which resets the gyroscope  
and accelerometer offset registers to 0x0000 and all sensor data to  
0. Restoring the factory calibration automatically updates the  
flash memory and restarts sampling and processing data. See  
Table 19 for information on GLOB_CMD.  
10  
Internal self test (cleared upon completion)1  
1 = enabled, 0 = disabled  
[9:7]  
6
Not used. Always set to 000  
Point of percussion, see Figure 21  
1 = enabled, 0 = disabled  
PRODUCT IDENTIFICATION  
[5:3]  
2
Not used, always set to 000  
Data ready enable  
1 = enabled, 0 = disabled  
The PROD_ID register in Table 22 contains the binary equivalent  
of 16,446. This register provides a product specific variable for  
systems that must track this in their system software. The  
LOT_ID1 and LOT_ID2 registers in Table 20 and Table 21  
combine to provide a unique, 32-bit lot identification code.  
The SERIAL_NUM register in Table 23 contains a binary  
number that represents the serial number on the device label.  
The assigned serial numbers in SERIAL_NUM are lot specific.  
1
0
Data ready polarity  
1 = active high when data is valid  
0 = active low when data is valid  
Data ready line select  
1 = DIO2, 0 = DIO1  
1 Bit 11 and Bit 10 are automatically reset to 0 after finishing their respective tests.  
Table 20. LOT_ID1 (Base Address = 0x52), Read Only  
Bits  
Description  
[15:0]  
Lot identification, binary code  
Rev. 0 | Page 14 of 23  
 
 
 
 
 
 
 
 
 
 
Data Sheet  
ADIS16446  
STATUS AND ERROR FLAGS  
Memory Management  
The DIAG_STAT register in Table 25 provides error flags for  
a number of functions. Each flag uses 1 to indicate an error  
condition and 0 to indicate a normal condition. Reading this  
register provides access to the status of each flag and resets  
all of the bits to 0 for monitoring future operation. If the error  
condition remains, the error flag returns to 1 at the conclusion  
of the next sample cycle. The SPI communication error flag in  
DIAG_STAT, Bit 3 indicates that the number of SCLKs in a SPI  
sequence did not equal a multiple of 16 SCLKs.  
The FLASH_CNT register in Table 26 provides a 16-bit counter  
that helps track the number of write cycles to the nonvolatile flash  
memory. The flash updates every time a manual flash update  
occurs. A manual flash update is initiated by GLOB_CMD, Bit 3  
and is performed at the completion of the GLOB_CMD, Bits[1:0]  
functions (see Table 19).  
Table 26. FLASH_CNT (Base Address = 0x00), Read Only  
Bits  
Description  
[15:0]  
Binary counter  
Table 25. DIAG_STAT (Base Address = 0x3C), Read Only  
Checksum Test  
Bits  
15  
Description (Default = 0x0000)  
Z-axis accelerometer self test failure  
1 = fail, 0 = pass  
Set MSC_CTRL, Bit 11 = 1 (DIN = 0xB508) to perform a  
checksum test of the internal program memory. This function  
takes a summation of the internal program memory and  
compares it with the original summation value for the same  
locations (from factory configuration). If the sum matches the  
correct value, DIAG_STAT, Bit 6 is equal to 0. If it does not  
match, DIAG_STAT, Bit 6 is equal to 1. Make sure that the  
power supply is within specification for the entire 20 ms that  
this function takes to complete.  
14  
13  
12  
11  
10  
9
Y-axis accelerometer self test failure  
1 = fail, 0 = pass  
X-axis accelerometer self test failure  
1 = fail, 0 = pass  
Z-axis gyroscope self test failure  
0 = pass  
Y-axis gyroscope self test failure  
1 = fail, 0 = pass  
X-axis gyroscope self test failure  
1 = fail, 0 = pass  
Alarm 2 status  
1 = active, 0 = inactive  
Alarm 1 status  
8
1 = active, 0 = inactive  
Unused  
7
6
Flash test, checksum flag  
1 = fail, 0 = pass  
5
4
3
2
Self test diagnostic error flag  
1 = fail, 0 = pass  
Sensor overrange  
1 = overrange, 0 = normal  
SPI communication failure  
1 = fail, 0 = pass  
Flash update failure  
1 = fail, 0 = pass  
1
0
Unused  
Unused  
Rev. 0 | Page 15 of 23  
 
 
 
ADIS16446  
Data Sheet  
INPUT AND OUTPUT CONFIGURATION  
DATA READY INDICATOR  
Table 27. GPIO_CTRL (Base Address = 0x32), Read/Write  
Bits  
[15:12]  
11  
Description (Default = 0x0000)  
Not used  
The data ready indicator provides a signal that indicates  
when the registers are updating so that system processors can  
avoid data collision, which is a condition when the internal  
register updates happen at the same time that an external  
processor requests it. The data ready signal has valid and  
invalid states. Using the transition from invalid to valid to  
trigger an interrupt service routine provides the most time for  
data acquisition (before the next register update). See Figure 4  
and Table 2 for specific timing information. MSC_CTRL,  
Bits[2:0] (see Table 24) provide control bits for enabling this  
function, selecting the polarity of the valid state and I/O line  
assignment (DIO1 and DIO2). The factory default setting of  
MSC_CTRL, Bits[2:0] = 110 (DIN = 0xB406) establishes DIO1  
as a data ready output line and assigns the valid state with a  
logic high (1). Set MSC_CTRL, Bits[2:0] = 100 (DIN = 0xB404) to  
change the polarity of the data ready signal on DIO1 for  
interrupt inputs that require negative logic inputs for  
activation.  
General-Purpose I/O Line 4 (DIO4) data level  
General-Purpose I/O Line 3 (DIO3) data level  
General-Purpose I/O Line 2 (DIO2) data level  
General-Purpose I/O Line 1 (DIO1) data level  
Not used  
10  
9
8
[7:4]  
3
General-Purpose I/O Line 4 (DIO4) direction control  
1 = output, 0 = input  
2
1
0
General-Purpose I/O Line 3 (DIO3) direction control  
1 = output, 0 = input  
General-Purpose I/O Line 2 (DIO2) direction control  
1 = output, 0 = input  
General-Purpose I/O Line 1 (DIO1) direction control  
1 = output, 0 = input  
Example Input and Output Configuration  
For example, set GPIO_CTRL, Bits[3:0] = 0100 (DIN = 0xB204)  
to set DIO3 as an output signal pin and DIO1, DIO2, and  
DIO4 as input signal pins. Set the output on DIO3 to 1 by  
setting GPIO_CTRL, Bit 10 = 1 (DIN = 0xB304). Then, read  
GPIO_CTRL, Bits[7:0] (DIN = 0x3200) and mask off  
GPIO_CTRL, Bits[9:8] and GPIO_CTRL, Bit 11 to monitor  
the digital signal levels on DIO4, DIO2, and DIO1.  
GENERAL-PURPOSE INPUT AND OUTPUT  
DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose  
input and output lines that serve multiple purposes. The data  
ready controls in MSC_CTRL, Bits[2:0] have the highest  
priority for configuring DIO1 and DIO2. The alarm indicator  
controls in ALM_CTRL, Bits[2:0] have the second highest priority  
for configuring DIO1 and DIO2. The external clock control  
associated with SMPL_PRD, Bit 0 has the highest priority for  
DIO4 configuration (see Table 28). GPIO_CTRL in Table 27 has  
the lowest priority for configuring DIO1, DIO2, and DIO4, and  
has absolute control over DIO3.  
Rev. 0 | Page 16 of 23  
 
 
 
 
Data Sheet  
ADIS16446  
DIGITAL PROCESSING CONFIGURATION  
(SMPL_PRD, Bits[15:8] = 0x00), this value reduces the sensor  
GYROSCOPES AND ACCELEROMETERS  
bandwidth to approximately 16 Hz.  
Figure 19 details the all signal processing components for the  
gyroscopes and accelerometers. The internal sampling system  
produces new data in the xGYRO_OUT and xACCL_OUT  
output data registers at a rate of 819.2 SPS. The SMPL_PRD  
register in Table 28 provides two functional controls that affect  
sampling and register update rates. SMPL_PRD, Bits[12:8]  
provide a control for reducing the update rate, using an averaging  
filter with a decimated output. These bits provide a binomial  
control that divides the data rate by a factor of 2 every time this  
number increases by 1. For example, set SMPL_PRD, Bits[15:8] =  
0x04 (DIN = 0xB704) to set the decimation factor to 16, which  
reduces the update rate to 51.2 SPS and the bandwidth to  
~25 Hz. The SMPL_PRD, Bits[12:8], setting affects the update  
rate for the TEMP_OUT register (see Table 17) as well.  
0
–20  
–40  
–60  
–80  
–100  
N = 2  
N = 4  
–120  
N = 16  
N = 64  
–140  
0.001  
0.01  
0.1  
1
FREQUENCY (f/fS)  
Figure 18. Bartlett Window, FIR Filter Frequency Response  
(Phase Delay = N Samples)  
Dynamic Range  
Table 28. SMPL_PRD (Base Address = 0x36), Read/Write  
Bits  
[15:13]  
[12:8]  
[7:1]  
0
Description (Default = 0x0001)  
Not used  
The SENS_AVG, Bits[10:8] provide three dynamic range  
settings for the gyroscopes. The lower dynamic range settings  
( 250°/sec and 500°/sec) limit the minimum filter tap sizes to  
maintain resolution. For example, set SENS_AVG, Bits[10:8] =  
010 (DIN = 0xB902) for a measurement range of 500°/sec.  
Because this setting can influence the filter settings, program  
SENS_AVG, Bits[10:8] before programming SENS_AVG, Bits[2:0]  
if more filtering is required.  
D, decimation rate setting, binomial, see Figure 19  
Not used  
Clock  
1 = internal sampling clock, 819.2 SPS  
0 = external sampling clock  
INPUT CLOCK CONFIGURATION  
SMPL_PRD, Bit 0 (see Table 28) provides a control for  
synchronizing the internal sampling to an external clock source.  
Set SMPL_PRD, Bit 0 = 0 (DIN = 0xB600) and GPIO_CTRL,  
Bit 3 = 0 (DIN = 0xB200) to enable the external clock. See Table 2  
and Figure 4 for timing information.  
Table 29. SENS_AVG (Base Address = 0x38), Read/Write  
Bits  
[15:11]  
[10:8]  
Description (Default = 0x0402)  
Not used  
Measurement range (sensitivity) selection  
100 = 1000°/sec (default condition)  
010 = 500°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02)  
001 = 250°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04)  
Not used  
Digital Filtering  
The SENS_AVG register in Table 29 provides user controls for  
the low-pass filter. This filter contains two cascaded averaging  
filters that provide a Bartlett window, FIR filter response (see  
Figure 18). For example, set SENS_AVG, Bits[2:0] = 100 (DIN =  
0xB804) to set each stage to 16 taps. When used with the  
default sample rate of 819.2 SPS and zero decimation  
[7:3]  
[2:0]  
Filter Size Variable B  
Number of taps in each stage; NB = 2B  
See Figure 18 for filter response  
AVERAGE/  
BARTLETT WINDOW  
FIR FILTER  
DECIMATION  
FILTER  
÷N  
D
N
N
N
D
B
B
LOW-PASS  
1
1
1
MEMS  
ADC  
x(n)  
n = 1  
x(n)  
n = 1  
x(n)  
n = 1  
FILTER  
SENSOR  
N
N
N
D
B
B
330Hz  
B = SENS_AVG, BITS[2:0]  
B
D = SMPL_PRD, BITS[12:8]  
D
N
N
= 2  
N
N
= 2  
GYROSCOPES  
B
B
D
D
CLOCK  
= NUMBER OF TAPS  
(PER STAGE)  
= NUMBER OF TAPS  
LOW-PASS, TWO-POLE (404Hz, 757Hz)  
819.2SPS  
ACCELEROMETERS  
LOW-PASS, SINGLE-POLE (330Hz)  
EXTERNAL CLOCK ENABLED  
BY SMPL_PRD, BIT 0  
Figure 19. Sampling and Frequency Response Block Diagram  
Rev. 0 | Page 17 of 23  
 
 
 
 
 
 
 
ADIS16446  
Data Sheet  
CALIBRATION  
Gyroscope Bias Correction Factors  
The mechanical structure and assembly process of the ADIS16446  
provide excellent position and alignment stability for each sensor,  
even after subjected to temperature cycles, shock, vibration, and  
other environmental conditions. The factory calibration includes a  
dynamic characterization of each gyroscope and accelerometer over  
temperature and generates sensor specific correction formulas.  
When the bias estimate is complete, multiply the estimate by  
−1 to change its polarity, convert it into digital format for the  
offset correction registers (see Table 30, Table 31, and Table 32),  
and write the correction factors to the correction registers. For  
example, lower the x-axis bias by 10 LSB (0.1°/sec) by setting  
XGYRO_OFF = 0xFFF6 (DIN = 0x9BFF, 0x9AF6).  
GYROSCOPES  
Single Command Bias Correction  
The XGYRO_OFF (see Table 30), YGYRO_OFF (see Table 31),  
and ZGYRO_OFF (see Table 32) registers provide an user  
programmable bias adjustment function for the x-, y-, and z-axis  
gyroscopes, respectively. Figure 20 illustrates that the registers  
contain bias correction factors that adjust to the sensor data  
immediately before the data loads into the output register.  
GLOB_CMD, Bit 0 (see Table 19) loads the xGYRO_OFF registers  
with the values that are the opposite of the values that are in  
xGYRO_OUT at the time of initiation. Use this command,  
together with the decimation filter (SMPL_PRD, Bits[12:8], see  
Table 28), to automatically average the gyroscope data and  
improve the accuracy of this function, as follows:  
FACTORY  
xGYRO_OUT  
xACCL_OUT  
MEMS  
SENSOR  
1. Set SENS_AVG, Bits[10:8] = 001 (DIN = 0xB901) to  
optimize the xGYRO_OUT sensitivity to 0.01°/sec/LSB.  
2. Set SMPL_PRD, Bits[12:8] = 10000 (DIN = 0xB710) to set  
the decimation rate to 65,536 (216), which provides an  
averaging time of 80 seconds (65,536 ÷ 819.2 SPS).  
3. Wait for 80 seconds while keeping the device motionless.  
4. Set GLOB_CMD, Bit 0 = 1 (DIN = 0xBE01).  
5. The ADI16446 automatically updates the flash memory  
upon completion of the bias update. The user must wait  
the time specified in Table 1 for the flash memory back-up  
time, or until the data ready signal starts to toggle again,  
whichever is longer.  
CALIBRATION  
AND  
ADC  
FILTERING  
xGYRO_OFF  
xACCL_OFF  
Figure 20. User Calibration, Gyroscopes, and Accelerometers  
Gyroscope Bias Error Estimation  
Any system level calibration function must start with an estimate  
of the bias errors, which typically comes from a sample of  
gyroscope output data, when the device is not in motion. The  
sample size of data depends on the accuracy goals. Figure 7  
provides a trade-off relationship between the averaging time  
and the expected accuracy of a bias measurement. Vibration,  
thermal gradients, and power supply instability can influence  
the accuracy of this process.  
ACCELEROMETERS  
The XACCL_OFF (see Table 33), YACCL_OFF (see Table 34),  
and ZACCL_OFF (see Table 35) registers provide user  
programmable bias adjustment function for the x-, y-, and z-axis  
accelerometers, respectively. These registers adjust the accelerometer  
data in the same manner as xGYRO_OFF in Figure 20.  
Table 30. XGYRO_OFF (Base Address = 0x1A), Read/Write  
Bits  
Description (Default = 0x0000)  
[15:0]  
X-axis, gyroscope offset correction factor,  
twos complement, 0.01°/sec/LSB, 0°/sec = 0x0000  
Table 33. XACCL_OFF (Base Address = 0x20), Read/Write  
Bits  
[15:0]  
Description (Default = 0x0000)  
X-axis, accelerometer offset correction factor,  
twos complement, 1/1200 g/LSB, 0 g = 0x0000  
Table 31. YGYRO_OFF (Base Address = 0x1C), Read/Write  
Bits  
Description (Default = 0x0000)  
[15:0]  
Y-axis, gyroscope offset correction factor,  
twos complement, 0.01°/sec/LSB, 0°/sec = 0x0000  
Table 34. YACCL_OFF (Base Address = 0x22), Read/Write  
Bits  
[15:14]  
[13:0]  
Description (Default = 0x0000)  
Not used  
Table 32. ZGYRO_OFF (Base Address = 0x1E), Read/Write  
Bits  
Description (Default = 0x0000)  
Y-axis, accelerometer offset correction factor,  
twos complement, 1/1200 g/LSB, 0 g = 0x0000  
[15:0]  
Z-axis, gyroscope offset correction factor,  
twos complement, 0.01°/sec/LSB, 0°/sec = 0x0000  
Table 35. ZACCL_OFF (Base Address = 0x24), Read/Write  
Bits  
Description (Default = 0x0000)  
[15:14]  
[13:0]  
Not used  
Z-axis, accelerometer offset correction factor,  
twos complement, 1/1200 g/LSB, 0 g = 0x0000  
Rev. 0 | Page 18 of 23  
 
 
 
 
 
 
 
 
 
 
Data Sheet  
ADIS16446  
Accelerometer Bias Error Estimation  
Point of Percussion Alignment  
Under static conditions, orient each accelerometer in positions  
where the response to gravity is predictable. A common approach  
to this is to measure the response of each accelerometer when  
each is oriented in the peak response position, that is, where  
1 g is the ideal measurement position. Next, average the +1 g  
and −1 g accelerometer measurements together to estimate the  
residual bias error. Note that using more points in the rotation  
can improve the accuracy of the response.  
Set MSC_CTRL, Bit 6 = 1 (DIN = 0xB446) to enable this feature  
and maintain the factory default settings for DIO1. This feature  
performs a point of percussion translation to the point identified  
in Figure 21. See Table 24 for more information on MSC_CTRL.  
Accelerometer Bias Correction Factors  
When the bias estimate is complete, multiply the estimate by  
−1 to change its polarity, convert it to the digital format for the  
offset correction registers (see Table 33, Table 34 or Table 35)  
and write the correction factors to the correction registers. For  
example, lower the x-axis bias by 12 LSB (10 mg) by setting  
XACCL_OFF = 0xFFF4 (DIN = 0xA1FF, 0xA0F4).  
ORIGIN ALIGNMENT  
REFERENCE POINT  
SEE MSC_CTRL, BIT 6.  
Figure 21. Point of Percussion Physical Reference  
Rev. 0 | Page 19 of 23  
 
ADIS16446  
Data Sheet  
ALARMS  
Alarm 1 and Alarm 2 provide two independent alarms with  
programmable levels, polarity, and data sources.  
Table 40. ALM_CTRL (Base Address = 0x48), Read/Write  
Bits  
[15:12]  
Description (Default = 0x0000)  
Alarm 2 data source selection  
0000 = disable  
STATIC ALARM USE  
The static alarms setting compares the data source selection  
(ALM_CTRL, Bits[15:8]) with the values in the ALM_MAGx  
registers listed in Table 36 and Table 37, using ALM_MAGx,  
Bits 15, to determine the trigger polarity. The data format in  
these registers matches the format of the data selection in  
ALM_CTRL, Bits[15:8]. See Table 41, Alarm 1, for a static  
alarm configuration example.  
0001 = XGYRO_OUT  
0010 = YGYRO_OUT  
0011 = ZGYRO_OUT  
0100 = XACCL_OUT  
0101 = YACCL_OUT  
0110 = ZACCL_OUT  
0111 = unused  
1001 = unused  
1010 = unused  
Table 36. ALM_MAG1 (Base Address = 0x40), Read/Write  
Bits  
Description (Default = 0x0000)  
1011 = unused  
1100 = TEMP_OUT  
[15:0]  
Threshold setting, matches the format of the  
ALM_CTRL, Bits[11:8] output register selection  
[11:8]  
Alarm 1 data source selection (same as Alarm 2)  
Alarm 2, dynamic or static (1 = dynamic, 0 = static)  
Alarm 1, dynamic or static (1 = dynamic, 0 = static)  
Alarm 2, polarity (1 = greater than ALM_MAG2)  
Alarm 1, polarity (1 = greater than ALM_MAG1)  
Data source filtering (1 = filtered, 0 = unfiltered)  
Alarm indicator (1 = enabled, 0 = disabled)  
Alarm indicator active polarity (1 = high, 0 = low)  
Alarm output line select (1 = DIO2, 0 = DIO1)  
Table 37. ALM_MAG2 (Base Address = 0x42), Read/Write  
7
6
5
4
3
2
1
0
Bits  
Description (Default = 0x0000)  
[15:0]  
Threshold setting, matches the format of the  
ALM_CTRL, Bits[15:12] output register selection  
DYNAMIC ALARM USE  
The dynamic alarm setting monitors the data selection for a  
rate of change comparison. The rate of change comparison is  
represented by the magnitude in the ALM_MAGx registers  
over the time represented by the number of samples setting in  
the ALM_SMPLx registers (see Table 38 and Table 39). See  
Table 41, Alarm 2, for a dynamic alarm configuration example.  
Alarm Example  
Table 41 offers an example that configures Alarm 1 to trigger  
when filtered ZACCL_OUT data drops below 0.7 g and Alarm 2  
to trigger when filtered ZGYRO_OUT data changes by more  
than 50°/sec over a 100 ms period, or 500°/sec2. The filter  
setting helps reduce false triggers from noise and refines the  
accuracy of the trigger points. The ALM_SMPL2 setting of  
82 samples provides a comparison period that is approximately  
equal to 100 ms for an internal sample rate of 819.2 SPS.  
Table 38. ALM_SMPL1 (Base Address = 0x44), Read/Write  
Bits  
Description (Default = 0x0000)  
[15:8]  
[7:0]  
Not used  
Binary, number of samples (both 0x00 and 0x01 = 1)  
Table 39. ALM_SMPL2 (Base Address = 0x46), Read/Write  
Bits  
Description (Default = 0x0000)  
Table 41. Alarm Configuration Example  
[15:8]  
[7:0]  
Not used  
DIN  
0xC936, 0xC8AF ALM_CTRL = 0x36AF  
Alarm 2: dynamic, Δ-ZGYRO_OUT (Δ-time,  
Description  
Binary, number of samples (both 0x00 and 0x01 = 1)  
ALARM REPORTING  
ALM_SMPL2) > ALM_MAG2  
Bits[9:8] of DIAG_STAT provide error flags that indicate an  
alarm condition. Bits[2:0] of ALM_CTRL provide controls for a  
hardware indicator using DIO1 or DIO2.  
Alarm 1: static, ZACCL_OUT < ALM_MAG1,  
filtered data DIO2 output indicator, positive  
polarity  
0xC313, 0xC288 ALM_MAG2 = 0x04E2 = 1,250 LSB = 50°/sec  
0xC10A, 0xC0F0 ALM_MAG1 = 0x0348 = 840 LSB = +0.7 g  
0xC652  
ALM_SMPL2, Bits[7:0] = 0x52 = 82 samples,  
82 samples ÷ 819.2 SPS = ~100 ms  
Rev. 0 | Page 20 of 23  
 
 
 
 
 
 
 
 
 
Data Sheet  
ADIS16446  
APPLICATIONS INFORMATION  
MOUNTING TIPS  
EVALUATION TOOLS  
Breakout Board, ADIS16IMU2/PCBZ  
The mounting and installation process can influence gyroscope  
bias repeatability and other key parametric behaviors. To  
preserve the best performance, use the following guidelines  
when developing an attachment approach for the ADIS16446:  
The ADIS1644X/FLEX and ADIS16IMU2/PCBZ accessories  
(sold separately) provide access to the ADIS16446 through larger  
connectors that support standard 1 mm ribbon cabling and a  
simplified method for connecting to an embedded processor  
platform. These accessories also provide an easy way to connect  
the ADIS16446 to either the EVAL-ADIS-FX3 or to the older  
EVAL-ADIS2 evaluation system. Figure 23 provides a mechanical  
design example for using these two components with the  
ADIS16446 IMU in a system.  
Focus mounting force at the machine screw locations.  
Avoid direct force application on the substrate.  
Avoid placing mounting pressure on the package lid,  
except for the edges that border the exposed side of the  
substrate.  
Use a consistent mounting torque of 28 inch ounces on the  
mounting hardware.  
Avoid placing translational forces on the electrical  
connector.  
Figure 22 provides the pin assignments for J1 on the  
ADIS16IMU2/PCBZ breakout board.  
J1  
RST  
CS  
1
3
2
4
SCLK  
DOUT  
DIN  
For additional mounting ideas and tips, refer to the AN-1305  
Application Note.  
DNC  
GND  
GND  
VDD  
DIO1  
DIO3  
5
6
POWER SUPPLY CONSIDERATIONS  
7
8
GND  
9
10  
12  
14  
16  
VDD  
The power supply must be within 3.15 V and 3.45 V for normal  
operation and optimal performance. During start up, the internal  
power conversion system starts drawing current when VDD  
reaches 1.6 V. The internal processor begins initializing when  
VDD is equal to 2.35 V. After the processor starts, VDD must  
reach 2.7 V within 128 ms. Also, make sure that the power  
supply drops below 1.6 V to shut the device down. Using an  
optional 10 µF external capacitor between VDD and GND is  
recommended for the filtering of power supply noise.  
11  
13  
15  
VDD  
DIO2  
DIO4/CLKIN  
Figure 22. J1Pin Assignments for the ADIS16IMU2/PCBZ  
The C1 and C2 locations on the ADIS16IMU2/PCBZ provide  
users with the pads to install 10 µF of capacitance across VDD  
and GND, which Figure 9 recommends for best performance.  
15mm TO  
45mm  
23.75mm  
33.40mm  
J1  
J2  
15  
1
16  
2
2
1
15.05mm  
20.15mm  
10.07mm  
30.10mm  
24  
23  
ADIS16446BMLZ  
ADIS1644X/FLEX  
(FLEXIBILE CONNECTOR/CABLE)  
ADIS16IMU2/PCBZ  
(INTERFACE BOARD)  
NOTES  
1. USE FOUR M2 MACHINE SCREWS TO ATTACH THE ADIS16446.  
2. USE FOUR M3 MACHINE SCREWS TO ATTACH THE INTERFACE PCB.  
3. EITHER A SAMTEC FFSD-08-D-12.00-01-N OR FFSD-08-D-24.00-01-N CABLE ASSEMBLY CAN  
BE USED TO CONNECT THE ADIS16IMU2 TO THE EVAL-ADIS2Z EVALUATION BOARD.  
Figure 23. Physical Diagram for ADIS16446 Accessories  
Rev. 0 | Page 21 of 23  
 
 
 
 
 
 
ADIS16446  
Data Sheet  
with support for .NET (MATLAB®, LabVIEW®, Python™, etc.)  
Refer to the EVAL-ADIS-FX3 Evaluation System Wiki Guide for  
more information on connecting the ADIS16446 to the EVAL-  
ADIS-FX3 system.  
PC-Based Evaluation, EVAL-ADIS-FX3 and EVAL-ADIS2  
In addition to supporting quick prototype connections between  
the ADIS16446 and an embedded processing system, J1 on the  
ADIS16IMU2/PCBZ breakout board also connects directly to J1  
on both the EVAL-ADIS-FX3 and the older EVAL-ADIS2  
evaluation system.  
Alternatively, the EVAL-ADIS2 provides a simple, functional  
test platform that allows users to configure and collect data  
from the ADIS16446 IMUs. It is used in conjunction with the  
IMU Evaluation Software for the EVAL-ADISX Platforms.  
EVAL-ADIS-FX3 is a new and completely open source evaluation  
platform for Windows-based systems. The FX3 application  
programming interface (API) manages all the complex USB  
transactions and implements all the necessary tools to begin  
capturing high speed, high performance data in custom  
applications. This .NET-compatible API, written in VB.NET  
and C#, includes data streaming features tailored to reliably  
capturing inertial sensor data at the maximum data rate. The  
API is also fully documented, open sourced and is licensed under  
the MIT license. The API also includes a wrapper library that  
allows users to use the same API in any development environment  
X-RAY SENSITIVITY  
Exposure to high dose rate x-rays, such as those in production  
systems that inspect solder joints in electronic assemblies, may  
affect accelerometer bias errors. For optimal performance,  
avoid exposing the ADIS16446 to this type of inspection.  
Rev. 0 | Page 22 of 23  
 
Data Sheet  
ADIS16446  
OUTLINE DIMENSIONS  
24.53  
24.15  
23.77  
2.60  
Ø 2.40  
2.20  
20.150  
BSC  
2.00 BSC  
(4 PLCS)  
2.00  
BSC  
4.70  
4.50  
4.30  
30.10  
BSC  
33.40  
BSC  
38.08  
37.70  
37.32  
1.00  
BSC  
7.89  
7.63  
7.37  
0.66  
BSC  
TOP VIEW  
12.50 BSC  
19.55 BSC  
2.30 BSC  
(2 PLCS)  
2.30 BSC  
(2 PLCS)  
2.96  
2.70  
2.44  
7.57  
BSC  
1.00 BSC  
PITCH  
2.84 BSC  
(Pin Height)  
11.10  
10.80  
10.50  
10.23  
BSC  
5.18 BSC  
(PCB to Connector)  
END VIEW  
Figure 24. 20-Lead Module with Connector Interface [MODULE]  
(ML-20-3)  
Dimensions shown in millimeters  
ORDERING GUIDE  
Model1  
Temperature Range  
Package Description  
Package Option  
ADIS164446BMLZ  
ADIS16IMU2/PCBZ  
EVAL-ADIS-FX3Z  
EVAL-ADIS2Z  
−40°C to +105°C  
20-Lead Module with Connector Interface [MODULE]  
ADIS16IMU2/PCBZ Breakout Board  
EVAL-ADIS-FX3 Evaluation System  
EVAL-ADIS2 Previous Generation Evaluation System  
ADIS1644X/FLEX Cable for ADIS1644X IMUs  
ML-20-3  
ADIS1644X/FLEX  
1 Z = RoHS Compliant Part.  
©2021 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D25519-2/21(0)  
Rev. 0 | Page 23 of 23  
 
 

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