ADG842YKSZ-REEL [ADI]
0.28 OHM CMOS 1.65 V to 3.6 V Single SPST Switches in SC70; 0.28 OHM CMOS 1.65 V至3.6 V单SPST开关，SC70封装
| 型号： | ADG842YKSZ-REEL |
| 厂家： | 
ADI |
| 描述： | 0.28 OHM CMOS 1.65 V to 3.6 V Single SPST Switches in SC70 |
| 文件： | 总16页 (文件大小：540K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
0.28 Ω CMOS 1.65 V to 3.6 V
Single SPST Switches in SC70
ADG841/ADG842
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Ultralow on resistance
0.28 Ω typical
ADG841
ADG842
0.48 Ω max at 125°C
S
D
S
D
Excellent audio performance, ultralow distortion
0.025 Ω typical
IN
IN
0.052 Ω max RON flatness
1.65 V to 3.6 V single supply
High current carrying capability
300 mA continuous current
500 mA peak current
SWITCHES SHOWN
FOR A LOGIC 1 INPUT
Figure 1.
Automotive temperature range: –40°C to +125°C
Rail-to-rail operation
Typical power consumption (<0.01 µW)
PRODUCT HIGHLIGHTS
APPLICATIONS
Handsets
PDAs
1. <0.48 Ω over full temperature range of –40°C to +125°C.
2. Compatible with 1.8 V CMOS logic.
MP3 players
3. High current handling capability (300 mA continuous
current at 3.3 V).
Power routing
Battery-powered systems
Communication systems
Modems
4. Low THD + N (0.02% typ).
5. Tiny SC70 package.
PCMCIA cards
GENERAL DESCRIPTION
Table 1. ADG841/ADG842 Truth Table
Logic (IN)
ADG841
ADG842
On
Off
The ADG841 and ADG842 are low voltage CMOS devices
containing a single-pole, single-throw (SPST) switch. The
ADG841 is closed for a Logic 1 input and the ADG842 is open
for a Logic 1 input. The devices offer ultralow on resistance of
less than 0.48 Ω over the full temperature range. The ADG841/
ADG842 are fully specified for 3.3 V, 2.5 V, and 1.8 V supply
operation.
0
1
Off
On
Each switch conducts equally well in both directions when on,
and has an input signal range that extends to the supplies. The
ADG841/ADG842 exhibit break-before-make switching action.
The ADG841/ADG842 are available in a 6-lead SC70 package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
© 2005 Analog Devices, Inc. All rights reserved.
ADG841/ADG842
TABLE OF CONTENTS
Specifications—2.7 V to 3.6 V......................................................... 3
Typical Performance Characteristics..............................................8
Terminology.....................................................................................11
Test Circuits......................................................................................12
Outline Dimensions........................................................................13
Ordering Guide ...........................................................................13
Specifications—2.5 V 0.2 V.......................................................... 4
Specifications—1.65 V to 1.95 ........................................................ 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
REVISION HISTORY
4/05—Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADG841/ADG842
SPECIFICATIONS—2.7 V TO 3.6 V1
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted.
Table 2.
−40°C
to +85°C
−40°C
to +125°C
Parameter
+25°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
0.48
V
VDD = 2.7 V
VDD = 2.7 V, VS = 0 V to VDD, IDS = −100 mA
Figure 18
On Resistance (RON
)
0.28
0.37
0.025
0.034
Ω typ
Ω max
Ω typ
Ω max
0.43
On Resistance Flatness (RFLAT (ON)
)
VDD = 2.7 V, VS = 0 V to VDD, IDS = −100 mA
0.044
0.052
LEAKAGE CURRENTS
VDD = 3.6 V
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
0.2
0.2
nA typ
nA typ
VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; Figure 19
VS = VD = 0.6 V or 3.3 V; Figure 20
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
2
0.8
V min
V max
µA typ
µA max
pF typ
0.005
3.2
VIN = VINL or VINH
0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
tON
10.5
14
6.5
7.8
200
−54
ns typ
ns max
ns typ
ns max
pC typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
VS = 1.5 V, RS = 0 Ω, CL = 1 nF; Figure 22
RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 23
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 3 V p-p
RL = 50 Ω, CL = 5 pF; Figure 24
RL = 50 Ω, CL = 5 pF; Figure 24
15.5
8
16.5
8.2
tOFF
Charge Injection
Off Isolation
Total Harmonic Distortion (THD + N) 0.012
Insertion Loss
−3 dB Bandwidth
CS (OFF)
−0.02
21
160
160
238
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
VDD = 3.6 V
Digital inputs = 0 V or 3.6 V
0.003
µA typ
1
4
µA max
1 Temperature range is −40°C to +125°C
2 Guaranteed by design; not subject to production test.
Rev. 0 | Page 3 of 16
ADG841/ADG842
SPECIFICATIONS—2.5 V 0.2 V1
VDD = 2.5 V 0.2 V, GND = 0 V, unless otherwise noted.
Table 3.
−40°C
to +85°C to +125°C
−40°C
Parameter
+25°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
V
On Resistance (RON
)
0.3
Ω typ
Ω max
Ω typ
Ω max
VDD = 2.3 V, VS = 0 V to VDD, IDS = −100 mA
Figure 18
VDD = 2.3 V, VS = 0 V to VDD, IDS = −100 mA
0.35
0.025
0.04
0.4
0.45
0.05
On Resistance Flatness (RFLAT (ON)
)
0.05
LEAKAGE CURRENTS
VDD = 2.7 V
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
0.2
0.2
nA typ
nA typ
VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 19
VS = VD = 0.6 V or 2.4 V; Figure 20
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
1.7
0.7
V min
V max
µA typ
µA max
pF typ
0.005
3.2
VIN = VINL or VINH
0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
tON
13
16.5
7
ns typ
ns max
ns typ
ns max
pC typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
VS = 1.25 V, RS = 0 Ω, CL = 1 nF; Figure 22
RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 23
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.5 V p-p
RL = 50 Ω, CL = 5 pF; Figure 24
RL = 50 Ω, CL = 5 pF; Figure 24
18
19
tOFF
8.2
8.4
8.6
Charge Injection
Off Isolation
Total Harmonic Distortion (THD + N)
Insertion Loss
–3 dB Bandwidth
CS (OFF)
150
−54
0.022
−0.02
21
170
170
238
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
VDD = 2.7 V
Digital inputs = 0 V or 2.7 V
0.003
µA typ
1
4
µA max
1 Temperature range is −40°C to +125°C.
2 Guaranteed by design; not subject to production test.
Rev. 0 | Page 4 of 16
ADG841/ADG842
SPECIFICATIONS—1.65 V TO 1.951
VDD = 1.65 V to1.95 V, GND = 0 V, unless otherwise noted.
Table 4.
−40°C
to +85°C
−40°C
to +125°C
Parameter
+25°C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to VDD
V
On Resistance (RON
)
0.37
0.4
0.6
Ω typ
Ω max
Ω max
Ω typ
VDD = 1.8 V, VS = 0 V to VDD, IDS = −100 mA
Figure 18
VDD = 1.65 V, VS = 0 V to VDD, IDS = −100 mA
VDD = 1.65 V, VS = 0 V to VDD, IDS = −100 mA
VDD = 1.95 V
0.84
1.8
0.84
1.8
On Resistance Flatness (RFLAT (ON)
)
0.17
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
Channel On Leakage ID, IS (ON)
DIGITAL INPUTS
0.2
0.2
nA typ
nA typ
VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; Figure 19
VS = VD = 0.6 V or 1.65 V; Figure 20
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
0.65 VDD
0.35 VDD
V min
V max
µA typ
µA max
pF typ
0.005
4
VIN = VINL or VINH
0.1
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS2
tON
19
26
8
9.5
100
−54
ns typ
ns max
ns typ
ns max
pC typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
VS = 1 V, RS = 0 V, CL = 1 nF; Figure 22
RL = 50 Ω, CL = 5 pF, f = 100 kHz; Figure 23
RL = 32 Ω, f = 20 Hz to 20 kHz, VS = 1.2 V p-p
RL = 50 Ω, CL = 5 pF; Figure 24
RL = 50 Ω, CL = 5 pF; Figure 24
28
30
10
tOFF
9.8
Charge Injection
Off Isolation
Total Harmonic Distortion (THD + N) 0.14
Insertion Loss
–3 dB Bandwidth
CS (OFF)
−0.02
21
178
178
238
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
VDD = 1.95 V
Digital inputs = 0 V or 1.95 V
0.003
µA typ
1
4
µA max
1 Temperature range −40°C to +125°C.
2 Guaranteed by design; not subject to production test.
Rev. 0 | Page 5 of 16
ADG841/ADG842
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 5.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. Only one absolute maximum rating may be
applied at any one time.
Parameter
Rating
VDD to GND
Analog Inputs1
Digital Inputs1
−0.3 V to +4.6 V
−0.3 V to VDD + 0.3 V
−0.3 V to 4.6 V or 10 mA,
whichever occurs first
Peak Current, S or D
3.3 V Operation
2.5 V Operation
1.8 V Operation
500 mA
460 mA
420 mA (pulsed at 1 ms,
10% duty cycle max)
Continuous Current, S or D
3.3 V Operation
2.5 V Operation
300 mA
275 mA
250 mA
1.8 V Operation
Operating Temperature Range
Automotive (Y Version)
Storage Temperature Range
Junction Temperature
SC70 Package
−40°C to +125°C
−65°C to +150°C
150°C
θJA Thermal Impedance
Reflow Soldering (Pb-free)
Peak Temperature
494.8°C/W
260(+0/−5)°C
Time at Peak Temperature
10 sec to 40 sec
1 Overvoltages at S or D are clamped by internal diodes. Current should be
limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 6 of 16
ADG841/ADG842
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
D
1
2
3
6
5
4
V
DD
ADG841/
ADG842
TOP VIEW
S
NC
IN
(Not to Scale)
GND
NC = NO CONNECT
Figure 2. 6-Lead SC70
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
2
3
4
5
6
D
S
GND
IN
NC
VDD
Drain Terminal. Can be an input or output.
Source Terminal. Can be an input or output.
Ground (0 V) Reference.
Logic Control Input.
No Connect.
Most Positive Power Supply Potential.
Rev. 0 | Page 7 of 16
ADG841/ADG842
TYPICAL PERFORMANCE CHARACTERISTICS
0.350
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
T
= 25°C
V
= 3.3V
A
DD
I = 100mA
DS
I
= 100mA
DS
0.325
0.300
0.275
0.250
0.225
0.200
+125°C
+85°C
V
= 3V
DD
V
= 3.6V
+25°C
DD
–40°C
V
= 3.3V
DD
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
SOURCE VOLTAGE (V)
SOURCE VOLTAGE (V)
Figure 3. On Resistance vs. VD (VS) VDD = 3.3 V 0.3 V
Figure 6. On Resistance vs. VD (VS) for Different Temperatures,VDD = 3.3 V
0.50
V
I
= 2.5V
0.350
0.325
0.300
0.275
0.250
0.225
0.200
DD
= 100mA
T
= 25°C
= 100mA
A
DS
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
I
DS
V
= 2.3V
DD
+125°C
+85°C
+25°C
V
= 2.7V
DD
–40°C
V
= 2.5V
DD
0
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
1.5
2.0
2.5
SOURCE VOLTAGE (V)
SOURCE VOLTAGE (V)
Figure 7. On Resistance vs. VD (VS) for Different Temperatures, VDD = 2.5 V
Figure 4. On Resistance vs. VD (VS) VDD = 2.5 V 0.2 V
0.6
V
I
= 1.8V
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
DD
= 100mA
T
= 25°C
= 100mA
A
DS
I
DS
V
V
= 1.65V
= 1.95V
DD
DD
0.5
0.4
0.3
0.2
0.1
0
+85°C
+125°C
–40°C
+25°C
V
= 1.8V
DD
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
0
0.4
0.8
1.2
1.6
2.0
SOURCE VOLTAGE (V)
SOURCE VOLTAGE (V)
Figure 8. On Resistance vs. VD (VS) for Different Temperatures, VDD = 1.8 V
Figure 5. On Resistance vs. VD (VS) VDD = 1.8 V 0.15 V
Rev. 0 | Page 8 of 16
ADG841/ADG842
450
400
350
300
250
200
150
100
50
200
150
100
50
T
= 25°C
A
V
= 3.3V
DD
I
, I (ON)
S
D
V
= 3.3V
DD
V
= 2.5V
DD
I
(OFF)
D
0
V
= 1.8V
DD
–50
–100
I
(OFF)
100
S
0
0
0.5
1.0
1.5
2.0
2.5
3.0
–40
–20
0
20
40
60
80
120
V
(V)
S
TEMPERATURE (°C)
Figure 12. Charge Injection vs. Source Voltage
Figure 9. Leakage Current vs. Temperature, VDD = 3.3 V
25
140
120
100
80
V
= 2.5V
DD
20
15
10
5
V
= 1.8V
DD
T
T
I
, I (ON)
D
ON
S
60
V
V
= 2.5V
= 3.3V
V
DD
40
DD
20
= 1.8V
DD
I
(OFF)
OFF
D
0
V
= 3.3V
100
DD
–20
–40
–60
I
(OFF)
100
S
V
= 2.5V
DD
0
–40
–20
0
20
40
60
80
120
–40
–20
0
20
40
60
80
120
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. tON/tOFF Times vs. Temperature
Figure 10. Leakage Current vs. Temperature, VDD = 2.5 V
0
–1
–2
–3
–4
–5
–6
–7
–8
–9
60
50
T
V
= 25°C
A
V
= 1.8V
DD
= 3.3V/2.5V/1.8V
DD
40
I
, I (ON)
S
D
30
20
I
(OFF)
S
10
0
I
(OFF)
100
D
–10
–20
–10
100
1k
10k
100k
1M
10M
100M
–40
–20
0
20
40
60
80
120
FREQUENCY (Hz)
TEMPERATURE
Figure 14. Bandwidth
Figure 11. Leakage Current vs. Temperature, VDD = 1.8 V
Rev. 0 | Page 9 of 16
ADG841/ADG842
0
0
–20
T
V
= 25°C
T
= 25°C
A
A
V
= 3.3V / 2.5V
DD
= 3.3V/2.5V/1.8V
DD
–20
–40
V
= 1.8V
DD
–40
–60
–60
–80
–80
–100
–100
–120
–120
100
1k
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 15. Off Isolation vs. Frequency
Figure 17. AC PSRR
0.030
0.025
0.020
0.015
0.010
0.005
0
V
= 1.8V; V p-p = 1V
DD
V
V
= 2.5V; V p-p = 2V
= 3.3V; V p-p = 2V
DD
DD
0
2
4
6
8
10
12
14
16
18
20
FREQUENCY (kHz)
Figure 16. Total Harmonic Distortion + Noise
Rev. 0 | Page 10 of 16
ADG841/ADG842
TERMINOLOGY
IDD
CD, CS (ON)
Positive supply current.
On switch capacitance. Measured with reference to ground.
VD (VS)
CIN
Analog voltage on Terminals D and S.
Digital input capacitance.
RON
tON
Ohmic resistance between D and S.
Delay time between the 50% and the 90% points of the digital
input and switch on condition.
RFLAT (ON)
Flatness is the difference between the maximum and minimum
value of on resistance as measured over the specified analog
signal range.
tOFF
Delay time between the 50% and the 90% points of the digital
input and switch off condition.
IS (OFF)
Charge Injection
Source leakage current with the switch off.
A measure of the glitch impulse transferred from the digital
input to the analog output during on-off switching.
ID (OFF)
Drain leakage current with the switch off.
Off Isolation
A measure of unwanted signal coupling through an off switch.
ID, IS (ON)
Channel leakage current with the switch on.
−3 dB Bandwidth
The frequency at which the output is attenuated by 3 dB.
VINL
Maximum input voltage for Logic 0.
On Response
The frequency response of the on switch.
VINH
Minimum input voltage for Logic 1.
Insertion Loss
The loss due to the on resistance of the switch.
IINL (IINH
)
Input current of the digital input.
THD + N
The ratio of the harmonics amplitude plus noise of a signal to
the fundamental.
CS (OFF)
Off switch source capacitance. Measured with reference to
ground.
PSRR
Power Supply Rejection Ratio. This is a measure of the coupling
of unwanted ac signals on the power supply to the switch output
when the supply is not decoupled.
CD (OFF)
Off switch drain capacitance. Measured with reference to
ground.
Rev. 0 | Page 11 of 16
ADG841/ADG842
TEST CIRCUITS
V
I
(OFF)
A
I
(OFF)
A
I
D
(ON)
A
S
D
S
D
S
D
S
D
NC
I
DS
V
V
V
D
V
S
S
D
Figure 18. On Resistance
Figure 19. Off Leakage
Figure 20. On Leakage
V
V
V
DD
SS
0.1µ
F
0.1µF
ADG841
ADG842
50%
50%
50%
50%
V
V
IN
IN
V
DD
SS
S
D
V
OUT
R
300
C
L
35pF
L
Ω
V
S
IN
90%
90%
V
OUT
GND
tON
tOFF
Figure 21. Switching Times, tON, tOFF
V
DD
DD
0.1µF
V
V
ADG842
ADG841
IN
IN
OFF
ON
V
D
S
V
S
V
OUT
C
1nF
L
IN
V
∆V
OUT
OUT
Q
= C × ∆V
L OUT
INJ
GND
Figure 22. Charge Injection
V
DD
DD
0.1µF
V
DD
DD
0.1µF
NETWORK
ANALYZER
V
S
D
NETWORK
ANALYZER
50Ω
V
IN
V
S
50Ω
S
50Ω
IN
V
V
S
50Ω
OUT
R
L
D
50Ω
GND
V
OUT
V
R
IN
L
50Ω
GND
ADG841 – V = 0
IN
V
IN
ADG842 – V = 1
IN
V
WITH SWITCH
OUT
V
V
OUT
INSERTION LOSS = 20 LOG
OFF ISOLATION = 20 LOG
V
WITHOUT SWITCH
S
OUT
Figure 23. Off Isolation
Figure 24. Bandwidth
Rev. 0 | Page 12 of 16
ADG841/ADG842
OUTLINE DIMENSIONS
2.20
2.00
1.80
2.40
2.10
1.80
6
1
5
2
4
3
1.35
1.25
1.15
PIN 1
1.30 BSC
0.65 BSC
1.00
0.90
0.70
0.40
0.10
1.10
0.80
0.30
0.10
0.30
0.15
0.22
0.08
0.10 MAX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 25. 6-Lead Thin Shrink Small Outline Transistor [SC70]
(KS-6)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option Branding1
ADG841YKSZ-500RL72
ADG841YKSZ-REEL2
ADG841YKSZ-REEL72
ADG842YKSZ-500RL72
ADG842YKSZ-REEL2
ADG842YKSZ-REEL2
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
6-Lead Thin Shrink Small Outline Transistor (SC70)
6-Lead Thin Shrink Small Outline Transistor (SC70)
6-Lead Thin Shrink Small Outline Transistor (SC70)
6-Lead Thin Shrink Small Outline Transistor (SC70)
6-Lead Thin Shrink Small Outline Transistor (SC70)
6-Lead Thin Shrink Small Outline Transistor (SC70)
KS-6
KS-6
KS-6
KS-6
KS-6
KS-6
SVA
SVA
SVA
SWA
SWA
SWA
1 Branding on this package is limited to three characters due to space constraints.
2 Z = Pb-free part.
Rev. 0 | Page 13 of 16
ADG841/ADG842
NOTES
Rev. 0 | Page 14 of 16
ADG841/ADG842
NOTES
Rev. 0 | Page 15 of 16
ADG841/ADG842
NOTES
©
2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05424-0-4/05(0)
Rev. 0 | Page 16 of 16
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