ADD5211 [ADI]
Four-String, White LED Driver for LCD Backlight Applications; 四串白光LED驱动器，用于LCD背光应用
| 型号： | ADD5211 |
| 厂家： | 
ADI |
| 描述： | Four-String, White LED Driver for LCD Backlight Applications |
| 文件： | 总6页 (文件大小：167K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Four-String, White LED Driver
for LCD Backlight Applications
Preliminary Technical Data
ADD5211
FEATURES
GENERAL DESCRIPTION
White LED driver based on an inductive boost controller
Wide input voltage range: 4.5 V to 40 V
Adaptive output voltage to minimize power dissipation
Adjustable operating frequency: 200 kHz to 1.2 MHz
Programmable UVLO
Programmable soft start time for boost converter
Programmable external MOSFET switching rising/falling time
Drives up to 4 LED current sinks with internal MOSFETs
Brightness control with PWM input
Adjustable LED current: 40 mA up to 200 mA
Headroom control to maximize efficiency
LED dimming frequency: up to 25 kHz
1000:1 PWM dimming at 300 Hz
The ADD5211 is a 4 channel, white LED driver for backlight
applications based on high efficiency, current mode, step-up
converter technology. The boost controller drives an external
MOSFET switch for step-up regulation from an input voltage of
4.5 V to 40 V and a pin adjustable operating frequency between
200 kHz and 1.2 MHz. An adjustable UVLO function is
implemented to reduce input current during power-off.
The ADD5211 contains four regulated current sinks for uniform
brightness intensity. Each current sinks can be driven from 40
mA up to 200 mA and the LED driving current is pin adjustable
by an external resistor. The ADD5211 with an input PWM
interface drives up to four parallel strings of multiple series
connected LEDs with 1.5% current matching between strings.
Open drain fault indicator
Additional features include fault indicator output LED short
protection, LED open protection, boost output short protection,
overvoltage protection, cycle-by-cycle current limit, and
thermal shutdown for both the IC and LED array. The
programmable soft start is implemented to reduce inrush
current during startup.
LED open and LED short fault protection
Thermal shutdown
Undervoltage lockout
24-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
LCD monitor and TV LED backlights
Industrial lighting
TYPICAL APPLICATION
+
VIN
UVLO
VDR
VIN GATE_P GATE_N
CS
RAMP
PGND
EN
OFF ON
PWM
ADD5211
OVP
FAULT
VDD
FB4
FB3
FB2
LSD
FB1
ISET
LGND
AGND FREQ COMP
SS
Figure 1.
Rev. PrA
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Tel: 781.329.4700
Technical Support
©2013 Analog Devices, Inc. All rights reserved.
www.analog.com
ADD5211
Preliminary Technical Data
DETAILED FUNCTIONAL BLOCK DIAGRAM
VDR
OVP
BOOST CONTROL
R
S
GATE_P
PWM
COMP
Q
SWITCH
DRIVER
FB_REF
FB_MIN
gm
R
GATE_N
PGND
ERROR
AMP
COMP
FREQ
START-UP
OSC
SOFT START
SS
CS
RAMP
CURRENT SENSE
DREF
DCOMP
+
RAMP
LSD
OVP REF
+
OVP
OVP
ADD5211
BOOST
SCP REF
×10
SCP
OVP
POR
POR
OPEN
SHORT
UNUSED
FAULT
DETECTOR
THERMAL
SHUTDOWN
FAULT
STRING
STRING
STRING
DETECTOR
DETECTOR
DETECTOR
LINEAR
REGULATOR
VDR
VIN
DEVICE
ENABLE
STRING
FB_MIN
VOLTAGE
DETECTOR
EN
BANDGAP
REFERENCE
500kΩ
FB1
FB2
AGND
CURRENT SOURCE1
CURRENT SOURCE2
CURRENT SOURCE3
AGND
UVLO
DETECTOR
VOLTAGE
REFERENCE
UVLO
VDD
FB3
POR
VDD
BOOST CONTROL
START-UP
CONTROL LOGIC
PWM
CURRENT SOURCE
DIMMING CONTROL
500kΩ
AGND
FB4
THERMAL
SHUTDOWN
BOOST
SHORT
REF
DIMMING CONTROL
LGND
ISET
Figure 2.
Rev. PrA | Page 2 of 6
Preliminary Technical Data
ADD5211
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 1.
Parameter
Rating
VIN, UVLO
FB1, FB2, FB3, FB4
EN
−0.3 V to +45 V
−0.3 V to +55 V
−0.3 V to +20 V
−0.3 V to +10 V
−0.3 V to +7 V
−0.3 V to +3.7 V
−0.3 V to +3.5 V
−0.3 V to +0.3 V
150°C
Table 2. Thermal Resistance
Package Type
θJA
θJC
Unit
24-Lead LFCSP
40.5
3.8
°C/W
PWM, FAULT
VDR, GATE_N, GATE_P
VDD, LSD , OVP, CS, RAMP, SS
FREQ, ISET, COMP
ESD CAUTION
AGND, PGND, LGND
Maximum Junction Temperature (TJ max)
Operating Temperature Range (TA)
Storage Temperature Range (TS)
Reflow Peak Temperature (20 sec to 40 sec)
−25°C to +85°C
−65°C to +150°C
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. PrA | Page 3 of 6
ADD5211
Preliminary Technical Data
Pin
No. Mnemonic Description
ground sets the boost switching frequency
PIN CONFIGURATION AND FUNCTION
DESCRIPTIONS
from 200 kHz to 1.2 MHz.
10
11
ISET
VDD
Full-Scale LED Current Set. A resistor from
this pin to ground sets the LED current up
to 200 mA.
Internal Linear Regulator Output. This
regulator provides power to the ADD5211.
Bypass VDD to AGND with a 1 µF bypass
capacitor.
1
2
3
18
17
16
15
14
13
VDR
UVLO
VIN
OVP
FB4
FB3
ADD5211
TOP VIEW
LGND
FB2
EN 4
5
12
13
14
LSD
FB1
FB2
LED Short Voltage Level Setting Pin. To
disable LED short protection, connect this
pin to VDD.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB1 to LGND.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB2 to LGND.
PWM
6
FAULT
FB1
NOTES
1. CONNECT THE EXPOSED PADDLE TO GROUND.
Figure 3. Pin Configuration
15
16
LGND
FB3
LED Current Sink Ground.
Table 3. Pin Function Descriptions
Pin
No. Mnemonic Description
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB3 to LGND.
Regulated Current Sink. Connect the
bottom cathode of the LED string to this
pin. If unused, connect FB4 to LGND.
Overvoltage Protection. The boost
converter output is connected to this pin
with voltage divide resistors.
1
VDR
Switching MOSFET Gate Driver Supply Pin.
Bypass VDR to AGND with a 1 µF bypass
capacitor.
17
18
FB4
2
UVLO
Input Undervoltage Lockout. Set the start-
up and shutdown input voltage level by
connecting this pin to the input voltage
through a voltage divide resistor.
OVP
19
20
21
PGND
RAMP
CS
Power Ground.
Ramp Compensation Pin.
3
4
VIN
EN
Supply Input Pin. Bypass VIN to AGND with
a 1 µF bypass capacitor.
Shutdown Control Pin for PWM Input
Operation Mode.
PWM Signal Input.
Open Drain Fault Output.
Soft Start Pin.
Compensation for the Boost Converter. Two
capacitors and a resistor are connected in
series between ground and this pin for
stable operation.
Current Sense Input. Allows the current
sensing to control the boost and to limit the
switching current.
Switching MOSFET Gate Low Driving Pin.
Switching MOSFET Gate High Driving Pin.
Analog Ground.
5
6
7
8
PWM
FAULT
SS
22
23
24
GATE_N
GATE_P
AGND
EP
COMP
Exposed Paddle. Connect the exposed
paddle to ground.
9
FREQ
Frequency Select. A resistor from this pin to
Rev. PrA | Page 4 of 6
Preliminary Technical Data
ADD5211
TYPICAL APPLICATIONS CIRCUITS
L1
33µH
D1
S310
18V ~ 36V
22 LEDs/CH, 100mA/CH
+
C
20µF
R
UVLO1
100kΩ
C
10µF
IN
OUT
R
20Ω
ON
MOSFET1
FDD86012LZ
C
0.1µF
IN2
R
UVLO2
7.5kΩ
UVLO
VIN GATE_P GATE_N
CS
VDR
C
BYPASS2
R
6.8kΩ
RAMP
1µF
RAMP
PGND
R
CS
EN
OFF ON
0.1Ω
R
OVP1
560kΩ
PWM
VCC_RECEIVER
R
ADD5211
OVP
R
PULL_UP
OVP2
10kΩ
16kΩ
FAULT
VDD
FB4
FB3
C
R
BYPASS1
1µF
LSD1
24kΩ
FB2
LSD
R
4.7kΩ
LSD2
FB1
ISET
LGND
R
15kΩ
SET
AGND FREQ COMP
SS
C
30nF
SS
R
47kΩ
R
C
68Ω
FREQ
C
C2
OPEN
C
C
2.2µF
Figure 4. Typical Four-String Application Circuit
L1
33µH
D1
S310
18V ~ 36V
22 LEDs/CH, 100mA/CH
+
C
10µF
C
R
OUT
IN
20µF
UVLO1
100kΩ
R
20Ω
ON
MOSFET1
FDD86012LZ
C
IN2
0.1µF
R
UVLO2
7.5kΩ
UVLO
VIN GATE_P GATE_N
CS
VDR
C
BYPASS2
1µF
R
RAMP
6.8kΩ
RAMP
PGND
R
CS
0.1Ω
EN
OFF ON
R
OVP1
560kΩ
PWM
VCC_RECEIVER
R
ADD5211
OVP
R
PULL_UP
10kΩ
OVP2
16kΩ
FAULT
VDD
FB4
FB3
C
R
BYPASS1
1µF
LSD1
24kΩ
FB2
LSD
R
4.7kΩ
LSD2
FB1
ISET
LGND
R
SET
15kΩ
AGND FREQ COMP
SS
C
SS
30nF
R
R
C
68Ω
FREQ
47kΩ
C
C2
OPEN
C
C
2.2µF
Figure 5. Typical Two-String Application Circuit
Rev. PrA | Page 5 of 6
ADD5211
Preliminary Technical Data
OUTLINE DIMENSIONS
4.10
4.00 SQ
3.90
0.30
0.25
0.18
PIN 1
INDICATOR
PIN 1
INDICATOR
19
24
0.50
BSC
18
1
2.65
2.50 SQ
2.45
EXPOSED
PAD
13
12
6
7
0.50
0.40
0.30
0.25 MIN
TOP VIEW
BOTTOM VIEW
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
0.80
0.75
0.70
0.05 MAX
0.02 NOM
SECTION OF THIS DATA SHEET.
COPLANARITY
0.08
SEATING
PLANE
0.20 REF
COMPLIANT TO JEDEC STANDARDS MO-220-WGGD.
Figure 6. 24-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-24-7)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
−25°C to +85°C
−25°C to +85°C
Package Description
Package Option
CP-24-7
CP-24-7
ADD5211ACPZ-R7
ADD5211ACPZ-RL
24-Lead LFCSP_WQ, 7” Tape and Reel
24-Lead LFCSP_WQ, 13”Tape and Reel
1 Z = RoHS Compliant Part.
©2013 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10555-0-2/13(PrA)
Rev. PrA | Page 6 of 6
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