AD8553ARMZ [ADI]
1.8 V to 5 V Auto-Zero, In-Amp with Shutdown; 1.8 V至5 V自动调零，仪表放大器，带有关断
| 型号： | AD8553ARMZ |
| 厂家： | 
ADI |
| 描述： | 1.8 V to 5 V Auto-Zero, In-Amp with Shutdown |
| 文件： | 总20页 (文件大小：334K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1.8 V to 5 V Auto-Zero, In-Amp
with Shutdown
AD8553
FEATURES
PIN CONFIGURATION
Low offset voltage: 20 μV max
Low input offset drift: 0.1 μV/°C max
High CMR: 120 dB min @ G = 100
Low noise: 0.7 μV p-p from 0.01 Hz to 10 Hz
Wide gain range: 0.1 to 10,000
Single-supply operation: 1.8 V to 5.5 V
Rail-to-rail output
RGA
VINP
VCC
VO
1
2
3
4
5
10 RGB
9
8
7
6
VINN
GND
AD8553
TOP VIEW
(Not to Scale)
V
REF
VFB
ENABLE
Figure 1. 10-Lead MSOP
Shutdown capability
APPLICATIONS
Strain gauge
Weigh scales
Pressure sensors
Laser diode control loops
Portable medical instruments
Thermocouple amplifiers
GENERAL DESCRIPTION
The AD8553 is a precision instrumentation amplifier featuring
low noise, rail-to-rail output and a power-saving shutdown
mode. The AD8553 also features low offset voltage and drift
coupled with high common-mode rejection. In shutdown
mode, the total supply current is reduced to less than 4 μA.
The AD8553 is capable of operating from 1.8 V to 5.5 V.
The small package and low power consumption allow
maximum channel density and minimum board size for
space-critical equipment and portable systems.
The AD8553 is specified over the industrial temperature range
from −40°C to +85°C. The AD8553 is available in a Pb-free,
10-lead MSOP.
With a low offset voltage of 20 μV, an offset voltage drift of
0.1 μV/°C, and a voltage noise of only 0.7 μV p-p (0.01 Hz to
10 Hz), the AD8553 is ideal for applications where error sources
cannot be tolerated. Precision instrumentation, position and
pressure sensors, medical instrumentation, and strain gauge
amplifiers benefit from the low noise, low input bias current,
and high common-mode rejection. The small footprint and low
cost are ideal for high volume applications.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005–2010 Analog Devices, Inc. All rights reserved.
AD8553
TABLE OF CONTENTS
Features .............................................................................................. 1
Gain Selection (Gain-Setting Resistors).................................. 12
Reference Connection ............................................................... 12
Disable Function ........................................................................ 12
Output Filtering.......................................................................... 12
Clock Feedthrough..................................................................... 12
Low Impedance Output............................................................. 12
Maximizing Performance Through Proper Layout............... 13
Power Supply Bypassing............................................................ 13
Input Overvoltage Protection................................................... 13
Capacitive Load Drive ............................................................... 13
Circuit Diagrams/Connections ................................................ 14
Outline Dimensions....................................................................... 18
Ordering Guide............................................................................... 18
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 11
High PSR and CMR ................................................................... 11
1/f Noise Correction .................................................................. 11
Applications..................................................................................... 12
REVISION HISTORY
8/10—Rev. 0 to Rev. A
Changes to Figure 30...................................................................... 13
10/05—Revision 0: Initial Version
Rev. A | Page 2 of 20
AD8553
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VCC = 5.0 V, VCM = 2.5 V, VREF = VCC/2, VIN = VINP − VINN, RLOAD = 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting
resistor values. Temperature specifications guaranteed by characterization.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Input Offset Voltage
VOS
G = 1000
G = 100
G = 10
G = 1
G = 1000, −40°C ≤ TA ≤ +85°C
G = 100, −40°C ≤ TA ≤ +85°C
G = 10, −40°C ≤ TA ≤ +85°C
G = 1, −40°C ≤ TA ≤ +85°C
4
4
20
20
50
375
0.1
0.1
0.3
3
μV
μV
μV
μV
μV/°C
μV/°C
μV/°C
μV/°C
nA
15
120
0.02
0.02
0.1
1
vs. Temperature
ΔVOS/ΔT
Input Bias Current
IB
0.4
1
−40°C ≤ TA ≤ +85°C
2
nA
Input Offset Current
VREF Pin Current
IOS
IREF
2
1
nA
nA
0.01
Input Operating Impedance
Differential
Common Mode
Input Voltage Range
Common-Mode Rejection
50||1
10||10
MΩ||pF
GΩ||pF
V
dB
dB
0
120
100
3.3
CMR
G = 100, VCM = 0 V to 3.3 V, −40°C ≤ TA ≤ +85°C
G = 10, VCM = 0 V to 3.3 V, −40°C ≤ TA ≤ +85°C
G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V
G = 10, VCM = 121.25 mV , VO = 0.075 V to 4.925 V
G = 10, 100, 1000, −40°C ≤ TA ≤ +85°C
G = 1, −40°C ≤ TA ≤ +85°C
G = 100, VCM = 12.125 mV, VO = 0.075 V to 4.925 V
G = 10, VCM = 121.25 mV, VO = 0.075 V to 4.925 V
140
120
0.10
0.15
5
30
0.001
0.040
Gain Error
Gain Drift
0.3
0.4
25
50
0.003
0.060
4.2
%
%
ppm/°C
ppm/°C
% FS
% FS
V
Nonlinearity
VREF Range
0.8
OUTPUT CHARACTERISITICS
Output Voltage High
Output Voltage Low
Short-Circuit Current
POWER SUPPLY
VOH
VOL
ISC
4.925
V
V
mA
0.075
35
Power Supply Rejection
PSR
ISY
G = 100, VS = 1.8 V to 5.5 V, VCM = 0 V
G = 10, VS = 1.8 V to 5.5 V, VCM = 0 V
IO = 0 mA, VIN = 0 V
100
90
120
110
1.1
dB
dB
mA
mA
μA
Supply Current
1.3
1.5
4
−40°C ≤ TA ≤ +85°C
Supply Current Shutdown Mode
ENABLE INPUTS
ISD
2
Logic High Voltage
Logic Low Voltage
2.40
V
V
0.80
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
en p-p
en
f = 0.01 Hz to 10 Hz
G = 100, f = 1 kHz
G = 10, f = 1 kHz
0.7
30
150
60
1
μV p-p
nV/√Hz
nV/√Hz
kHz
Internal Clock Frequency
Signal Bandwidth1
G = 1 to 1000
kHz
1 Higher bandwidths result in higher noise.
Rev. A | Page 3 of 20
AD8553
VS = 1.8 V, VCM = -0 V, VREF = VS/2, VIN = VINP − VINN, RLOAD = 10 kΩ, TA = 25°C, G = 100, unless specified. See Table 5 for gain setting
resistor values. Temperature specifications guaranteed by characterization.
Table 2.
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
INPUT CHARACTERISTICS
Input Offset Voltage
VOS
G = 1000
G = 100
G = 10
G = 1
G = 1000, −40°C ≤ TA ≤ +85°C
G = 100, −40°C ≤ TA ≤ +85°C
G = 10, −40°C ≤ TA ≤ +85°C
G = 1, −40°C ≤ TA ≤ +85°C
3
3
14
130
0.02
0.02
0.1
1
20
20
50
375
0.25
0.25
3
μV
μV
μV
μV
μV/°C
μV/°C
μV/°C
μV/°C
nA
Vs. Temperature
ΔVOS/ΔT
10
1
Input Bias Current
IB
0.05
−40°C ≤ TA ≤ +85°C
2
nA
Input Offset Current
VREF Pin Current
IOS
IREF
2
1
nA
nA
0.02
Input Operating Impedance
Differential
Common Mode
Input Voltage Range
Common-Mode Rejection
50||1
10||10
MΩ||pF
GΩ||pF
V
dB
dB
0
100
90
0.15
CMR
G = 100, VCM = 0 V to 0.15 V, −40°C ≤ TA ≤ +85°C
G = 10, VCM = 0 V to 0.15 V, −40°C ≤ TA ≤ +85°C
G = 100, VCM =4.125 mV, VO = 0.075 V to 1.725 V
G = 10, VCM = 41.25 mV, VO = 0.075 V to 1.725 V
G = 10, 100, 1000, −40°C ≤ TA ≤ +85°C
G = 1, −40°C ≤ TA ≤ +85°C
G = 100, VCM = 4.125 mV, VO = 0.075 V to 1.725 V
G = 10, VCM = 41.25 mV, VO = 0.075 V to 1.725 V
110
110
0.2
Gain Error
Gain Drift
0.4
0.4
25
%
%
0.2
ppm/°C
ppm/°C
% FS
% FS
V
50
Nonlinearity
0.003
0.010
VREF Range
0.8
1.0
OUTPUT CHARACTERISITICS
Output Voltage High
Output Voltage Low
Short-Circuit Current
POWER SUPPLY
VOH
VOL
ISC
1.725
V
V
mA
0.075
5
Power Supply Rejection
Supply Current
PSR
ISY
G = 100, VS = 1.8 V to 5.5 V, VCM = 0 V
IO = 0 mA, VIN = 0 V
−40°C ≤ TA ≤ +85°C
100
1.4
120
0.8
dB
1.2
1.4
4
mA
mA
μA
Supply Current Shutdown Mode
ENABLE INPUTS
Logic High Voltage
Logic Low Voltage
ISD
2
V
V
0.5
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
en p-p
en
f = 0.01 Hz to 10 Hz
G = 100, f = 1 kHz
G = 10, f = 1 kHz
0.7
30
150
60
1
μV p-p
nV/√Hz
nV/√Hz
kHz
Internal Clock Frequency
Signal Bandwidth1
G = 1 to 1000
kHz
1 Higher bandwidths result in higher noise.
Rev. A | Page 4 of 20
AD8553
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage1
Output Short-Circuit Duration to GND
Storage Temperature Range (RM Package)
Operating Temperature Range
Junction Temperature Range (RM Package)
Lead Temperature Range (Soldering, 10 sec)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Ratings
6 V
+VSUPPLY
VSUPPLY
Indefinite
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
THERMAL RESISTANCE
θ JA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
1 Differential input voltage is limited to 5.0 V, the supply voltage, or
whichever is less.
Table 4.
Package Type
1
θJA
θJC
Unit
10-Lead MSOP (RM)
110
32.2
°C/W
1 θJA is specified for the nominal conditions, that is, θJA is specified for the
device soldered on a circuit board.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 20
AD8553
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, G = 100, unless specified, see Table 5 for gain setting resistor values. Filters as noted are the combination of R2/C2 and R3/C3
as in Figure 31.
80
80
V
= 1.8V AND 5V
V
= 1.8V AND 5V
CC
FILTER = 10kHz
CC
FILTER = 1kHz
GAIN = 1000
GAIN = 100
GAIN = 10
GAIN = 1
GAIN = 1000
60
60
GAIN = 100
GAIN = 10
GAIN = 1
40
40
20
20
0
0
–20
–40
–20
–40
10
100
1k
10k
100k
100k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 5. Gain vs. Frequency
Figure 2. Gain vs. Frequency
180
160
140
120
100
80
180
160
140
120
100
80
V
= 5V
V
= 5V
CC
CC
FILTER = 10kHz
FILTER = 1kHz
GAIN = 100
GAIN = 100
GAIN = 10
GAIN = 1
GAIN = 10
GAIN = 1
60
60
40
40
20
10
20
10
100
1k
10k
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 6. Common-Mode Rejection (CMR) vs. Frequency
Figure 3. Common-Mode Rejection (CMR) vs. Frequency
10k
160
GAIN = 100
140
120
100
80
GAIN = 1
GAIN = 10
GAIN = 1
1k
100
10
GAIN = 10
GAIN = 100, 1000
60
40
20
FILTER = 10kHz
FILTER = 1kHz
V
= 5V AND 1.8V
CC
1
0.01
10
10
0.1
1
10
100
1k
10k
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 7. Voltage Noise Density
Figure 4. Power Supply Rejection vs. Frequency
Rev. A | Page 6 of 20
AD8553
80
70
60
50
40
30
20
10
0
GAIN = 100
FILTER = 1kHz
V
= 5V
CC
TURN ON TIME = 10µs
GAIN = 100
FILTER = 10kHz
FILTER SETTLING
= 5V
V
FILTER SETTLING
CC
V
= 5V
CC
V
= 1.8V
CC
V
= 1.8V
–10
CC
TURN ON TIME = 15µs
= 1.8V
V
CC
–20
–0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
0
50
100
150
200
250
300
350
TIME (ms)
TIME (µs)
Figure 11. Input Offset Voltage vs. Turn-On Time
Figure 8. Input Offset Voltage vs. Turn-On Time
V
= 5V, G = 1, 10, 100, 1000
CC
V
V
= 5V, G = 1, 10, 100, 1000
= 1.8V, G = 1, 10, 100, 1000
CC
CC
10kHz FILTER
10kHz FILTER
1kHz FILTER
1kHz FILTER
500µs/DIV
500µs/DIV
Figure 9. Small Signal Step Response
Figure 12. Large Signal Step Response
V
= 5V
V
= 5V
CC
CC
GAIN = 100, 1000
GAIN = 100, 1000
0
2
4
6
8
10
12
14
16
18
20
0
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
Figure 13. Input Offset Voltage Drift (μV/°C)
Figure 10. Input Offset Voltage (μV)
Rev. A | Page 7 of 20
AD8553
V
= 5V
V
= 5V
CC
CC
GAIN = 10
GAIN = 10
0
5.0 10.0 15.0 20.0 25.0 30.0 35.0 40.0 45.0 50.0
0
0
0
0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 0.30
Figure 17. Input Offset Voltage Drift (μV/°C)
Figure 14. Input Offset Voltage (μV)
V
= 5V
V
= 5V
CC
CC
GAIN = 1
GAIN = 1
0.30 0.60 0.90 1.20 1.50 1.80 2.10 2.40 2.70 3.00
–50 –10 30
70 110 150 190 230 270 310 350
Figure 18. Input Offset Voltage Drift (μV/°C)
Figure 15. Input Offset Voltage (μV)
V
= 5V
V
= 5V
CC
CC
GAIN = 100
= 12.125mV
GAIN = 100
V
V
= 12.125mV
CM
CM
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0
–250 –225 –200 –175 –150 –125 –100 –75 –50 –25
0
Figure 16. Gain Error (m%)
Figure 19. Nonlinearity (m%)
Rev. A | Page 8 of 20
AD8553
180
160
140
120
100
80
180
160
140
120
100
80
V
= 1.8V
V
= 1.8V
CC
CC
FILTER = 1kHz
FILTER = 10kHz
GAIN = 100
GAIN = 100
GAIN = 10
GAIN = 1
GAIN = 10
GAIN = 1
60
60
40
40
20
10
20
10
100
1k
10k
100k
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23. Common-Mode Rejection (CMR) vs. Frequency
Figure 20. Common-Mode Rejection (CMR) vs. Frequency
V
= 1.8V
V
= 1.8V
CC
CC
GAIN = 100, 1000
GAIN = 100, 1000
2
–2
0
4
6
8
10 12 14 16 18 20
0
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
Figure 21. Input Offset Voltage (μV)
Figure 24. Input Offset Voltage Drift (μV/°C)
V
= 1.8V
V
= 1.8V
CC
CC
GAIN = 10
GAIN = 10
0
0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 0.30
0
3 6 9 12 15 18 21 24 27 30 33 36 39 42 45 48 51 54 57 60
Figure 22. Input Offset Voltage (μV)
Figure 25. Input Offset Voltage Drift (μV/°C)
Rev. A | Page 9 of 20
AD8553
V
= 1.8V
V
= 1.8V
CC
CC
GAIN = 1
GAIN = 1
0
40
80
120 160 200 240 280 320 360
0
0.4 0.8 1.2 1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8
Figure 26. Input Offset Voltage (μV)
Figure 28. Input Offset Voltage Drift (μV/°C)
V
= 5.0V
V
= 1.8V,
CC
CC
G = 10, 100, 1000
GAIN = 100
10kHz FILTER
1kHz FILTER
500µs/DIV
10SEC/DIV
Figure 27. 0.01 Hz to 10 Hz Voltage Noise
Figure 29. Large Signal Step Response
Rev. A | Page 10 of 20
AD8553
THEORY OF OPERATION
The AD8553 is a precision current-mode correction
HIGH PSR AND CMR
instrumentation amplifier capable of single-supply operation.
The current-mode correction topology results in excellent
accuracy without the need for trimmed resistors on the die.
Common-mode rejection and power supply rejection indicate
the amount that the offset voltage of an amplifier changes when
its common-mode input voltage or power supply voltage changes.
The autocorrection architecture of the AD8553 continuously
corrects for offset errors, including those induced by changes in
input or supply voltage, resulting in exceptional rejection
performance. The continuous autocorrection provides great
CMR and PSR performances over the entire operating
temperature range (−40°C to +85°C).
Figure 30 shows a simplified diagram illustrating the basic
operation of the AD8553 (without correction). The circuit
consists of a voltage-to-current amplifier (M1 to M6), followed
by a current-to-voltage amplifier (R2 and A1). Application of a
differential input voltage forces a current through External
Resistor R1, resulting in conversion of the input voltage to a
signal current. Transistor M3 to Transistor M6 transfer twice
this signal current to the inverting input of the op amp A1.
Amplifier A1 and External Resistor R2 form a current-to-
voltage converter to produce a rail-to-rail output voltage at
The parasitic resistance in series with R2 does not degrade
CMR but causes a small gain error and a very small offset error.
Therefore, an external buffer amplifier is not required to drive
the VREF pin to maintain excellent CMR performance. This
helps reduce system costs over conventional instrumentation
amplifiers.
VOUT
.
Op amp A1 is a high precision auto-zero amplifier. This
amplifier preserves the performance of the autocorrecting,
current-mode amplifier topology while offering the user a true
voltage-in, voltage-out instrumentation amplifier. Offset errors
are corrected internally.
1/f NOISE CORRECTION
Flicker noise, also known as 1/f noise, is noise inherent in the
physics of semiconductor devices and decreases 10 dB per
decade. The 1/f corner frequency of an amplifier is the frequency
at which the flicker noise is equal to the broadband noise of the
amplifier. At lower frequencies, flicker noise dominates causing
large errors in low frequency or dc applications.
An external reference voltage is applied to the noninverting
input of A1 to set the output reference level. External Capacitor
C2 is used to filter out correction noise.
Flicker noise is seen effectively as a slowly varying offset error,
which is reduced by the autocorrection topology of the AD8553.
This allows the AD8553 to have lower noise near dc than
standard low noise instrumentation amplifiers.
The pinout of the AD8553 allows the user to access the signal
current from the output of the voltage-to-current converter
(Pin 5). The user can choose to use the AD8553 as a current-
output device instead of a voltage-output device. See Figure 35
for circuit connections.
Rev. A | Page 11 of 20
AD8553
APPLICATIONS
DISABLE FUNCTION
GAIN SELECTION (GAIN-SETTING RESISTORS)
The gain of the AD8553 is set according to
G = 2 × (R2/R1)
The AD8553 provides a shutdown function to conserve power
when the device is not needed. Although there is a 1 μA pull-up
current on the ENABLE pin, Pin 6 should be connected to the
positive supply for normal operation and to the negative supply
to turn the device off. It is not recommended to leave Pin 6
floating.
(1)
Table 5 lists the recommended resistor values. Resistor R1 must
be at least 3.92 kꢀ for proper operation. Use of resistors larger
than the recommended values results in higher offset and
higher noise.
Turn-on time upon switching Pin 6 high is dominated by the
output filters. When the device is disabled, the output becomes
high impedance enabling muxing application of multiple
AD8553 instrumentation amplifiers.
Gain accuracy depends on the matching of R1 and R2. Any
mismatch in resistor values results in a gain error. Resistor
value errors due to drift affect gain by the amount indicated by
Equation 1. However, due to the current-mode operation of the
AD8553, a mismatch in R1 and R2 does not degrade the CMR.
OUTPUT FILTERING
Filter Capacitor C2 is required to limit the amount of switching
noise present at the output. The recommended bandwidth of
the filter created by C2 and R2 is 1.4 kHz. The user should first
select R1 and R2 based on the desired gain, then select C2 based on
Care should be taken when selecting and positioning the gain
setting resistors. The resistors should be made of the same
material and package style. Surface-mount resistors are
recommended. They should be positioned as close together
as possible to minimize TC errors.
C2 = 1/(1400 × 2 × π × R2)
(2)
Addition of another single-pole RC filter of 1.4 kHz on the
output (R3 and C3 in Figure 31 to Figure 33) is required for
bandwidths greater than 10 Hz. These two filters produce an
overall bandwidth of 1 kHz.
To maintain good CMR vs. frequency, the parasitic capacitance
on the R1 gain setting pins should be minimized and matched.
This also helps maintain a low gain error at G < 10.
If resistor trimming is required to set a precise gain, trim
Resistor R2 only. Using a potentiometer for R1 degrades the
amplifier’s performance.
When driving an ADC, the recommended values for the second
filter are R3 = 100 Ω and C3 = 1 μF. This filter is required to
achieve the specified performance. It also acts as an antialiasing
filter for the ADC. If a sampling ADC is not being driven, the
value of the capacitor can be reduced, but the filter frequency
should remain unchanged.
REFERENCE CONNECTION
Unlike traditional three op amp instrumentation amplifiers,
parasitic resistance in series with VREF (Pin 7) does not degrade
CMR performance. This allows the AD8553 to attain its extremely
high CMR performance without the use of an external buffer
amplifier to drive the VREF pin, which is required by industry-
standard instrumentation amplifiers. This helps save valuable
printed circuit board space and minimizes system costs.
For applications with low bandwidths (<10 Hz), only the first
filter is required. In this case, the high frequency noise from the
auto-zero amplifier (output amplifier) is not filtered before the
following stage.
CLOCK FEEDTHROUGH
For optimal performance in single-supply applications, VREF
should be set with a low noise precision voltage reference.
However, for a lower system cost, the reference voltage can be
set with a simple resistor voltage divider between the supply and
ground (see Figure 31). This configuration results in degraded
output offset performance if the resistors deviate from their
ideal values. In dual-supply applications, VREF can simply be
connected to ground.
The AD8553 uses two synchronized clocks to perform the
autocorrection. The input voltage-to-current amplifiers are
corrected at 60 kHz.
Trace amounts of these clock frequencies can be observed at the
output. The amount of feedthrough is dependent upon the gain,
because the autocorrection noise has an input and output
referred term. The correction feedthrough is also dependent
upon the values of the external filters R2/C2, and R3/C3.
The VREF pin current is approximately 20 pA, and as a result, an
external buffer is not required.
LOW IMPEDANCE OUTPUT
For applications where a low output impedance is required, the
circuit in Figure 33 should be used. This provides the same
filtering performance as shown in the configuration in Figure 34.
Rev. A | Page 12 of 20
AD8553
MAXIMIZING PERFORMANCE THROUGH PROPER
LAYOUT
For single-supply operation, a 0.1 μF surface-mount capacitor
should be connected from the supply line to ground.
To achieve the maximum performance of the AD8553, care
should be taken in the circuit board layout. The PC board
surface must remain clean and free of moisture to avoid leakage
currents between adjacent traces. Surface coating of the circuit
board reduces surface moisture and provides a humidity barrier,
reducing parasitic resistance on the board.
All bypass capacitors should be positioned as close to the DUT
supply pins as possible, especially the bypass capacitor between
the supplies. Placement of the bypass capacitor on the back of
the board directly under the DUT is preferred.
INPUT OVERVOLTAGE PROTECTION
All terminals of the AD8553 are protected against ESD. In the
case of a dc overload voltage beyond either supply, a large
current would flow directly through the ESD protection diodes.
If such a condition should occur, an external resistor should be
used in series with the inputs to limit current for voltages
beyond the supply rails. The AD8553 can safely handle 5 mA of
continuous current, resulting in an external resistor selection of
Care must be taken to minimize parasitic capacitance on Pin 1
and Pin 10 (Resistor R1 connections). Traces from Pin 1 and
Pin 10 to R1 should be kept short and symmetric. Excessive
capacitance on these pins will result in a gain error. This effect
is most prominent at low gains (G < 10).
For high impedance sources, the PC board traces from the
AD8553 inputs should be kept to a minimum to reduce input
bias current errors.
REXT = (VIN − VS)/5 mA.
CAPACITIVE LOAD DRIVE
POWER SUPPLY BYPASSING
The output buffer, Pin 4, can drive capacitive loads up to 100 pF.
The AD8553 uses internally generated clock signals to perform
the autocorrection. As a result, proper bypassing is necessary to
achieve optimum performance. Inadequate or improper bypassing
of the supply lines can lead to excessive noise and offset voltage.
A 0.1 μF surface-mount capacitor should be connected between
the supply lines. This capacitor is necessary to minimize ripple
from the correction clocks inside the IC. For dual-supply
operation (see Figure 33), a 0.1 μF (ceramic) surface-mount
capacitor should be connected from each supply pin to ground.
V
CC
C2
R2
M5
M6
I – I
I
I
R1
R1
2I
R1
I – I
R1
2R2
R1
V
– V
INN
I + I
INP
V
= V
+
REF
R1
OUT
(V
INP
– V )
INN
I
=
R1
A1
R1
V
BIAS
V
V
V
INP
REF
INN
M3
M4
M1
M2
2I
2I
EXTERNAL
Figure 30. Simplified AD8553 Schematic
Rev. A | Page 13 of 20
AD8553
CIRCUIT DIAGRAMS/CONNECTIONS
V
S+
0.1µF
GND
3
2
1
V
IN+
+
6
5
R3
100Ω
4
V
R1
OUT
AD8553
C3
1µF
10
9
7
GND
R2
C2
V
–
IN–
8
R3 AND C3 VALUES ARE
RECOMMENDED TO DRIVE
AN A/D CONVERTER
GND
100kΩ
0.1µF
100kΩ
V
S+
GND
Figure 31. Single-Supply Connection Diagram Using Voltage Divider Reference
V
S+
0.1µF
0.1µF
GND
V
S–
2
+
3
V
IN+
6
5
1
R3
100Ω
4
V
R1
OUT
AD8553
C3
1µF
10
7
GND
R2
C2
V
–
IN–
9
8
R3 AND C3 VALUES ARE
RECOMMENDED TO DRIVE
AN A/D CONVERTER
0.1µF
V –
S
GND
Figure 32. Dual-Supply Connection Diagram
Rev. A | Page 14 of 20
AD8553
V
S+
0.1µF
0.1µF
GND
V
S–
3
2
+
V
IN+
6
5
1
R3
100Ω
4
V
R1
OUT
AD8553
C3
1µF
10
C2
7
GND
R2
V
–
IN–
9
8
GND
R3 AND C3 VALUES ARE
RECOMMENDED TO DRIVE
AN A/D CONVERTER
0.1µF
V –
S
GND
Figure 33. Dual-Supply Connection Diagram with Low Impedance Output
V
S+
0.1µF
GND
2
1
3
V
+
IN+
6
5
R3
100Ω
4
V
R1
OUT
AD8553
C3
1µF
10
9
7
GND
R2
C2
V
–
IN–
8
R3 AND C3 VALUES ARE
RECOMMENDED TO DRIVE
AN A/D CONVERTER
V
S–
V
CC
1.0µF
0.1µF
V
IN
V
OUT
GND
Figure 34. Dual-Supply Connection Diagram Using IC Voltage Reference
Rev. A | Page 15 of 20
AD8553
V
S+
6
2
1
3
+
7
V
IN
4
NC (NO CONNECT)
AD8553
R1
V
IN
R1
I
=
5
O
10kΩ
0.1µF
10
9
A
8
_
AMMETER
V
S–
Figure 35. Voltage-to-Current Converter, 0 μA to 30 μA Source
V
S+
6
2
1
3
V
= 2.5V
+
REF
7
100Ω
4
A/D
CONVERTER
AD8553
R1
1µF
C2
R2
5
10
9
8
_
Figure 36. Example of an AD8553 Driving a Converter at VS+ = 5 V
Rev. A | Page 16 of 20
AD8553
V
S+
LOGIC
6
6
6
2
1
3
+
V
REF
7
7
7
R3
4
4
4
AD8553
R1
100Ω
C2
5
5
5
10
9
8
_
R2
V
S–
V
S+
2
1
3
+
V
REF
R8
V
OUT
AD8553
R6
100Ω
1µF
C3
R7
10
9
8
_
V
S+
2
1
3
+
V
REF
R13
AD8553
R11
100Ω
C4
10
9
8
_
R12
Figure 37. Multiplexed Output
Table 5. Recommended External Component Values for Selected Gains
Desired Gain (V/V)
R1 (Ω)
200 k
100 k
40.2 k
20 k
4.02 k
3.92 k
3.92 k
3.92 k
R2 || C2 (Ω || F)
100 k || 1200p
100 k || 1200p
100 k || 1200p
100 k || 1200p
100 k || 1200p
196 k || 560p
976 k || 120p
1.96 M || 56p
Calculated Gain
1
2
5
1
2
4.975
10
49.75
100
497.95
1000
10
50
100
500
1000
Rev. A | Page 17 of 20
AD8553
OUTLINE DIMENSIONS
3.10
3.00
2.90
10
1
6
5
5.15
4.90
4.65
3.10
3.00
2.90
PIN 1
IDENTIFIER
0.50 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.70
0.55
0.40
0.15
0.05
0.23
0.13
6°
0°
0.30
0.15
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-BA
Figure 38. 10-Lead Mini Small Outline Package [MSOP]
(RM-10)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Description
10-Lead MSOP
10-Lead MSOP
Package Option
RM-10
RM-10
Branding
A09
A09
AD8553ARMZ
AD8553ARMZ-REEL
−40°C to +85°C
−40°C to +85°C
1 Z = RoHS Compliant Part.
Rev. A | Page 18 of 20
AD8553
NOTES
Rev. A | Page 19 of 20
AD8553
NOTES
©2005–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05474-0-8/10(A)
Rev. A | Page 20 of 20
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