AD822-EP [ADI]
Sinle-Supply, Rail-to-Rail Low Power FET-Input Op Amp; Sinle电源，轨到轨，低功耗， FET输入运算放大器
| 型号： | AD822-EP |
| 厂家： | 
ADI |
| 描述： | Sinle-Supply, Rail-to-Rail Low Power FET-Input Op Amp |
| 文件： | 总20页 (文件大小：320K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Single-Supply, Rail-to-Rail
Low Power FET-Input Op Amp
AD822-EP
CONNECTION DIAGRAM
FEATURES
True single-supply operation
Input voltage range extends below ground
Output swings rail-to-rail
Single-supply capability from 5 V to 30 V
Dual-supply capability from 2.5 V to 15 V
High load drive
Capacitive load drive of 350 pF, G = +1
Minimum output current of 15 mA
Excellent ac performance for low power
800 μA maximum quiescent current per amplifier
Unity-gain bandwidth: 1.8 MHz
Slew rate of 3 V/ꢀs
8
7
6
5
OUT1
–IN1
+IN1
1
2
3
4
V+
OUT2
–IN2
V–
+IN2
AD822-EP
Figure 1. 8-Lead SOIC_N (R Suffix)
GENERAL DESCRIPTION
The AD822-EP is a dual precision, low power FET input op
amp that can operate from a single supply of 5 V to 30 V or dual
supplies of ±2ꢀ5 V to ±±5 Vꢀ It has true single-supply capability
with an input voltage range extending below the negative rail,
allowing the AD822 to accommodate input signals below
ground in the single-supply modeꢀ Output voltage swing
extends to within ±0 mV of each rail, providing the maximum
output dynamic rangeꢀ
Good dc performance
800 μV maximum input offset voltage
2 μV/°C typical offset voltage drift
25 pA maximum input bias current
Low noise
100
13 nV/√Hz @ 10 kHz
No phase inversion
ENHANCED PRODUCT FEATURES
Supports defense and aerospace applications (AQEC
standard)
10
Military temperature range (−55°C to +125°C)
Controlled manufacturing baseline
One assembly/test site
One fabrication site
Enhanced product change notification
Qualification data available on request
1
10
APPLICATIONS
100
FREQUENCY (Hz)
10k
1k
Photodiode preamps
Active filters
Figure 2. Input Voltage Noise vs. Frequency
Offset voltage of 800 μV maximum, offset voltage drift of 2 μV/°C,
input bias currents below 25 pA, and low input voltage noise
provide dc precision with source impedances up to a gigaohmꢀ
The ±ꢀ8 MHz unity-gain bandwidth, –93 dB THD at ±0 kHz,
and 3 V/μs slew rate are provided with a low supply current of
800 μA per amplifierꢀ
12-bit to 14-bit data acquisition systems
Low power references and regulators
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2010 Analog Devices, Inc. All rights reserved.
AD822-EP
TABLE OF CONTENTS
Features ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±
Absolute Maximum Ratings ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±0
Thermal Resistanceꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±0
ESD Cautionꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±0
Typical Performance Characteristics ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±±
Outline Dimensionsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±8
Ordering Guide ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±8
Enhanced Product Features ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±
Applicationsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±
Connection Diagram ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±
General Descriptionꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ ±
Revision History ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 2
Specificationsꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ 4
REVISION HISTORY
6/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
AD822-EP
The AD822-EP drives up to 350 pF of direct capacitive load as a
follower and provides a minimum output current of ±5 mAꢀ
This allows the amplifier to handle a wide range of load conditionsꢀ
Its combination of ac and dc performance, plus the outstanding
load drive capability, results in an exceptionally versatile amplifier
for the single-supply userꢀ
1V
. . . . . . . .
20µs
. . . . . . . . . . . .
1V
. . . .
. . . . . . . . . . . . . . . .
100
90
5V
.
V
OUT
The AD822-EP operates over the military temperature range of
−55°C to +±25°Cꢀ
10
. . . . . . . .
. . . .
. . . . . . . . . . . .
. . . . . . . . . . . . . . . .
0%
The AD822-EP is offered in an 8-lead SOIC_N packageꢀ
0V
(GND)
1V
Full details about this enhanced product are available in the
AD822 data sheet, which should be consulted in conjunction
with this data sheetꢀ
Figure 3. Gain-of-2 Amplifier; VS = 5 V, 0 V,
VIN = 2.5 V Sine Centered at 1.25 V, RL = 100 Ω
Rev. 0 | Page 3 of 20
AD822-EP
SPECIFICATIONS
VS = 0 V, 5 V @ TA = 25°C, VCM = 0 V, VOUT = 0ꢀ2 V, unless otherwise notedꢀ
Table 1.
T Grade
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
DC PERFORMANCE
Initial Offset
0.1
0.5
2
2
0.5
2
0.8
1.2
mV
mV
μV/°C
pA
nA
pA
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
At TMAX
Input Offset Current
At TMAX
VCM = 0 V to 4 V
25
6
20
0.5
nA
Open-Loop Gain
VOUT = 0.2 V to 4 V
RL = 100 kΩ
500
400
80
80
15
1000
150
30
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
TMIN to TMAX
TMIN to TMAX
RL = 10 kΩ
RL = 1 kΩ
TMIN to TMAX
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
f = 0.1 Hz to 10 Hz
f = 10 Hz
10
2
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
25
21
16
13
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
18
0.8
fA p-p
fA/√Hz
Harmonic Distortion
f = 10 kHz
RL = 10 kΩ to 2.5 V
VOUT = 0.25 V to 4.75 V
−93
dB
DYNAMIC PERFORMANCE
Unity-Gain Frequency
Full Power Response
Slew Rate
1.8
210
3
MHz
kHz
V/μs
VOUT p-p = 4.5 V
Settling Time
To 0.1%
To 0.01%
VOUT = 0.2 V to 4.5 V
VOUT = 0.2 V to 4.5 V
1.4
1.8
μs
μs
MATCHING CHARACTERISTICS
Initial Offset
1.0
1.6
mV
mV
μV/°C
pA
dB
dB
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
Crosstalk @ f = 1 kHz
Crosstalk @ f = 100 kHz
3
20
RL = 5 kΩ
RL = 5 kΩ
−130
−93
Rev. 0 | Page 4 of 20
AD822-EP
T Grade
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
INPUT CHARACTERISTICS
Input Voltage Range1, TMIN to TMAX
Common-Mode Rejection Ratio (CMRR)
TMIN to TMAX
−0.2
66
66
+4
V
dB
dB
VCM = 0 V to 2 V
VCM = 0 V to 2 V
80
Input Impedance
Differential
Common Mode
OUTPUT CHARACTERISTICS
Output Saturation Voltage2
VOL − VEE
1013||0.5
1013||2.8
Ω||pF
Ω||pF
ISINK = 20 μA
ISOURCE = 20 μA
ISINK = 2 mA
5
7
10
14
20
55
80
110
160
500
1000
1500
1900
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL – VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
10
40
80
300
800
ISOURCE = 2 mA
ISINK = 15 mA
ISOURCE = 15 mA
15
12
Capacitive Load Drive
POWER SUPPLY
Quiescent Current, TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
350
1.24
80
1.6
mA
dB
dB
V+ = 5 V to 15 V
66
66
1 This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (V+ − 1 V) to V+. Common-mode error
voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply.
2 VOL − VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC − VOH is defined as the difference
between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. 0 | Page 5 of 20
AD822-EP
VS = ±5 V @ TA = 25°C, VCM = 0 V, VOUT = 0 V, unless otherwise notedꢀ
Table 2.
T Grade
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
DC PERFORMANCE
Initial Offset
0.1
0.5
2
2
0.5
2
0.8
1.5
mV
mV
μV/°C
pA
nA
pA
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
At TMAX
Input Offset Current
At TMAX
VCM = −5 V to +4 V
25
6
20
0.5
nA
Open-Loop Gain
VOUT = −4 V to +4 V
RL = 100 kΩ
400
400
80
80
20
1000
150
30
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
TMIN to TMAX
TMIN to TMAX
RL = 10 kΩ
RL = 1 kΩ
TMIN to TMAX
10
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
f = 0.1 Hz to 10 Hz
f = 10 Hz
2
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
25
21
16
13
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
18
0.8
fA p-p
fA/√Hz
Harmonic Distortion
f = 10 kHz
RL = 10 kΩ
VOUT = 4.5 V
−93
dB
DYNAMIC PERFORMANCE
Unity-Gain Frequency
Full Power Response
Slew Rate
1.9
105
3
MHz
kHz
V/μs
VOUT p-p = 9 V
Settling Time
to 0.1%
to 0.01%
VOUT = 0 V to 4.5 V
VOUT = 0 V to 4.5 V
1.4
1.8
μs
μs
MATCHING CHARACTERISTICS
Initial Offset
1.0
3
mV
mV
μV/°C
pA
dB
dB
Maximum Offset Over Temperature
Offset Drift
3
Input Bias Current
Crosstalk @ f = 1 kHz
Crosstalk @ f = 100 kHz
INPUT CHARACTERISTICS
Input Voltage Range1, TMIN to TMAX
Common-Mode Rejection Ratio (CMRR)
TMIN to TMAX
25
RL = 5 kΩ
RL = 5 kΩ
−130
−93
−5.2
66
66
+4
V
dB
dB
VCM = −5 V to +2 V
VCM = −5 V to +2 V
80
Input Impedance
Differential
Common Mode
1013||0.5
1013||2.8
Ω||pF
Ω||pF
Rev. 0 | Page 6 of 20
AD822-EP
T Grade
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
OUTPUT CHARACTERISTICS
Output Saturation Voltage2
VOL − VEE
ISINK = 20 μA
ISOURCE = 20 μA
ISINK = 2 mA
5
7
10
14
20
55
80
110
160
500
1000
1500
1900
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
10
40
80
300
800
ISOURCE = 2 mA
ISINK = 15 mA
ISOURCE = 15 mA
15
12
Capacitive Load Drive
POWER SUPPLY
Quiescent Current, TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
350
1.3
80
1.6
mA
dB
dB
VSY = 5 V to 15 V
66
66
1 This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (V+ − 1 V) to V+. Common-mode error
voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply.
2 VOL − VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC − VOH is defined as the difference
between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. 0 | Page 7 of 20
AD822-EP
VS = ±±5 V @ TA = 25°C, VCM = 0 V, VOUT = 0 V, unless otherwise notedꢀ
Table 3.
T Grade
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
DC PERFORMANCE
Initial Offset
0.4
0.5
2
2
3
mV
mV
μV/°C
pA
Maximum Offset Over Temperature
Offset Drift
Input Bias Current
VCM = 0 V
2
25
VCM = −10 V
VCM = 0 V
40
0.5
2
pA
nA
pA
nA
At TMAX
Input Offset Current
At TMAX
6
20
0.5
Open-Loop Gain
VOUT = −10 V to +10 V
RL = 100 kΩ
500
500
100
100
30
2000
500
45
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
TMIN to TMAX
TMIN to TMAX
RL = 10 kΩ
RL = 1 kΩ
TMIN to TMAX
20
NOISE/HARMONIC PERFORMANCE
Input Voltage Noise
f = 0.1 Hz to 10 Hz
f = 10 Hz
2
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
25
21
16
13
f = 100 Hz
f = 1 kHz
f = 10 kHz
Input Current Noise
f = 0.1 Hz to 10 Hz
f = 1 kHz
18
0.8
fA p-p
fA/√Hz
Harmonic Distortion
f = 10 kHz
RL = 10 kΩ
VOUT = 10 V
−85
dB
DYNAMIC PERFORMANCE
Unity-Gain Frequency
Full Power Response
Slew Rate
1.9
45
3
MHz
kHz
V/μs
VOUT p-p = 20 V
Settling Time
to 0.1%
to 0.01%
VOUT = 0 V to 10 V
VOUT = 0 V to 10 V
4.1
4.5
μs
μs
MATCHING CHARACTERISTICS
Initial Offset
3
4
mV
mV
μV/°C
pA
dB
dB
Maximum Offset Over Temperature
Offset Drift
3
Input Bias Current
Crosstalk @ f = 1 kHz
Crosstalk @ f = 100 kHz
INPUT CHARACTERISTICS
Input Voltage Range1, TMIN to TMAX
Common-Mode Rejection Ratio (CMRR)
TMIN to TMAX
25
RL = 5 kΩ
RL = 5 kΩ
−130
−93
−15.2
70
70
+14
V
dB
dB
VCM = −15 V to +12 V
VCM = −15 V to +12 V
80
Input Impedance
Differential
Common Mode
1013||0.5
1013||2.8
Ω||pF
Ω||pF
Rev. 0 | Page 8 of 20
AD822-EP
T Grade
Typ
Parameter
Test Conditions/Comments
Min
Max
Unit
OUTPUT CHARACTERISTICS
Output Saturation Voltage2
VOL − VEE
ISINK = 20 μA
ISOURCE = 20 μA
ISINK = 2 mA
5
7
10
14
20
55
80
110
160
500
1000
1500
1900
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
pF
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
VOL − VEE
TMIN to TMAX
VCC − VOH
TMIN to TMAX
Operating Output Current
TMIN to TMAX
10
40
80
300
800
ISOURCE = 2 mA
ISINK = 15 mA
ISOURCE = 15 mA
20
15
Capacitive Load Drive
POWER SUPPLY
Quiescent Current, TMIN to TMAX
Power Supply Rejection
TMIN to TMAX
350
1.4
80
1.8
mA
dB
dB
VSY = 5 V to 15 V
70
70
1 This is a functional specification. Amplifier bandwidth decreases when the input common-mode voltage is driven in the range (V+ − 1 V) to V+. Common-mode error
voltage is typically less than 5 mV with the common-mode voltage set at 1 V below the positive supply.
2 VOL − VEE is defined as the difference between the lowest possible output voltage (VOL) and the negative voltage supply rail (VEE). VCC − VOH is defined as the difference
between the highest possible output voltage (VOH) and the positive supply voltage (VCC).
Rev. 0 | Page 9 of 20
AD822-EP
ABSOLUTE MAXIMUM RATINGS
Table 4.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packagesꢀ
Parameter
Rating
Supply Voltage
18 V
Internal Power Dissipation
8-Lead SOIC_N (R)
Table 5. Thermal Resistance
Package Type
8-lead SOIC_N (R)
Observe Maximum
Junction Temperature
((V+) + 0.2 V) to
((V−) − 20 V)
θJA
θJC
Unit
160
43
°C/W
Input Voltage
Output Short-Circuit Duration
Differential Input Voltage
Indefinite
30 V
ESD CAUTION
Storage Temperature Range (R)
Operating Temperature Range
Maximum Junction Temperature
–65°C to +150°C
−55°C to +125°C
150°C
Lead Temperature
(Soldering, 60 sec)
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the deviceꢀ This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not impliedꢀ Exposure to absolute
maximum rating conditions for extended periods may affect
device reliabilityꢀ
Rev. 0 | Page 10 of 20
AD822-EP
TYPICAL PERFORMANCE CHARACTERISTICS
70
5
V
= 0V, 5V
S
60
50
40
30
20
10
0
V
= 0V, +5V AND ±5V
S
V
= ±5V
S
0
–5
–5
–0.5 –0.4 –0.3 –0.2 –0.1
0
0.1
0.2
0.3
0.4
0.5
5
–4
–3
–2
COMMON-MODE VOLTAGE (V)
–1
0
1
2
3
4
OFFSET VOLTAGE (mV)
Figure 4. Typical Distribution of Offset Voltage (390 Units)
Figure 7. Input Bias Current vs. Common-Mode Voltage; VS = 5 V, 0 V, and
VS = 5 V
16
14
12
10
8
1k
100
10
V
V
= ±5V
= ±15V
S
S
6
1
4
2
0.1
–16
0
–12
–8
–4
0
4
8
12
16
–12 –10 –8
–6
–4
–2
0
2
4
6
8
10
COMMON-MODE VOLTAGE (V)
OFFSET VOLTAGE DRIFT (µV/°C)
Figure 5. Typical Distribution of Offset Voltage Drift (100 Units)
Figure 8. Input Bias Current vs. Common-Mode Voltage; VS = 15 V
50
45
40
35
30
25
20
15
10
5
100k
10k
1k
100
10
1
0.1
20
0
40
60
80
100
120
140
0
1
2
3
4
5
6
7
8
9
10
TEMPERATURE (°C)
INPUT BIAS CURRENT (pA)
Figure 6. Typical Distribution of Input Bias Current (213 Units)
Figure 9. Input Bias Current vs. Temperature; VS = 5 V, VCM = 0 V
Rev. 0 | Page 11 of 20
AD822-EP
10M
40
20
POS RAIL
NEG RAIL
R = 2kΩ
L
R
= 20kΩ
V
= ±15V
L
S
1M
V
= 0V, +5V
S
POS RAIL
0
POS
RAIL
V
= 0V, +3V
100k
S
–20
–40
NEG RAIL
NEG RAIL
R
= 100kΩ
L
10k
100
1k
10k
100k
0
60
120
180
240
300
LOAD RESISTANCE (Ω)
OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
Figure 10. Open-Loop Gain vs. Load Resistance
Figure 13. Input Error Voltage with Output Voltage Within 300 mV of Either
Supply Rail for Various Resistive Loads; VS = 5 V
10M
1M
1k
100
10
R
= 100kΩ
L
V
= ±15V
S
V
= 0V, +5V
S
V
= ±15V
R
= 10kΩ
S
L
V
V
= 0V, +5V
S
100k
10k
V
= ±15V
S
R
= 600Ω
L
= 0V, +5V
S
1
–60 –40 –20
0
20
40
60
80
100 120 140
1
10
100
1k
10k
TEMPERATURE (°C)
FREQUENCY (Hz)
Figure 14. Input Voltage Noise vs. Frequency
Figure 11. Open-Loop Gain vs. Temperature
300
200
100
–40
–50
R
A
= 10kΩ
L
= –1
CL
–60
R
= 10kΩ
L
R
= 100kΩ
V
= 0V, +3V; V = 2.5V p-p
OUT
L
S
–70
0
–100
–200
–80
V
= ±15V; V = 20V p-p
OUT
S
–90
V
= ±5V; V = 9V p-p
OUT
S
R
= 600Ω
L
–100
–110
V
= 0V, +5V; V = 4.5V p-p
OUT
S
–300
100
1k
10k
FREQUENCY (Hz)
100k
–16
–12
–8
–4
0
4
8
12
16
OUTPUT VOLTAGE (V)
Figure 12. Input Error Voltage vs. Output Voltage for Resistive Loads
Figure 15. Total Harmonic Distortion (THD) vs. Frequency
Rev. 0 | Page 12 of 20
AD822-EP
100
80
60
40
20
0
100
80
90
80
70
60
50
40
30
20
10
0
V
= ±15V
S
PHASE
60
GAIN
V
= 0V, +5V
S
V
= 0V, +3V
40
S
20
0
R
C
= 2kΩ
= 100pF
L
L
–20
10M
–20
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
Figure 16. Open-Loop Gain and Phase Margin vs. Frequency
Figure 19. Common-Mode Rejection vs. Frequency
1k
5
4
3
2
1
0
A
= +1
= ±15V
CL
V
S
NEGATIVE
RAIL
POSITIVE
RAIL
100
10
+25°C
–55°C
1
+125°C
0.1
0.01
–55°C
+125°C
100
1k
10k
100k
1M
10M
–1
0
1
2
3
FREQUENCY (Hz)
COMMON-MODE VOLTAGE FROM SUPPLY RAILS (V)
Figure 20. Absolute Common-Mode Error vs. Common-Mode Voltage from
Figure 17. Output Impedance vs. Frequency
Supply Rails (VS − VCM
)
1000
100
10
16
12
8
1%
4
V
– V
OH
S
0.01%
ERROR
0.1%
0
0.01%
V
– V
S
–4
–8
OL
1%
–12
–16
0
0.001
0.01
0.1
1
10
100
0
1
2
3
4
5
LOAD CURRENT (mA)
SETTLING TIME (µs)
Figure 18. Output Swing and Error vs. Settling Time
Figure 21. Output Saturation Voltage vs. Load Current
Rev. 0 | Page 13 of 20
AD822-EP
1000
100
90
80
70
60
50
40
30
20
10
0
I
I
= 10mA
SOURCE
= 10mA
SINK
+PSRR
100
10
1
I
= 1mA
= 10µA
SOURCE
I
I
I
= 1mA
SINK
–PSRR
SOURCE
= 10µA
SINK
10
100
1k
10k
100k
1M
10M
60
TEMPERATURE (°C)
–60 –40 –20
0
20
40
80
100 120 140
FREQUENCY (Hz)
Figure 22. Output Saturation Voltage vs. Temperature
Figure 25. Power Supply Rejection vs. Frequency
80
70
60
50
40
30
20
10
0
30
25
20
15
10
5
V
= ±15V
R
= 2kΩ
S
L
V
= ±15V
S
–OUT
+
V
= ±15V
S
V
= 0V, +5V
S
V
= 0V, +3V
S
–
–
V
= 0V, +5V
= 0V, +3V
S
+
+
V
= 0V, +5V
S
V
= 0V, +3V
S
V
S
0
10k
100k
FREQUENCY (Hz)
1M
10M
–60 –40 –20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
Figure 23. Short-Circuit Current Limit vs. Temperature
Figure 26. Large Signal Frequency Response
1600
1400
1200
1000
800
600
400
200
0
T = +125°C
T = +25°C
T = –55°C
0
4
8
12
16
20
24
28
32
36
TOTAL SUPPLY VOLTAGE (V)
Figure 24. Quiescent Current vs. Supply Voltage vs. Temperature
Rev. 0 | Page 14 of 20
AD822-EP
–70
–80
5V
5µs
100
90
–90
–100
–110
–120
10
0%
–130
–140
300
1k
3k
10k
30k
100k
300k
1M
Figure 3±. Large Signal Response Unity-Gain Follower; VS = ± ±5 V, RL = ±0 kΩ
FREQUENCY (Hz)
Figure 27. Crosstalk vs. Frequency
10mV
500ns
V+
0.01µF
100
90
8
+
1/2
V
IN
AD822-EP
–
V
OUT
100pF
R
L
0.01µF
4
10
0%
Figure 28. Unity-Gain Follower
Figure 32. Small Signal Response Unity-Gain Follower; VS = ± ±5 V, RL = ±0 kΩ
5V
10µs
100
90
1V
2µs
100
90
10
0%
10
0%
GND
Figure 29. 20 V p-p, 25 kHz Sine Wave Input; Unity-Gain Follower; VS = ±±5 V,
RL = 600 Ω
V
OUT
Figure 33. VS = 5 V, 0 V; Unity-Gain Follower Response to 0 V to 4 V Step
V+
20kΩ
2.2kΩ
V+
0.01µF
0.1µF
1µF
8
8
2
3
–
–
6
5
1/2
AD822-EP
1/2
AD822-EP
V
IN
+
1
7
5kΩ
1/2
AD822-EP
20V p-p
+
+
5kΩ
V
OUT
100pF
R
L
–
4
V
IN
0.1µF
1µF
V
OUT
10V
CROSSTALK = 20 log
IN
V–
Figure 34. Unity-Gain Follower
Figure 30. Crosstalk Test Circuit
Rev. 0 | Page 15 of 20
AD822-EP
10kΩ
20kΩ
V
IN
V
OUT
V+
10mV
2µs
0.01µF
100
90
8
–
1/2
AD822-EP
+
100pF
R
L
4
10
Figure 35. Gain-of-Two Inverter
0%
GND
1V
2µs
Figure 38. VS = 5 V, 0 V; Gain-of-2 Inverter Response to 20 mV Step,
Centered 20 mV Below Ground, RL = 10 kΩ
100
90
1V
2µs
100
10
0%
GND
10
Figure 36. VS = 5 V, 0 V; Unity-Gain Follower Response to 0 V to 5 V Step
GND
Figure 39. VS = 5 V, 0 V; Gain-of-2 Inverter Response to 2.5 V Step,
Centered −1.25 V Below Ground, RL = 10 kΩ
10mV
2µs
100
90
500mV
10µs
100
90
10
0%
GND
10
0%
Figure 37. VS = 5 V, 0 V; Unity-Gain Follower Response to 40 mV Step,
Centered 40 mV above Ground, RL = 10 kΩ
GND
Figure 40. VS = 3 V, 0 V; Gain-of-2 Inverter, VIN = 1.25 V, 25 kHz, Sine Wave
Centered at −0.75 V, RL = 600 Ω
Rev. 0 | Page 16 of 20
AD822-EP
1V
10µs
. . . .
. . . . . . . .
. . . . . . . . . . . . . . . .
. . . . . . . . . . . .
100
90
10
. . . . . . . .
. . . .
. . . . . . . . . . . . . . . .
. . . . . . . . . . . .
0%
GND
1V
(a)
10µs
1V
1V
. . . . . . . . . . .
. . .
. . . . . . . . . . . .
. . . .
. . . .
. . . .
100
90
+V
s
10
. . . .
0% . . . .
. . . . . . . . . . . . . . . .
. . . . . . . . . . . .
. . . .
GND
1V
(b)
5V
R
P
V
IN
V
OUT
Figure 41. (a) Response with RP = 0; VIN from 0 V to +VS
(b) VIN = 0 V to +VS + 200 mV
VOUT = 0 V to +VS
RP = 49.9 kΩ
Rev. 0 | Page 17 of 20
AD822-EP
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 42. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model1
Temperature Range
−55°C to +125°C
−55°C to +125°C
Package Description
Package Option
AD822TRZ-EP
AD822TRZ-EP-R7
8-Lead SOIC_N
8-Lead SOIC_N
R-8
R-8
1 Z = RoHS Compliant Part.
SPICE model is available at wwwꢀanalogꢀcomꢀ
Rev. 0 | Page 18 of 20
AD822-EP
NOTES
Rev. 0 | Page 19 of 20
AD822-EP
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09208-0-6/10(0)
Rev. 0 | Page 20 of 20
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