AD8208WBRMZ-RL [ADI]
High Voltage, Precision Difference Amplifier; 高电压，高精度差动放大器
| 型号： | AD8208WBRMZ-RL |
| 厂家： | 
ADI |
| 描述： | High Voltage, Precision Difference Amplifier |
| 文件： | 总16页 (文件大小：335K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Voltage,
Precision Difference Amplifier
AD8208
FUNCTIONAL BLOCK DIAGRAM
FEATURES
V
S
A1 A2
Qualified for automotive applications
EMI filters included
High common-mode voltage range
−2 V to +45 V operating
−24 V to +80 V survival
Buffered output voltage
EMI
FILTER
AD8208
EMI
+IN
–IN
+
+
FILTER
G = 10
–
G = 2
OUT
EMI
FILTER
–
Gain = 20 V/V
Low-pass filter (1-pole or 2-pole)
Wide operating temperature range
8-lead SOIC: −40°C to +125°C
8-lead MSOP: −40°C to +125°C
Excellent ac and dc performance
1 mV voltage offset
GND
Figure 1.
−5 ppm/°C typical gain drift
80 dB CMRR minimum dc to 10 kHz
APPLICATIONS
High-side current sensing
Motor controls
Solenoid controls
Power management
Low-side current sensing
Diagnostic protection
GENERAL DESCRIPTION
The AD8208 is a single-supply difference amplifier ideal for
amplifying and low-pass filtering small differential voltages in the
presence of a large common-mode voltage. The input common-
mode voltage range extends from −2 V to +45 V at a single +5 V
supply. The AD8208 is qualified for automotive applications. The
amplifier offers enhanced input overvoltage and ESD protection,
and includes EMI filtering.
Automotive applications demand robust, precision components for
improved system control. The AD8208 provides excellent ac and dc
performance, minimizing errors in the application. Typical offset
and gain drift in both the SOIC and MSOP packages are less
than 5 μV/°C and 10 ppm/°C, respectively. The device also
delivers a minimum CMRR of 80 dB from dc to 10 kHz.
The AD8208 features an externally accessible 100 kΩ resistor at
the output of the preamplifier (A1), which can be used for low-
pass filtering and for establishing gains other than 20.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2010 Analog Devices, Inc. All rights reserved.
AD8208
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications Information.............................................................. 11
High-Side Current Sensing with a Low-Side Switch............. 11
High-Rail Current Sensing ....................................................... 11
Low-Side Current Sensing ........................................................ 11
Gain Adjustment ........................................................................ 12
Gain Trim.................................................................................... 12
Low-Pass Filtering...................................................................... 13
High Line Current Sensing with LPF and Gain Adjustment......14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
REVISION HISTORY
5/10—Rev. 0 to Rev. A
Added 8-Lead MSOP .........................................................Universal
Changes to Features Section and General Description Section. 1
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 15
1/10—Revision 0: Initial Version
Rev. A | Page 2 of 16
AD8208
SPECIFICATIONS
TOPR = −40°C to +125°C, TA = 25°C, VS = 5 V, RL = 25 kꢀ (RL is the output load resistor), unless otherwise noted. Specifications applicable
for both packages (SOIC and MSOP).
Table 1.
Parameter
Test Conditions1
Min
0
Typ
Max
Unit
SYSTEM GAIN
Initial
Error vs. Temperature
Gain Drift
20
V/V
%
ppm/°C
0.075 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR
TOPR
±0.3
−20
VOLTAGE OFFSET
Initial Input Offset (Referred to Input [RTI])
Input Offset (RTI) Over Temperature
Voltage Offset vs. Temperature
INPUT
VCM = 0.15 V, TA
VCM = 0 V, TOPR
VCM = 0 V, TOPR
±2
±±
+20
mV
mV
μV/°C
−20
Input Impedance
Differential
Common Mode
VCM (Continuous)
CMRR2
360
180
−2
80
80
±00
200
±±0
220
+±5
kΩ
kΩ
V
dB
dB
VCM = −2 V to +±5 V, dc
f = dc to 10 kHz,3 TOPR
100
10
PREAMPLIFIER (A1)
Gain
Gain Error
Output Voltage Range
Output Resistance
OUTPUT BUFFER (A2)
Gain
V/V
%
V
0.05 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR
−0.3
0.05
97
+0.3
VS − 0.1
103
100
2
kΩ
V/V
%
V
nA
Ω
Gain Error
0.075 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR
RL = 25 kΩ, differential Input (V) = 0 V, TOPR
TOPR
−0.3
0.075
+0.3
VS − 0.1
50
Output Voltage Range±
Input Bias Current
Output Resistance
DYNAMIC RESPONSE
System Bandwidth
Slew Rate
RL = 1 kΩ, frequency = dc
2
VIN = 0.01 V p-p, VOUT = 0.1± V p-p
VIN = 0.28 V, VOUT = ± V step
70
1
kHz
V/μs
NOISE
0.1 Hz to 10 Hz
20
μV p-p
Spectral Density, 1 kHz (RTI)
POWER SUPPLY
Operating Range
Quiescent Current
Quiescent Current vs. Temperature
PSRR
500
nV/√Hz
±.5
5.5
V
Typical, TA
1.6
80
mA
mA
dB
°C
VOUT = 0.1 V dc, VS = 5 V, TOPR
VS = ±.5 V to 5.5 V, TOPR
For Specified Performance at TOPR
2.7
66
TEMPERATURE RANGE
−±0
+125
1 VCM = input common-mode voltage.
2 Source imbalance < 2 Ω.
3 The AD8208 preamplifier exceeds 80 dB CMRR at 10 kHz. However, because the output is available only by way of the 100 kΩ resistor, even a small amount of pin-to-
pin capacitance between the IN pins and the A1 and A2 pins might couple an input common-mode signal larger than the greatly attenuated preamplifier output. The
effect of pin-to-pin coupling can be negated in all applications by using a filter capacitor from Pin 3 to GND.
± The output voltage range of the AD8208 varies depending on the load resistance and temperature. For additional information on this specification, see Figure 12 and
Figure 13.
Rev. A | Page 3 of 16
AD8208
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage
Continuous Input Voltage (Common Mode)
Differential Input Voltage
Reversed Supply Voltage Protection
ESD Human Body Model
Operating Temperature Range
Storage Temperature Range
Output Short-Circuit Duration
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
12 V
−2± V to +80 V
±12 V
0.3 V
±±000 V
−±0°C to +125°C
−65°C to +150°C
Indefinite
ESD CAUTION
Lead Temperature Range (Soldering, 10 sec) 300°C
Rev. A | Page ± of 16
AD8208
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
2
8
6
3
4
–IN
GND
A1
1
2
3
4
8
7
6
5
+IN
NC
AD8208
TOP VIEW
V
S
5
(Not to Scale)
A2
OUT
NC = NO CONNECT
Figure 3. Metallization Photograph
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Coordinates
Pin No. Mnemonic
X
Y
Description
1
2
3
±
5
6
7
8
−IN
GND
A1
A2
OUT
VS
−322
−321
−321
−321
+321
+322
+563
+208
−51
−21±
−388
+363
Inverting Input
Ground
Preamplifier (A1) Output
Buffer (A2) Input
Buffer (A2) Output
Supply
NC
+IN
No Connect
Noninverting Input
+322
+561
Rev. A | Page 5 of 16
AD8208
TYPICAL PERFORMANCE CHARACTERISTICS
TOPR = −40°C to +125°C, TA = 25°C, VS = 5 V, RL = 25 kꢀ (RL is the output load resistor), unless otherwise noted.
0.2
1500
0.1
0
1000
500
0
–0.1
–0.2
–0.3
–0.4
–0.5
–500
–1000
–1500
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90 100 110 120
TEMPERATURE (°C)
–40 –25 –10
5
20
35
50
65
80
95 110 125
TEMPERATURE (°C)
Figure 4. Typical Offset Drift vs. Temperature
Figure 7. Typical Gain Error vs. Temperature
30
25
20
15
10
5
0.47
0.42
0.37
0.32
0.27
0.22
0.17
0.12
0.07
0.02
–0.03
0
–5
–10
–15
–20
–2 0
2
4
6
8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44
INPUT COMMON-MODE (V)
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 5. Typical Small-Signal Bandwidth
Figure 8. Total Input Bias Current vs. Common-Mode Voltage,
with +IN and –IN Pins Connected (Shorted)
–35
120
110
100
+125°C
+25°C
–40°C
–30
+25°C
–40°C
–25
+125°C
–20
–15
90
80
70
60
–10
–5
0
5
50
40
0
0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 2.25 2.50
(V)
10
100
1k
10k
100k
1M
LTAGE
UT VO
A2 INP
FREQUENCY (Hz)
Figure 9. Input Bias Current of A2 vs. Input Voltage and Temperature
Figure 6. Typical CMRR vs. Frequency
Rev. A | Page 6 of 16
AD8208
1.6
1.5
1.4
1.3
11.0
10.5
10.0
9.5
9.0
8.5
8.0
7.5
7.0
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
–40°C
+25°C
+125°C
6.5
6.0
0.2
0.1
5.5
5.0
0
–40 –30 –20 –10
0
10 20 30 40 50 60 70 80 90 100 110 120 130
TEMPERATURE (°C)
0
1
2
3
4
5
6
7
8
9
10
OUTPUT SINK CURRENT (mA)
Figure 13. Output Voltage Range from GND vs. Output Sink Current
Figure 10. Maximum Output Sink Current vs. Temperature
6.1
INPUT
5.8
5.5
5.2
100mV/DIV
2
OUTPUT
4.9
4.6
4.3
4.0
1V/DIV
1
TIME (2µs/DIV)
–40 –20
0
20
40
60
80
100 120
140
TEMPERATURE (°C)
Figure 11. Maximum Output Source Current vs. Temperature
Figure 14. Rise Time
4.9
4.7
4.5
4.3
100mV/DIV
–40°C +25°C
+125°C
INPUT
4.1
3.9
3.7
2
1V/DIV
3.5
3.3
3.1
2.9
2.7
2.5
OUTPUT
1
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
OUTPUT SOURCE CURRENT (mA)
TIME (2µs/DIV)
Figure 12. Output Voltage Range of A2 vs. Output Source Current
Figure 15. Fall Time
Rev. A | Page 7 of 16
AD8208
2V/DIV
200mV/DIV
2
1
INPUT
2
0.01%/DIV
2V/DIV
OUTPUT
1
TIME (2µs/DIV)
TIME (20µs/DIV)
Figure 16. Differential Overload Recovery, Rising
Figure 19. Settling Time, Falling
1200
1000
+125°C
+25°C
–40°C
200mV/DIV
800
600
INPUT
2
2V/DIV
400
200
0
OUTPUT
1
TIME (2µs/DIV)
–4
–3
–2
–1
0
1
2
3
4
V
(mV)
OS
Figure 17. Differential Overload Recovery, Falling
Figure 20. Offset Distribution
400
350
300
250
200
2
1
2V/DIV
0.01%/DIV
150
100
50
0
TIME (20µs/DIV)
–20
–15
–10
–5
0
5
10
15
20
OFFSET DRIFT (µV/°C)
Figure 18. Settling Time, Rising
Figure 21. Offset Drift Distribution
Rev. A | Page 8 of 16
AD8208
2400
2100
1800
1500
1200
900
2400
2100
1800
1500
1200
+125°C
+25°C
–40°C
900
600
300
0
600
300
0
–15
–10
–5
0
5
10
15
–0.3
–0.2
–0.1
0
0.1
0.2
0.3
GAIN ERROR (%)
GAIN DRIFT (ppm/°C)
Figure 23. Gain Error
Figure 22. Gain Drift Distribution
Rev. A | Page 9 of 16
AD8208
THEORY OF OPERATION
The AD8208 is a single-supply difference amplifier typically used
to amplify a small differential voltage in the presence of rapidly
changing, high common-mode voltages.
by connecting A1 to A2 and placing a capacitor to ground (see
Figure 33).
The value of RF1 and RF2 is 10 kꢀ, providing a gain of 2 V/V for
Amplifier A2. When connecting Pin A1 and Pin A2 together, the
AD8208 provides a total system gain equal to
The AD8208 consists of two amplifiers (A1 and A2), a resistor
network, a small voltage reference, and a bias circuit (not shown);
see Figure 24.
Total Gain of (A1 + A2) (V/V) = 10 (V/V) × 2 (V/V) = 20 V/V
The set of input attenuators preceding A1 consists of RA, RB, and
RC, which feature a combined series resistance of approximately
400 kꢀ 20ꢁ. The purpose of these resistors is to attenuate the
input voltage to match the input voltage range of A1. This balanced
resistor network attenuates the common-mode signal by a ratio
of 1/14. The A1 amplifier inputs are held within the power supply
range, even as Pin 1 and Pin 8 exceed the supply or fall below the
common (ground). A reference voltage of 350 mV biases the
attenuator above ground, allowing Amplifier A1 to operate in
the presence of negative common-mode voltages.
at the output of A2 (the OUT pin).
The ratios of RA, RB, RC, and RF are trimmed to a high level of
precision, allowing a typical CMRR value that exceeds 80 dB. This
performance is accomplished by laser trimming the resistor ratio
matching to better than 0.01ꢁ.
V
–IN
+IN
A1 A2
S
R
R
R
A
A
FILTER
+
–
+
–
A2
OUT
A1
R
R
F1
R
R
R
The input resistor network also attenuates normal (differential)
mode voltages. Therefore, A1 features a gain of 140 V/V to provide
a total system gain, from IN to the output of A1, equal to 10
V/V, as shown in the following equation:
B
B
C
R
G
R
M
R
F
F2
R
R
F
C
350mV
GND
Gain (A1) = 1/14 (V/V) × 140(V/V) = 10 V/V
A precision trimmed, 100 kꢀ resistor is placed in series with the
output of Amplifier A1. The user has access to this resistor via
an external pin (A1). A low-pass filter can be easily implemented
Figure 24. Simplified Schematic
Rev. A | Page 10 of 16
AD8208
APPLICATIONS INFORMATION
HIGH-SIDE CURRENT SENSING
WITH A LOW-SIDE SWITCH
HIGH-RAIL CURRENT SENSING
In the high-rail current-sensing configuration, the shunt resistor is
referenced to the battery. High voltage is present at the inputs of
the current-sense amplifier. When the shunt is battery referenced,
the AD8208 produces a linear ground-referenced analog output.
Additionally, the AD8214 can be used to provide an overcurrent
detection signal in as little as 100 ns (see Figure 27). This feature is
useful in high current systems where fast shutdown in overcurrent
conditions is essential.
In load control configurations for high-side current sensing with a
low-side switch, the PWM-controlled switch is ground referenced.
An inductive load (solenoid) connects to a power supply/battery.
A resistive shunt is placed between the switch and the load (see
Figure 25). An advantage of placing the shunt on the high side
is that the entire current, including the recirculation current, is
monitored because the shunt remains in the loop when the switch
is off. In addition, shorts to ground can be detected with the shunt
on the high side, enhancing the diagnostics of the control loop. In
this circuit configuration, when the switch is closed, the common-
mode voltage moves down to near the negative rail. When the
switch is opened, the voltage reversal across the inductive load
causes the common-mode voltage to be held one diode drop
above the battery by the clamp diode.
OVERCURRENT
DETECTION (<100ns)
5
6
7
8
OUT GND NC –IN
AD8214
NC V
4
+IN
2
V
1
REG
3
S
5V
CLAMP
DIODE
INDUCTIVE
LOAD
CLAMP
DIODE
OUTPUT
SHUNT
+
–
VS
+IN
NC
OUT
BATTERY
+
–IN
GND
A1
+IN
1
2
3
4
8
7
6
5
INDUCTIVE
LOAD
BATTERY
–
NC
5V
SHUNT
AD8208
V
AD8208
S
A2
OUT
SWITCH
C
F
–IN GND A1
A2
SWITCH
Figure 27. Battery-Referenced Shunt Resistor
C
F
LOW-SIDE CURRENT SENSING
NC = NO CONNECT
In systems where low-side current sensing is preferable, the
AD8208 provides a simple, high accuracy, integrated solution. In
this configuration, the AD8208 rejects ground noise and offers high
input to output linearity, regardless of the differential input voltage.
Figure 25. Low-Side Switch
In cases where a high-side switch is used for PWM control of the
load current in an application, the AD8208 can be used as shown
in Figure 26. The recirculation current through the freewheeling
diode (clamp diode) is monitored through the shunt resistor. In
this configuration, the common-mode voltage in the application
drops below GND when the FET is switched off. The AD8208
operates down to −2 V, providing an accurate current measurement.
5V
INDUCTIVE
LOAD
CLAMP
DIODE
5V
VS
SWITCH
OUTPUT
+IN NC
OUT
BATTERY
SWITCH
SHUNT
AD8208
OUTPUT
VS
+IN
NC
OUT
+
–
–IN GND A1
A2
BATTERY
SHUNT
AD8208
C
F
NC = NO CONNECT
–IN GND A1
A2
CLAMP
DIODE
Figure 28. Ground-Referenced Shunt Resistor
INDUCTIVE
LOAD
C
F
NC = NO CONNECT
Figure 26. High-Side Switch
Rev. A | Page 11 of 16
AD8208
4 mA to 20 mA Current Loop Receiver
used should be equal to 100 kΩ minus the parallel sum of REXT
and 100 kΩ. For example, with REXT = 100 kΩ (yielding a composite
gain of 10 V/V), the optional offset nulling resistor is 50 kΩ.
The AD8208 can also be used in low current-sensing applica-
tions, such as the 4 mA to 20 mA current loop receiver shown
in Figure 29. In such applications, the relatively large shunt
resistor may degrade the common-mode rejection. Adding a
resistor of equal value on the low impedance side of the input
corrects this error.
Gains Greater than 20
Connecting a resistor from the output of the buffer amplifier to
its noninverting input, as shown in Figure 31, increases the gain.
The gain is now multiplied by the factor
5V
R
EXT/(REXT − 100 kΩ)
10Ω
1%
OUTPUT
For example, it is doubled for REXT = 200 kΩ. Overall gains as
high as 50 are achievable in this way. Note that the accuracy of
the gain becomes critically dependent on the resistor value at
high gains. In addition, the effective input offset voltage at Pin 1
and Pin 8 (which is about six times the actual offset of A1) limits
the use of the part in high gain, dc-coupled applications.
5V
VS
+IN NC
OUT
+
–
BATTERY
10Ω
1%
AD8208
–IN GND A1
A2
OUTPUT
C
F
VS
+IN NC
OUT
20R
EXT
NC = NO CONNECT
GAIN =
R
– 100kΩ
EXT
+
–
Figure 29. 4 mA to 20 mA Current Loop Receiver
R
AD8208
EXT
V
DIFF
GAIN
R
= 100kΩ
EXT
GAIN – 20
GAIN ADJUSTMENT
–IN GND A1
A2
The default gain of the preamplifier and buffer are 10 V/V and
2 V/V, respectively, resulting in a composite gain of 20 V/V. With
the addition of external resistor(s) or trimmer(s), the gain can
be lowered, raised, or finely calibrated.
+
–
V
CM
Gains Less than 20
NC = NO CONNECT
Figure 31. Adjusting for Gains Greater than 20
Because the preamplifier has an output resistance of 100 kΩ, an
external resistor connected from Pin 3 and Pin 4 to GND decreases
the gain by the following factor (see Figure 30):
GAIN TRIM
Figure 32 shows a method for incremental gain trimming by
using a trim potentiometer and an external resistor, REXT
R
EXT/(100 kΩ + REXT)
.
5V
The following approximation is useful for small gain ranges:
ΔG ≈ (10 MΩ ÷ REXT)ꢁ
OUTPUT
V
S
+IN NC
OUT
For example, using this equation, the adjustment range is 2ꢁ
for REXT = 5 MΩ and 10ꢁ for REXT = 1 MΩ.
20R
EXT
GAIN =
R
+ 100kΩ
EXT
+
–
5V
AD8208
V
DIFF
GAIN
20 – GAIN
R
= 100kΩ
EXT
OUTPUT
–IN GND A1
A2
VS
+IN NC
OUT
+
–
V
R
EXT
CM
+
–
AD8208
V
DIFF
NC = NO CONNECT
–IN GND A1
A2
GAIN TRIM
Figure 30. Adjusting for Gains Less than 20
20kΩ MIN
R
EXT
+
–
The overall bandwidth is unaffected by changes in gain by using
this method, although there may be a small offset voltage due to
the imbalance in source resistances at the input to the buffer. In
many cases, this can be ignored, but if desired, the offset voltage can
be nulled by inserting a resistor in series with Pin 4. The resistor
V
CM
NC = NO CONNECT
Figure 32. Incremental Gain Trimming
Rev. A | Page 12 of 16
AD8208
Internal Signal Overload Considerations
If the gain is raised using a resistor, as shown in Figure 31, the
corner frequency is lowered by the same factor as the gain is raised.
Therefore, using a resistor of 200 kΩ (for which the gain would
be doubled), results in a corner frequency scaled to 0.796 Hz μF
(0.039 μF for a 20 Hz corner frequency).
When configuring the gain for values other than 20, the maximum
input voltage with respect to the supply voltage and ground must
be considered because either the preamplifier or the output buffer
reaches its full-scale output (VS − 0.1 V) with large differential
input voltages. The input of the AD8208 is limited to (VS − 0.1) ÷
10 for overall gains of ≤10 because the preamplifier, with its
fixed gain of 10 V/V, reaches its full-scale output before the
output buffer. For gains greater than 10, the swing at the buffer
output reaches its full scale first and then limits the AD8208
input to (VS − 0.1) ÷ G, where G is the overall gain.
5V
OUTPUT
V
+IN NC
OUT
S
C
+
–
AD8208
V
DIFF
fC(Hz) = 1/C(µF)
LOW-PASS FILTERING
–IN GND A1
A2
In many transducer applications, it is necessary to filter the signal
to remove spurious high frequency components, including noise,
or to extract the mean value of a fluctuating signal with a peak-
to-average ratio (PAR) greater than unity. For example, a full-wave
rectified sinusoid has a PAR of 1.57, a raised cosine has a PAR
of 2, and a half-wave sinusoid has a PAR of 3.14. Signals with
large spikes may have PARs of 10 or more.
+
–
255kΩ
V
CM
C
NC = NO CONNECT
Figure 34. Two-Pole, Low-Pass Filter
A two-pole filter with a roll-off of 40 dB/decade can be
implemented using the connections shown in Figure 34. This
configuration is a Sallen-Key form based on a ×2 amplifier. It is
useful to remember that a two-pole filter with a corner frequency
of f2 and a single-pole filter with a corner frequency of f1 have
the same attenuation, that is, 40 log (f2/f1), as shown in Figure 35.
Using the standard resistor value shown in Figure 34 and capacitors
of equal values, the corner frequency is conveniently scaled to
1 Hz μF (0.05 μF for a 20 Hz corner frequency). A maximal flat
response occurs when the resistor is lowered to 196 kΩ, scaling
the corner frequency to 1.145 Hz μF. The output offset is raised
by approximately 5 mV (equivalent to 250 μV at the input pins).
When implementing a filter, the PAR should be considered so
that the output of the AD8208 preamplifier (A1) does not clip
before A2; otherwise, the nonlinearity would be averaged and
appear as an error at the output. To avoid this error, both amplifiers
should clip at the same time. This condition is achieved when the
PAR is no greater than the gain of the second amplifier (2 for
the default configuration). For example, if a PAR of 5 is expected,
the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways by using
the features provided by the AD8208. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output
of A1 is connected to the input of A2 via the internal 100 kΩ
resistor by tying Pin 3 to Pin 4 and adding a capacitor from this
node to ground, as shown in Figure 33. If a resistor is added
across the capacitor to lower the gain, the corner frequency
increases; therefore, gain should be calculated using the parallel
sum of the resistor and 100 kΩ.
40dB/DECADE
20dB/DECADE
40log (f /f )
2
1
5V
OUTPUT
A 1-POLE FILTER, CORNER f , AND
1
VS
+IN NC
OUT
A 2-POLE FILTER, CORNER f , HAVE
2
THE SAME ATTENUATION –40log (f /f )
2
1
2
f /f
2 1
AT FREQUENCY
1
+
–
fC
=
5
AD8208
2πC10
V
DIFF
2
f /f
2 1
f
f
1
2
C IN FARADS
FREQUENCY
–IN GND A1
A2
Figure 35. Comparative Responses of Single-Pole and Two-Pole Low-Pass Filters
+
–
C
V
F
CM
NC = NO CONNECT
Figure 33. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor
Rev. A | Page 13 of 16
AD8208
diode regulates the common-mode potential applied to the device.
For example, a battery spike of 20 V may result in an applied
common-mode potential of 21.5 V to the input of the devices.
HIGH LINE CURRENT SENSING
WITH LPF AND GAIN ADJUSTMENT
The circuit shown in Figure 36 is similar to Figure 25, but
To produce a full-scale output of 4 V, a gain of 40 V/V is used,
adjustable by 5ꢁ to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10ꢁ overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
by a single-pole, low-pass filter that is set with a corner frequency
of 3.6 Hz, which provides about 30 dB of attenuation at 100 Hz.
A higher rate of attenuation can be obtained by using a two-pole
filter with a corner frequency of 20 Hz, as shown in Figure 37.
Although this circuit uses two separate capacitors, the total capaci-
tance is less than half of what is needed for the single-pole filter.
5V
includes gain adjustment and low-pass filtering.
5V
INDUCTIVE
LOAD
CLAMP
DIODE
OUTPUT
4V/AMP
VS
+IN NC
OUT
+
BATTERY
191kΩ
–
SHUNT
AD8208
20kΩ
–IN GND A1
A2
SWITCH
V
OS/IB
NULL
C
5% CALIBRATION RANGE
fC(Hz) = 0.767Hz/C(µF)
(0.22µF FOR fC = 3.6Hz)
NC = NO CONNECT
INDUCTIVE
LOAD
CLAMP
DIODE
OUTPUT
432kΩ
Figure 36. High Line Current-Sensor Interface;
Gain = 40 V/V, Single-Pole, Low-Pass Filter
VS
+IN NC
OUT
+
BATTERY
–
A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small-value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value is higher by an amount that depends on the
inductance of the load and the control frequency. The common-
mode voltage, on the other hand, extends from roughly 1 V above
ground for the on condition to about 1.5 V above the battery
voltage in the off condition. The conduction of the clamping
C
SHUNT
AD8208
50kΩ
–IN GND A1
A2
SWITCH
127kΩ
fC(Hz) = 1/C(µF)
(0.05µF FOR fC = 20Hz)
C
NC = NO CONNECT
Figure 37. Two-Pole Low-Pass Filter
Rev. A | Page 1± of 16
AD8208
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2441)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 38. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
3.20
3.00
2.80
8
1
5
4
5.15
4.90
4.65
3.20
3.00
2.80
PIN 1
IDENTIFIER
0.65 BSC
0.95
0.85
0.75
15° MAX
1.10 MAX
0.80
0.55
0.40
0.15
0.05
0.23
0.09
6°
0°
0.40
0.25
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-187-AA
Figure 39. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Description
Package Option
Branding
AD8208WBRZ
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
−±0°C to +125°C
8-Lead SOIC_N
R-8
AD8208WBRZ-R7
AD8208WBRZ-RL
AD8208WBRMZ
AD8208WBRMZ-R7
AD8208WBRMZ-RL
8-Lead SOIC_N, 7”Tape and Reel
8-Lead SOIC_N, 13”Tape and Reel
R-8
R-8
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
8-Lead Mini Small Outline Package [MSOP]
RM-8
RM-8
RM-8
Y2F
Y2F
Y2F
1 Z = RoHS Compliant Part.
Rev. A | Page 15 of 16
AD8208
NOTES
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08714-0-5/10(A)
Rev. A | Page 16 of 16
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