AD810AR-REEL7 [ADI]
1 CHANNEL, VIDEO AMPLIFIER, PDSO8, PLASTIC, SOIC-8;
| 型号： | AD810AR-REEL7 |
| 厂家： | 
ADI |
| 描述： | 1 CHANNEL, VIDEO AMPLIFIER, PDSO8, PLASTIC, SOIC-8 放大器 光电二极管 |
| 文件： | 总17页 (文件大小：564K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Power
Video Op Amp with Disable
a
AD810
CO NNECTIO N D IAGRAM
FEATURES
High Speed
8-P in P lastic Mini-D IP (N), SO IC (R)
and Cer dip (Q ) P ackages
80 MHz Bandw idth (3 dB, G = +1)
75 MHz Bandw idth (3 dB, G = +2)
1000 V/ s Slew Rate
50 ns Settling Tim e to 0.1% (VO = 10 V Step)
Ideal for Video Applications
30 MHz Bandw idth (0.1 dB, G = +2)
0.02% Differential Gain
OFFSET
1
2
8
7
6
DISABLE
AD810
NULL
–IN
+V
S
+IN
3
4
OUTPUT
OFFSET
NULL
5
–V
S
TOP VIEW
0.04؇ Differential Phase
Low Noise
2.9 nV/ √Hz Input Voltage Noise
13 pA/ √Hz Inverting Input Current Noise
Low Pow er
8.0 m A Supply Current m ax
2.1 m A Supply Current (Pow er-Dow n Mode)
High Perform ance Disable Function
Turn-Off Tim e 100 ns
Break Before Make Guaranteed
Input to Output Isolation of 64 dB (OFF State)
Flexible Operation
P RO D UCT D ESCRIP TIO N
T he AD810 is a composite and HDT V compatible, current
feedback, video operational amplifier, ideal for use in systems
such as multimedia, digital tape recorders and video cameras.
T he 0.1 dB flatness specification at bandwidth of 30 MHz
(G = +2) and the differential gain and phase of 0.02% and
0.04° (NT SC) make the AD810 ideal for any broadcast quality
video system. All these specifications are under load conditions
of 150 Ω (one 75 Ω back terminated cable).
T he AD810 is ideal for power sensitive applications such as
video cameras, offering a low power supply current of 8.0 mA
max. T he disable feature reduces the power supply current to
only 2.1 mA, while the amplifier is not in use, to conserve
power. Furthermore the AD810 is specified over a power supply
range of ±5 V to ±15 V.
Specified for ؎5 V and ؎15 V Operation
؎2.9 V Output Sw ing Into a 150 ⍀ Load (VS = ؎5 V)
APPLICATIONS
Professional Video Cam eras
Multim edia System s
NTSC, PAL & SECAM Com patible System s
Video Line Driver
ADC/ DAC Buffer
T he AD810 works well as an ADC or DAC buffer in video
systems due to its unity gain bandwidth of 80 MHz. Because the
AD810 is a transimpedance amplifier, this bandwidth can be
maintained over a wide range of gains while featuring a low
noise of 2.9 nV/√Hz for wide dynamic range applications.
DC Restoration Circuits
0.20
0.18
0.16
0.14
0.12
0.10
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
0
GAIN = +2
GAIN = +2
R
R
f
= 715Ω
= 150Ω
= 3.58MHz
F
L
–45
R
= 150Ω
L
PHASE
GAIN
C
–90
100 IRE
MODULATED RAMP
1
0
–135
–180
V
S
= ±15V
±5V
GAIN
–225
–270
0.08
0.06
0.04
–1
–2
PHASE
±2.5V
V
= ±15V
S
–3
–4
±5V
0.02
0
±2.5V
–5
5
6
7
8
9
10
11
12
13
14
15
1
10
100
FREQUENCY – MHz
1000
SUPPLY VOLTAGE – ± Volts
Closed-Loop Gain and Phase vs. Frequency, G = +2,
Differential Gain and Phase vs. Supply Voltage
RL = 150, RF = 715 Ω
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703
AD810* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
View a parametric search of comparable parts.
DESIGN RESOURCES
• AD810 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
EVALUATION KITS
• Universal Evaluation Board for Single High Speed
Operational Amplifiers
DISCUSSIONS
View all AD810 EngineerZone Discussions.
DOCUMENTATION
Data Sheet
• AD810: Low Power Video Op Amp with Disable Data
Sheet
SAMPLE AND BUY
Visit the product page to see pricing options.
• AD810: Military Data Sheet
User Guides
TECHNICAL SUPPORT
Submit a technical question or find your regional support
number.
• UG-135: Evaluation Board for Single, High Speed
Operational Amplifiers (8-Lead SOIC and Exposed Paddle)
TOOLS AND SIMULATIONS
• AD810 SPICE Macro-Model
DOCUMENT FEEDBACK
Submit feedback for this data sheet.
REFERENCE MATERIALS
Tutorials
• MT-034: Current Feedback (CFB) Op Amps
• MT-051: Current Feedback Op Amp Noise Considerations
• MT-057: High Speed Current Feedback Op Amps
• MT-059: Compensating for the Effects of Input
Capacitance on VFB and CFB Op Amps Used in Current-to-
Voltage Converters
This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
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(@ T = +25؇C and V = ؎15 V dc, R = 150 ⍀ unless otherwise noted)
AD810–SPECIFICATIONS
A
S
L
AD 810A
Typ
AD 810S1
Typ
P ar am eter
Conditions
VS
Min
Max
Min
Max
Units
DYNAMIC PERFORMANCE
3 dB Bandwidth
(G = +2) RFB = 715
(G = +2) RFB = 715
(G = +1) RFB = 1000
(G = +10) RFB = 270
(G = +2) RFB = 715
(G = +2) RFB = 715
VO = 20 V p-p,
RL = 400 Ω
RL = 150 Ω
RL = 400 Ω
10 V Step, G = –1
10 V Step, G = –1
f = 3.58 MHz
±5 V
40
55
40
50
13
15
50
75
80
65
22
30
40
55
40
50
13
15
50
75
80
65
22
30
MHz
MHz
MHz
MHz
MHz
MHz
±15 V
±15 V
±15 V
±5 V
0.1 dB Bandwidth
Full Power Bandwidth
Slew Rate2
±15 V
±15 V
±5 V
16
16
MHz
V/µs
V/µs
ns
ns
%
350
1000
50
125
0.02
0.04
0.04
350
1000
50
125
0.02
0.04
0.04
±15 V
±15 V
±15 V
±15 V
±5 V
Settling T ime to 0.1%
Settling T ime to 0.01%
Differential Gain
0.05
0.07
0.07
0.05
0.07
0.07
f - 3.58 MHz
f = 3.58 MHz
f = 3.58 MHz
%
Differential Phase
±15 V
±5 V
Degrees
Degrees
0.045 0.08
0.045 0.08
T otal Harmonic Distortion
f = 10 MHz, VO = 2 V p-p
RL = 400 Ω, G = +2
±15 V
–61
–61
dBc
INPUT OFFSET VOLT AGE
Offset Voltage Drift
±5 V, ±15 V
±5 V, ±15 V
1.5
2
7
6
7.5
1.5
4
15
6
15
mV
mV
µV/°C
T MIN–T MAX
INPUT BIAS CURRENT
–Input
+Input
T MIN–T MAX
T MIN–T MAX
±5 V, ±15 V
±5 V, ±15 V
0.7
2
5
7.5
0.8
2
5
10
µA
µA
OPEN-LOOP
T MIN–T MAX
T RANSRESIST ANCE
VO = ±10 V, RL = 400 Ω
VO = ±2.5 V, RL = 100 Ω
±15 V
±5 V
1.0
0.3
3.5
1.2
1.0
0.2
3.5
1.0
MΩ
MΩ
OPEN-LOOP
T MIN–T MAX
DC VOLT AGE GAIN
VO = ±10 V, RL = 400 Ω
VO = ±2.5 V, RL = 100 Ω
±15 V
±5 V
86
76
100
88
80
72
100
88
dB
dB
COMMON-MODE REJECT ION
VOS
T MIN–T MAX
VCM = ±12 V
VCM = ±2.5 V
T MIN–T MAX
±15 V
±5 V
±5 V, ±15 V
56
52
64
60
0.1
56
50
64
60
0.1
dB
dB
µA/V
±Input Current
0.4
0.3
0.4
0.3
POWER SUPPLY REJECT ION
VOS
±Input Current
±4.5 V to ±18 V
T MIN–T MAX
T MIN–T MAX
65
72
0.05
60
72
0.05
dB
µA/V
INPUT VOLT AGE NOISE
INPUT CURRENT NOISE
f = 1 kHz
±5 V, ±15 V
2.9
2.9
nV/√Hz
–IIN, f = 1 kHz
+IIN, f = 1 kHz
±5 V, ±15 V
±5 V, ±15 V
13
1.5
13
1.5
pA/√Hz
pA/√Hz
INPUT COMMON-MODE
VOLT AGE RANGE
±5 V
±15 V
±2.5
±12
±3.0
±13
±2.5
±12
±3
±13
V
V
OUT PUT CHARACT ERIST ICS
Output Voltage Swing3
RL = 150 Ω, TMIN–T MAX
RL = 400 Ω
±5 V
±15 V
±2.5
±12.5 ±12.9
±2.9
±2.5
±12.5 ±12.9
±2.9
V
V
RL = 400 Ω, TMIN–T MAX
±15 V
±12
±12
V
Short-Circuit Current
Output Current
±15 V
±5 V, ±15 V
150
60
150
60
mA
mA
T MIN–T MAX
40
30
OUT PUT RESIST ANCE
Open Loop (5 MHz)
15
15
Ω
INPUT CHARACT ERIST ICS
Input Resistance
+Input
–Input
+Input
±15 V
±15 V
±15 V
2.5
10
40
2
2.5
10
40
2
MΩ
Ω
pF
Input Capacitance
DISABLE CHARACT ERIST ICS4
OFF Isolation
OFF Output Impedance
f = 5 MHz, See Figure 43
See Figure 43
64
64
dB
(RF + RG)ʈ13 pF
(RF+ RG)ʈ13 pF
–2–
REV. A
AD810
AD 810A
Typ
AD 810S1
Typ
P ar am eter
Conditions
VS
Min
Max
Min
Max
Units
T urn On T ime5
T urn Off T ime
Disable Pin Current
ZOUT = Low, See Figure 54
ZOUT = High
Disable Pin = 0 V
170
100
50
170
100
50
ns
ns
µA
µA
±5 V
±15 V
75
400
75
400
290
290
Min Disable Pin Current to
Disable
T MIN–T MAX
±5 V, ±15 V
30
30
µA
POWER SUPPLY
Operating Range
+25°C to T MAX
T MIN
±2.5
±3.0
±18
±18
7.5
8.0
10.0
2.3
±2.5
±3.5
±18
±18
7.5
8.0
11.0
2.3
V
V
Quiescent Current
±5 V
±15 V
±5 V, ±15 V
±5 V
±15 V
6.7
6.8
8.3
1.8
2.1
6.7
6.8
9
1.8
2.1
mA
mA
mA
mA
mA
T MIN–T MAX
Power-Down Current
NOT ES
2.8
2.8
1See Analog Devices Military Data Sheet for 883B Specifications.
2Slew rate measurement is based on 10% to 90% rise time with the amplifier configured for a gain of –10.
3Voltage Swing is defined as useful operating range, not the saturation range.
4Disable guaranteed break before make.
5T urn On T ime is defined with ±5 V supplies using complementary output CMOS to drive the disable pin.
Specifications subject to change without notice.
ABSO LUTE MAXIMUM RATINGS1
MAXIMUM P O WER D ISSIP ATIO N
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Internal Power Dissipation2 . . . . . . . Observe Derating Curves
Output Short Circuit Duration . . . . Observe Derating Curves
Common-Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . ±VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6 V
Storage T emperature Range
Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Small Outline IC . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating T emperature Range
T he maximum power that can be safely dissipated by the
AD810 is limited by the associated rise in junction temperature.
For the plastic packages, the maximum safe junction tempera-
ture is 145°C. For the cerdip package, the maximum junction
temperature is 175°C. If these maximums are exceeded momen-
tarily, proper circuit operation will be restored as soon as the die
temperature is reduced. Leaving the device in the “overheated”
condition for an extended period can result in device burnout.
T o ensure proper operation, it is important to observe the
derating curves.
AD810A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD810S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead T emperature Range (Soldering 60 sec) . . . . . . . +300°C
2.4
2.2
8-PIN
2.0
MINI-DIP
1.8
1.6
NOT ES
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. T his is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum raring conditions for extended periods may affect device reliability.
28-Pin Plastic Package: θJA = 90°C/Watt; 8-Pin Cerdip Package: θJA = 110°C/Watt;
8-Pin SOIC Package: θJA = 150°C/Watt.
1.4
8-PIN
1.2
1.0
CERDIP
8-PIN
MINI-DIP
8-PIN
SOIC
0.8
0.6
0.4
–60 –40 –20
0
20
40
60
80
100 120 140
AMBIENT TEMPERATURE –
°
C
ESD SUSCEP TIBILITY
ESD (electrostatic discharge) sensitive device. Electrostatic
charges as high as 4000 volts, which readily accumulate on the
human body and on test equipment, can discharge without
detection. Although the AD810 features ESD protection
circuitry, permanent damage may still occur on these devices if
they are subjected to high energy electrostatic discharges.
T herefore, proper ESD precautions are recommended to avoid
any performance degradation or loss of functionality.
Maxim um Power Dissipation vs. Tem perature
While the AD810 is internally short circuit protected, this may
not be sufficient to guarantee that the maximum junction
temperature is not exceeded under all conditions.
SEE TEXT
+V
0.1µF
S
10kΩ
7
1
2
3
O RD ERING GUID E
5
6
AD810
4
Tem perature
Range
P ackage
D escription
P ackage
O ption
0.1µF
Model
–V
S
AD810AN
AD810AR
AD810AR-REEL
–40°C to +85°C 8-Pin Plastic DIP N-8
–40°C to +85°C 8-Pin Plastic SOIC R-8
–40°C to +85°C 8-Pin Plastic SOIC R-8
Offset Null Configuration
5962-9313201MPA –55°C to +125°C 8-Pin Cerdip
Q-8
REV. A
–3–
–Typical Characteristics
AD810
20
20
15
10
15
10
NO LOAD
NO LOAD
R
= 150Ω
L
R
= 150Ω
L
5
0
5
0
0
5
10
SUPPLY VOLTAGE – ±Volts
15
20
0
5
10
SUPPLY VOLTAGE – ±Volts
15
20
Figure 1. Input Com m on-Mode Voltage Range vs.
Supply Voltage
Figure 2. Output Voltage Swing vs. Supply
35
10
30
9
8
7
±15V SUPPLY
V
= ±15V
S
25
V
= ±5V
S
20
15
6
5
10
±5V SUPPLY
5
4
0
–60 –40 –20
0
20
40
60
80
100 120 140
10
100
1k
10k
JUNCTION TEMPERATURE – °C
LOAD RESISTANCE – Ohms
Figure 3. Output Voltage Swing vs. Load Resistance
Figure 4. Supply Current vs. J unction Tem perature
10
10
8
8
6
4
6
NONINVERTING INPUT
4
2
V
= ±5V, ±15V
S
V
= ±5V
S
2
0
0
V
= ±15V
–2
S
–2
–4
INVERTING INPUT
= ±5V, ±15V
–4
–6
V
S
–6
–8
–8
–10
–10
–60 –40 –20
0
20
40
60
80 100 120 140
–60 –40 –20
20
40
60
80
100 120 140
0
JUNCTION TEMPERATURE – °C
JUNCTION TEMPERATURE –
°
C
Figure 6. Input Offset Voltage vs. J unction Tem perature
Figure 5. Input Bias Current vs. Tem perature
–4–
REV. A
AD810
Typical Characteristics–
120
100
250
200
150
100
50
V
= ±15V
S
V
= ±15V
S
80
60
V
=±5V
S
40
V
= ±5V
S
20
–60 –40 –20
0
+20 +40 +60 +80 +100 +120 +140
–60 –40 –20
0
+20 +40 +60 +80 +100 +120 +140
JUNCTION TEMPERATURE –
°
C
JUNCTION TEMPERATURE –
°
C
Figure 8. Linear Output Current vs. Tem perature
Figure 7. Short Circuit Current vs. Tem perature
1M
10.0
V
= ±5V
GAIN = 2
= 715Ω
S
100k
R
F
1.0
10k
1k
V
= ±15V
S
0.1
0.01
100
100k
10k
100k
1M
FREQUENCY – Hz
10M
100M
1M
10M
100M
FREQUENCY – Hz
Figure 10. Output Resistance vs. Frequency,
Disabled State
Figure 9. Closed-Loop Output Resistance vs. Frequency
100
100
10
1
30
V
= ±15V
S
V
= ±5V TO ±15V
S
25
20
15
±
INVERTING INPUT
CURRENT NOISE
OUTPUT LEVEL FOR 3% THD
= 400Ω
R
L
10
VOLTAGE NOISE
10
5
V
= ±5V
S
NONINVERTING INPUT
CURRENT NOISE
1
100k
0
100k
10
100
1k
FREQUENCY – Hz
10k
1M
10M
100M
FREQUENCY – Hz
Figure 12. Input Voltage and Current Noise vs. Frequency
Figure 11. Large Signal Frequency Response
REV. A
–5–
–Typical Characteristics
AD810
80
70
100
R
= 715Ω
F
90
A
= +2
V
60
50
40
30
20
10
80
70
60
V
= ±15V
S
V
= ±5V
S
50
CURVES ARE FOR WORST CASE
CONDITION WHERE ONE SUPPLY
IS VARIED WHILE THE OTHER IS
HELD CONSTANT
40
30
20
100k
1M
10M
100M
10k
100k
1M
FREQUENCY – Hz
10M
100M
10k
FREQUENCY – Hz
Figure 13. Com m on-Mode Rejection vs. Frequency
Figure 14. Power Supply Rejection vs. Frequency
–40
–40
±15V SUPPLIES
V
R
= 2V p-p
O
–60
–80
GAIN = +2
= 400Ω
= 100Ω
L
V
= ±5V
S
R
GAIN = +2
L
–60
–80
2nd HARMONIC
V
= 20V p-p
OUT
3rd HARMONIC
2nd HARMONIC
3rd HARMONIC
–100
–120
V
= ±15V
–100
–120
S
V
= 2V p-p
OUT
2nd
3rd
2nd
3rd
–140
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 15. Harm onic Distortion vs. Frequency (RL = 100 Ω)
Figure 16. Harm onic Distortion vs. Frequency (RL = 400 Ω)
10
8
1200
R
= 400Ω
L
6
1000
800
600
400
0.01%
4
2
0.1%
GAIN = –10
GAIN = +10
R
R
= R = 1kΩ
F
G
0
= 400Ω
L
–2
–4
–6
0.1%
0.01%
GAIN = +2
–8
–10
200
2
4
6
8
10
12
14
16
18
0
20
40
60
80
100 120 140 160 180 200
SUPPLY VOLTAGE – ±Volts
SETTLING TIME – ns
Figure 17. Output Swing and Error vs. Settling Tim e
Figure 18. Slew Rate vs. Supply Voltage
–6–
REV. A
Typical Characteristics, Noninverting Connection–AD810
1V
R
20nS
F
100
90
V
+V
IN
S
0.1µF
V
TO
O
TEKTRONIX
P6201 FET
PROBE
R
G
7
2
3
V
O
6
AD810
4
V
O
V
IN
R
L
0.1µF
10
HP8130
PULSE
50Ω
0%
GENERATOR
–V
S
1V
Figure 19. Noninverting Am plifier Connection
Figure 20. Sm all Signal Pulse Response, Gain = +1,
RF = 1 kΩ, RL = 150 Ω, VS = ±15 V
0
0
GAIN = +1
GAIN = +1
–45
–45
R
= 150Ω
L
R
= 1kΩ
PHASE
L
PHASE
–90
–90
1
0
–135
–180
–135
–180
1
0
V
S
= ±15V
V
= ±15V
S
±5V
±5V
±2.5V
–225
–270
–1
–2
–225
–270
–1
–2
GAIN
±2.5V
GAIN
V
= ±15V
S
V
= ±15V
S
–3
–4
–5
–3
–4
±5V
±5V
±2.5V
±2.5V
–5
1
10
100
1000
1
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
Figure 21. Closed-Loop Gain and Phase vs. Frequency,
Figure 22. Closed-Loop Gain and Phase vs. Frequency,
G= +1. RF = 1 kΩ for ±15 V, 910 Ω for ±5 V and ±2.5 V
G= +1, RF = 1 kΩ for ±15 V, 910 Ω for ±5 V and ±2.5 V
110
200
G = +1
180
G = +1
100
90
R
V
= 1kΩ
R
V
= 150Ω
= 250mV p-p
L
L
PEAKING 1dB
≤
160
= 250mV p-p
O
O
PEAKING ≤ 1dB
80
70
140
120
100
R
= 750Ω
F
60
≤
PEAKING 0.1 dB
≤
R
= 750Ω
PEAKING 0.1dB
F
50
40
80
60
R
= 1kΩ
F
R
= 1kΩ
F
40
20
30
20
R
F
= 1.5kΩ
R
= 1.5kΩ
F
2
4
6
8
10
12
14
16
18
2
4
6
8
10
12
14
16
18
SUPPLY VOLTAGE – ±Volts
SUPPLY VOLTAGE – ±Volts
Figure 23. Bandwidth vs. Supply Voltage,
Figure 24. –3 dB Bandwidth vs. Supply Voltage
Gain = +1, RL = 150 Ω
G = +1, RL = 1 kΩ
REV. A
–7–
AD810
–Typical Characteristics, Noninverting Connection
100mV
20nS
1V
50nS
100
90
100
V
IN
V
IN 90
V
V
O
O
10
10
0%
0%
1V
10V
Figure 26. Large Signal Pulse Response, Gain = +10,
RF = 442 Ω, RL = 400 Ω, VS = ±15 V
Figure 25. Sm all Signal Pulse Response, Gain = +10,
RF = 442 Ω, RL = 150 Ω, VS = ±15 V
0
GAIN = +10
0
GAIN = +10
R
R
= 270Ω
= 150Ω
F
L
–45
–45
R
R
= 270Ω
= 1kΩ
F
L
PHASE
PHASE
–90
–90
–135
21
20
21
20
19
18
17
16
15
–135
–180
–180
–225
V
= ±15V
S
V
= ±15V
S
19
18
17
–225
–270
±5V
±5V
GAIN
GAIN
–270
V
= ±15V
S
V
= ±15V
±5V
S
±2.5V
±2.5V
±5V
16
15
±2.5V
±2.5V
1
1000
10
100
1
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
Figure 28. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 1 kΩ
Figure 27. Closed-Loop Gain and Phase vs. Frequency,
G = +10, RL = 150 Ω
G = +10
100
100
R
= 1kΩ
L
G = +10
90
90
80
70
60
50
40
30
20
V
= 250m V p-p
O
R
= 150Ω
L
80
70
60
50
40
30
20
V
= 250mV p-p
O
PEAKING 0.5dB
≤
R
R
= 232Ω
= 442Ω
F
≤
PEAKING 0.5dB
R
= 232Ω
F
≤
PEAKING 0.1dB
≤
PEAKING 0.1dB
F
R
= 442Ω
= 1kΩ
F
R
F
R
= 1kΩ
F
2
4
6
8
10
12
14
16
18
2
4
6
8
10
12
14
16
18
SUPPLY VOLTAGE – ±Volts
SUPPLY VOLTAGE – ±Volts
Figure 29. –3 dB Bandwidth vs. Supply Voltage,
Figure 30. –3 dB Bandwidth vs. Supply Voltage,
Gain = +10, RL = 1 kΩ
Gain = +10, RL = 150 Ω
–8–
REV. A
AD810
Typical Characteristics, Inverting Connection–
1V
20nS
R
F
100
90
V
IN
+V
S
0.1µF
0.1µF
V
TO
O
TEKTRONIX
P6201 FET
PROBE
R
G
7
V
2
3
IN
V
HP8130
PULSE
V
O
6
AD810
4
O
GENERATOR
R
L
10
0%
1V
–V
S
Figure 31. Inverting Am plifier Connection
Figure 32. Sm all Signal Pulse Response, Gain = –1,
RF = 681 Ω, RL = 150 Ω, VS = ±5 V
180
180
135
GAIN = –1
GAIN = –1
135
90
R
= 150Ω
L
PHASE
PHASE
R
= 1kΩ
L
90
45
0
1
0
45
1
0
0
V
= ±15V
V
S
= ±15V
S
±5V
±5V
–45
–1
–45
–1
GAIN
GAIN
±2.5V
±2.5V
–90
–90
–2
–3
–4
–2
–3
–4
V
= ±15V
±5V
V
= ±15V
±5V
S
S
±2.5V
±2.5V
–5
–5
1
1
10
100
1000
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
Figure 33. Closed-Loop Gain and Phase vs. Frequency
G = –1, RL = 150 Ω, RF = 681 Ω for ±15 V, 620 Ω for ±5 V
and ±2.5 V
Figure 34. Closed-Loop Gain and Phase vs. Frequency,
G = –1, RL = 1 kΩ, RF = 681 Ω for VS = ±15 V, 620 Ω for
±5 V and ±2.5 V
G = –1
100
180
R
= 150
L
G = –1
160
90
80
70
60
50
40
30
20
V
= 250mV p-p
O
R
V
= 1kΩ
L
PEAKING 1.0dB
≤
140
120
100
80
= 250mV p-p
O
R
= 500Ω
= 681Ω
F
≤
PEAKING 1.0dB
≤
R
F
= 500Ω
PEAKING 0.1dB
R
F
60
≤
PEAKING 0.1dB
R
F
= 649Ω
= 1kΩ
40
R
6
= 1kΩ
F
R
F
20
2
4
6
8
10
12
14
16
18
2
4
8
10
12
14
16
18
SUPPLY VOLTAGE – ±Volts
SUPPLY VOLTAGE – ±Volts
Figure 35. –3 dB Bandwidth vs. Supply Voltage,
Figure 36. –3 dB Bandwidth vs. Supply Voltage,
Gain = –1, RL = 150 Ω
Gain = –1, RL = 1 kΩ
REV. A
–9–
AD810
–Typical Characteristics, Inverting Connection
1V
100mV
20nS
50nS
100
90
100
90
V
V
IN
IN
V
V
O
O
10
10
0%
0%
10V
1V
Figure 38. Large Signal Pulse Response, Gain = –10,
Figure 37. Sm all Signal Pulse Response, Gain = –10,
RF = 442 Ω, RL = 400 Ω, VS = ±15 V
RF = 442 Ω, RL = 150 Ω, VS = ±15 V
180
180
GAIN = –10
GAIN = –10
135
90
135
90
R
R
= 249Ω
= 1kΩ
F
L
PHASE
PHASE
R
R
= 249Ω
= 150Ω
F
L
45
21
20
19
18
17
16
15
21
20
19
18
17
16
15
45
0
0
V = ±15V
S
V
= ±15V
S
–45
–45
–90
±5V
±5V
GAIN
GAIN
±2.5V
–90
±2.5V
V
= ±15V
S
V
= ±15V
±5V
S
±5V
±2.5V
±2.5V
1
1
10
100
1000
10
100
1000
FREQUENCY – MHz
FREQUENCY – MHz
Figure 40. Closed-Loop Gain and Phase vs. Frequency,
Figure 39. Closed-Loop Gain and Phase vs. Frequency,
G = –10, RL = 1 kΩ
G = –10, RL = 150 Ω
100
100
G = –10
NO PEAKING
G = –10
NO PEAKING
90
80
70
60
50
40
30
20
R
= 150Ω
90
80
70
60
50
40
30
20
R
V
= 1kΩ
L
L
V
= 250mV p- p
= 250mV p- p
O
O
R
= 249Ω
F
R
= 249Ω
F
R
= 442Ω
F
R
= 442Ω
= 750Ω
F
R
F
R
= 750Ω
F
2
4
6
8
10
12
14
16
18
2
4
6
8
10
12
14
16
18
SUPPLY VOLTAGE – ±Volts
SUPPLY VOLTAGE – ±Volts
Figure 41. –3 dB Bandwidth vs. Supply Voltage, G = –10,
Figure 42. –3 dB Bandwidth vs. Supply Voltage, G = –10,
RL = 150 Ω
RL = 1 kΩ
–10–
REV. A
AD810
Applications–
GENERAL D ESIGN CO NSID ERATIO NS
P RINTED CIRCUIT BO ARD LAYO UT
T he AD810 is a current feedback amplifier optimized for use in
high performance video and data acquisition systems. Since it
uses a current feedback architecture, its closed-loop bandwidth
depends on the value of the feedback resistor. T able I below
contains recommended resistor values for some useful closed-
loop gains and supply voltages. As you can see in the table, the
closed-loop bandwidth is not a strong function of gain, as it
would be for a voltage feedback amp. T he recommended
resistor values will result in maximum bandwidths with less than
0.1 dB of peaking in the gain vs. frequency response.
As with all wideband amplifiers, PC board parasitics can affect
the overall closed-loop performance. Most important are stray
capacitances at the output and inverting input nodes. (An added
capacitance of 2 pF between the inverting input and ground will
add about 0.2 dB of peaking in the gain of 2 response, and
increase the bandwidth to 105 MHz.) A space (3/16" is plenty)
should be left around the signal lines to minimize coupling.
Also, signal lines connecting the feedback and gain resistors
should be short enough so that their associated inductance does
not cause high frequency gain errors. Line lengths less than 1/4"
are recommended.
T he –3 dB bandwidth is also somewhat dependent on the power
supply voltage. Lowering the supplies increases the values of
internal capacitances, reducing the bandwidth. T o compensate
for this, smaller values of feedback resistor are sometimes used
at lower supply voltages. T he characteristic curves illustrate that
bandwidths of over 100 MHz on 30 V total and over 50 MHz
on 5 V total supplies can be achieved.
Q UALITY O F CO AX CABLE
Optimum flatness when driving a coax cable is possible only
when the driven cable is terminated at each end with a resistor
matching its characteristic impedance. If coax were ideal, then
the resulting flatness would not be affected by the length of the
cable. While outstanding results can be achieved using
inexpensive cables, some variation in flatness due to varying
cable lengths is to be expected.
Table I. –3 dB Bandwidth vs. Closed-Loop Gain and
Resistance Values (RL = 150 ⍀)
P O WER SUP P LY BYP ASSING
VS = ؎15 V
Adequate power supply bypassing can be critical when
optimizing the performance of a high frequency circuit.
Inductance in the power supply leads can contribute to resonant
circuits that produce peaking in the amplifier's response. In
addition, if large current transients must be delivered to the
load, then bypass capacitors (typically greater than 1 µF) will be
required to provide the best settling time and lowest distortion.
Although the recommended 0.1 µF power supply bypass
capacitors will be sufficient in most applications, more elaborate
bypassing (such as using two paralleled capacitors) may be
required in some cases.
Closed-Loop
Gain
–3 dB BW
(MH z)
RFB
RG
+1
+2
+10
–1
–10
1 kΩ
80
75
65
70
65
715 Ω
270 Ω
681 Ω
249 Ω
715 Ω
30 Ω
681 Ω
24.9 Ω
VS = ؎5 V
Closed-Loop
Gain
–3 dB BW
(MH z)
RFB
RG
+1
+2
+10
–1
–10
910 Ω
715 Ω
270 Ω
620 Ω
249 Ω
50
50
50
55
50
P O WER SUP P LY O P ERATING RANGE
715 Ω
30 Ω
620 Ω
24.9 Ω
T he AD810 will operate with supplies from ±18 V down to
about ±2.5 V. On ±2.5 V the low distortion output voltage
swing will be better than 1 V peak to peak. Single supply
operation can be realized with excellent results by arranging for
the input common-mode voltage to be biased at the supply
midpoint.
ACH IEVING VERY FLAT GAIN RESP O NSE AT
H IGH FREQ UENCY
Achieving and maintaining gain flatness of better than 0.1 dB
above 10 MHz is not difficult if the recommended resistor
values are used. T he following issues should be considered to
ensure consistently excellent results.
O FFSET NULLING
A 10 kΩ pot connected between Pins 1 and 5, with its wiper
connected to V+, can be used to trim out the inverting input
current (with about ±20 µA of range). For closed-loop gains
above about 5, this may not be sufficient to trim the output
offset voltage to zero. T ie the pot's wiper to ground through a
large value resistor (50 kΩ for ±5 V supplies, 150 kΩ for ±15 V
supplies) to trim the output to zero at high closed-loop gains.
CH O ICE O F FEED BACK AND GAIN RESISTO R
Because the 3 dB bandwidth depends on the feedback resistor,
the fine scale flatness will, to some extent, vary with feedback
resistor tolerance. It is recommended that resistors with a 1%
tolerance be used if it is desired to maintain exceptional flatness
over a wide range of production lots.
REV. A
–11–
AD810
CAP ACITIVE LO AD S
When used with the appropriate feedback resistor, the AD810
can drive capacitive loads exceeding 1000 pF directly without
oscillation. By using the curves in Figure 45 to chose the resistor
value, less than 1 dB of peaking can easily be achieved without
sacrificing much bandwidth. Note that the curves were
generated for the case of a 10 kΩ load resistor, for smaller load
resistances, the peaking will be less than indicated by Figure 45.
1000
100
10
V
= ±5V
S
V
= ±15V
S
Another method of compensating for large load capacitances is
to insert a resistor in series with the loop output as shown in
Figure 43. In most cases, less than 50 Ω is all that is needed to
achieve an extremely flat gain response.
GAIN = +2
= 1kΩ
R
L
1
Figures 44 to 46 illustrate the outstanding performance that can
be achieved when driving a 1000 pF capacitor.
0
1k
2k
3k
4k
FEEDBACK RESISTOR – Ω
R
F
Figure 45. Max Load Capacitance for Less than 1 dB of
Peaking vs. Feedback Resistor
0.1µF
+V
S
1.0µF
R
G
7
5V
100nS
2
R
(OPTIONAL)
S
VIN
100
90
6
V
AD810
4
O
3
V
C
R
L
IN
1.0µF
0.1µF
L
R
T
–V
S
V
OUT
Figure 43. Circuit Options for Driving a Large
Capacitive Load
0%
5V
G = +2
V
= ±15V
S
9
6
3
0
R = 10kΩ
C
Figure 46. AD810 Driving a 1000 pF Load,
Gain = +2, RF = 750 Ω, RS = 11 Ω, RL = 10 kΩ
L
= 1000pF
L
D ISABLE MO D E
R
R
= 750Ω
= 11Ω
F
S
By pulling the voltage on Pin 8 to common (0 V), the AD810
can be put into a disabled state. In this condition, the supply
current drops to less than 2.8 mA, the output becomes a high
impedance, and there is a high level of isolation from input to
output. In the case of a line driver for example, the output
impedance will be about the same as for a 1.5 kΩ resistor (the
feedback plus gain resistors) in parallel with a 13 pF capacitor
(due to the output) and the input to output isolation will be
better than 65 dB at 1 MHz.
R
R
= 4.5kΩ
= 0
F
S
–3
–6
–9
1
10
100
FREQUENCY – MHz
Leaving the disable pin disconnected (floating) will leave the
AD810 operational in the enabled state.
Figure 44. Perform ance Com parison of Two Methods for
Driving a Large Capacitive Load
In cases where the amplifier is driving a high impedance load,
the input to output isolation will decrease significantly if the
input signal is greater than about 1.2 V peak to peak. T he
isolation can be restored back to the 65 dB level by adding a
dummy load (say 150 Ω) at the amplifier output. T his will
attenuate the feedthrough signal. (T his is not an issue for
multiplexer applications where the outputs of multiple AD810s
are tied together as long as at least one channel is in the ON
state.) T he input impedance of the disable pin is about 35 kΩ in
parallel with a few pF. When grounded, about 50 µA flows out
–12–
REV. A
AD810
0.20
0.18
0.16
0.14
0.12
0.10
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
of the disable the disable pin for ±5 V supplies. If driven by
complementary output CMOS logic (such as the 74HC04), the
disable time (until the output goes high impedance) is about
100 ns and the enable time (to low impedance output) is about
170 ns on ±5 V supplies. T he enable time can be extended to
about 750 ns by using open drain logic such as the 74HC05.
GAIN = +2
R
R
f
= 715Ω
= 150Ω
= 3.58MHz
F
L
C
100 IRE
MODULATED RAMP
When operated on ±15 V supplies, the AD810 disable pin may
be driven by open drain logic such as the 74C906. In this case,
adding a 10 kΩ pull-up resistor from the disable pin to the plus
supply will decrease the enable time to about 150 ns. If there is
a nonzero voltage present on the amplifier's output at the time it
is switched to the disabled state, some additional decay time will
be required for the output voltage to relax to zero. T he total
time for the output to go to zero will generally be about 250 ns
and is somewhat dependent on the load impedance.
GAIN
0.08
0.06
0.04
PHASE
0.02
0
5
6
7
8
9
10
11
12
13
14
15
SUPPLY VOLTAGE – ± Volts
Figure 49. Differential Gain and Phase vs. Supply Voltage
O P ERATIO N AS A VID EO LINE D RIVER
T he AD810 is designed to offer outstanding performance at
closed-loop gains of one or greater. At a gain of 2, the AD810
makes an excellent video line driver. T he low differential gain
and phase errors and wide –0.1 dB bandwidth are nearly
independent of supply voltage and load (as seen in Figures 49
and 50).
+0.1
R
= 150Ω
L
±15V
±5V
0
–0.1
±2.5
715Ω
715Ω
+0.1
0
+V
R = 1k
L
S
0.1µF
0.1µF
±15V
±5V
–0.1
7
75Ω
CABLE
2
3
75Ω
75Ω
CABLE
V
6
±2.5
OUT
AD810
4
V
IN
75Ω
1M
10M
FREQUENCY – Hz
100M
100k
75Ω
–V
S
Figure 50. Fine-Scale Gain (Norm alized) vs. Frequency
for Various Supply Voltages, Gain = +2, RF = 715 Ω
Figure 47. A Video Line Driver Operating at a Gain of +2
110
G = +2
100
0
PEAKING ≤ 1.0dB
R
= 150Ω
GAIN = +2
L
90
80
70
60
50
40
30
20
–45
R
= 150Ω
V
= 250mV p-p
L
O
R
= 500
PHASE
GAIN
F
–90
1
0
–135
–180
V
= ±15V
S
R
= 750
≤
PEAKING 0.1dB
F
±5V
–225
–270
–1
–2
±2.5V
R
= 1k
F
V
= ±15V
S
–3
–4
±5V
±2.5V
–5
2
4
6
8
10
12
14
16
18
1
10
100
FREQUENCY – MHz
1000
SUPPLY VOLTAGE - ±Volts
Figure 48. Closed-Loop Gain and Phase vs. Frequency,
Figure 51. –3 dB Bandwidth vs. Supply Voltage,
G = +2, RL = 150, RF = 715 Ω
Gain = +2, RL = 150 Ω
REV. A
–13–
AD810
2:1 VID EO MULTIP LEXER
750Ω
750Ω
T he outputs of two AD810s can be wired together to form a
2:1 mux without degrading the flatness of the gain response.
Figure 54 shows a recommended configuration which results in
–0.1 dB bandwidth of 20 MHz and OFF channel isolation of
77 dB at 10 MHz on ±5 V supplies. T he time to switch between
channels is about 0.75 µs when the disable pins are driven by
open drain output logic. Adding pull-up resistors to the logic
outputs or using complementary output logic (such as the
74HC04) reduces the switching time to about 180 ns. T he
switching time is only slightly affected by the signal level.
+5V
0.1µF
7
AD810
8
2
3
6
V
A
75Ω
CABLE
IN
4
0.1µF
75Ω
V
OUT
75Ω
–5V
75Ω
750Ω
750Ω
+5V
0.1µF
7
2
3
500mV
500nS
AD810
6
V
B
IN
100
90
0.1µF
4
8
75Ω
–5V
V
SW
10
74HC04
0%
5V
Figure 54. A Fast Switching 2:1 Video Mux
Figure 52. Channel Switching Tim e for the 2:1 Mux
0
PHASE
–40
–45
0.5
0
–90
–50
–60
–135
–180
–0.5
GAIN
–1.0
–225
–270
–1.5
–2.0
–70
–80
–90
V
= ±5V
S
–2.5
–3.0
1
10
FREQUENCY – MHz
100
1
10
100
FREQUENCY – MHz
Figure 55. 2:1 Mux ON Channel Gain and Phase vs.
Frequency
Figure 53. 2:1 Mux OFF Channel Feedthrough vs.
Frequency
–14–
REV. A
AD810
N:1 MULTIP LEXER
1kΩ
A multiplexer of arbitrary size can be formed by combining the
desired number of AD810s together with the appropriate
selection logic. T he schematic in Figure 58 shows a
recommendation for a 4:1 mux which may be useful for driving
a high impedance such as the input to a video A/D converter
(such as the AD773). T he output series resistors effectively
compensate for the combined output capacitance of the OFF
channels plus the input capacitance of the A/D while
maintaining wide bandwidth. In the case illustrated, the –0.1 dB
bandwidth is about 20 MHz with no peaking. Switching time
and OFF channel isolation (for the 4:1 mux) are about 250 ns
and 60 dB at 10 MHz, respectively.
+V
S
0.1µF
7
2
3
33Ω
6
AD810
4
V
V
V
, A
IN
8
75Ω
SELECT A
0.1µF
0.1µF
0.1µF
0.1µF
–V
S
1kΩ
+V
S
0.1µF
6
7
2
3
0
PHASE
33Ω
AD810
4
, B
–45
IN
8
0.5
0
–90
75Ω
SELECT B
–135
–180
–V
S
V
OUT
–0.5
–1.0
1kΩ
GAIN
+V
S
–225
V
= ±15V
S
R
C
L
L
0.1µF
R
C
= 10kΩ
–1.5
–2.0
–2.5
L
= 10pF
7
L
2
3
33Ω
6
AD810
4
, C
IN
8
–3.0
1
10
FREQUENCY – MHz
100
75Ω
SELECT C
–V
S
Figure 56. 4:1 Mux ON Channel Gain and Phase vs.
Frequency
1kΩ
+V
S
0.1µF
6
–30
–40
–50
7
2
3
33Ω
AD810
4
V
, D
IN
8
75Ω
SELECT D
–V
S
–60
–70
Figure 58. A 4:1 Multiplexer Driving a High Im pedance
1
10
100
FREQUENCY – MHz
Figure 57. 4:1 Mux OFF Channel Feedthrough vs.
Frequency
REV. A
–15–
AD810
O UTLINE D IMENSIO NS
D imensions shown in inches and (mm).
P lastic Mini-D IP (N) P ackage
8
5
0.25
(6.35)
0.31
(7.87)
PIN 1
1
4
0.30 (7.62)
REF
0.39 (9.91) MAX
0.035 ±0.01
(0.89 ±0.25)
0.165 ±0.01
(4.19 ±0.25)
0.011 ±0.003
(0.28 ±0.08)
0.18 ±0.03
(4.57 ±0.76)
0.125
(3.18)
MIN
15°
0°
0.018
±0.003
(0.46 ±0.08)
0.10
(2.54)
0.033
(0.84)
NOM
SEATING
PLANE
BSC
Cer dip (Q ) P ackage
0.055 (1.40) MAX
0.005 (0.13) MIN
8
5
0.310 (7.87)
0.220 (5.59)
PIN 1
1
4
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200
(5.08)
MAX
0.150
(3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
15°
0°
0.023 (0.58)
0.100
(2.54)
BSC
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
0.014 (0.36)
8-P in SO IC (R) P ackage
0.150 (3.81)
8
5
0.244 (6.20)
0.228 (5.79)
0.157 (3.99)
0.150 (3.81)
PIN 1
1
4
0.020 (0.051) x 45
CHAMF
°
0.190 (4.82)
0.170 (4.32)
0.197 (5.01)
0.189 (4.80)
8
0
°
°
0.090
(2.29)
0.102 (2.59)
0.094 (2.39)
0.010 (0.25)
0.004 (0.10)
10
°
0°
0.019 (0.48)
0.014 (0.36)
0.050
(1.27)
BSC
0.030 (0.76)
0.018 (0.46)
0.098 (0.2482)
0.075 (0.1905)
All brand or product names mentioned are trademarks or registered trademarks of their respective holders.
–16–
REV. A
相关型号：
AD810SQ/883B
IC OP-AMP, 15000 uV OFFSET-MAX, 100 MHz BAND WIDTH, CDIP8, CERDIP-8, Operational Amplifier
ADI
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