AD588 [ADI]
High Precision Voltage Reference; 高精度基准电压源
| 型号： | AD588 |
| 厂家： | 
ADI |
| 描述： | High Precision Voltage Reference |
| 文件： | 总16页 (文件大小：659K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Precision Voltage Reference
AD588*
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Low Drift: 1.5 ppm/؇C
Low Initial Error: 1 mV
NOISE
REDUCTION
A3 OUT
SENSE
V
A3 IN
HIGH
Pin Programmable Output:
+10 V, +5 V, +65 V Tracking, –5 V, –10 V
Flexible Output Force and Sense Terminals
High Impedance Ground Sense
Machine lnsertable DIP Packaging
MIL-STD-883 Compliant Versions Available
A3 OUT
FORCE
A3
R
B
A1
R1
A4 OUT
SENSE
R4
A4 OUT
FORCE
A4
R2
GENERAL DESCRIPTION
R5
The AD588 represents a major advance in the state-of-the-art
in monolithic voltage references. Low initial error and low tem-
perature drift give the AD588 absolute accuracy performance
previously not available in monolithic form. The AD588 uses a
proprietary ion-implanted buried Zener diode, and laser-wafer-
drift trimming of high stability thin-film resistors to provide
outstanding performance at low cost.
+V
S
R6
R3
AD588
A2
–V
S
GAIN
ADJ
GND
GND
V
BAL
ADJ
V
A4 IN
LOW
CT
SENSE SENSE
+IN
–IN
The AD588 includes the basic reference cell and three additional
amplifiers that provide pin programmable output ranges. The
amplifiers are laser-trimmed for low offset and low drift to main-
tain the accuracy of the reference. The amplifiers are configured
to allow Kelvin connections to the load and/or boosters for driv-
ing long lines or high current loads, delivering the full accuracy
of the AD588 where it is required in the application circuit.
PRODUCT HIGHLIGHTS
1. The AD588 offers 12-bit absolute accuracy without any user
adjustments. Optional fine-trim connections are provided for
applications requiring higher precision. The fine trimming does
not alter the operating conditions of the Zener or the buffer
amplifiers, and thus does not increase the temperature drift.
The low initial error allows the AD588 to be used as a system
reference in precision measurement applications requiring 12-bit
absolute accuracy. In such systems, the AD588 can provide a
known voltage for system calibration in software, and the low
drift allows compensation for the drift of other components in
2. Output noise of the AD588 is very low—typically 6 µV p-p.
A pin is provided for additional noise filtering using an exter-
nal capacitor.
a
system. Manual system calibration and the cost of periodic
3. A precision 5 V tracking mode with Kelvin output connec-
tions is available with no external components. Tracking error
is less than 1 mV and a fine-trim is available for applications
requiring exact symmetry between the +5 V and –5 V outputs.
recalibration can therefore be eliminated. Furthermore, the
mechanical instability of a trimming potentiometer and the
potential for improper calibration can be eliminated by using
the AD588 in conjunction with autocalibration software.
4. Pin strapping capability allows configuration of a wide vari-
ety of outputs: 5 V, +5 V, +10 V, –5 V, and –10 V dual
outputs or +5 V, –5 V, +10 V, and –10 V single outputs.
The AD588 is available in four versions. The AD588JQ and
AD588KQ and grades are packaged in a 16-lead CERDIP and
are specified for 0°C to 70°C operation. AD588AQ and BQ
grades are packaged in a 16-lead CERDIP and are specified for
the –25°C to +85°C industrial temperature range.
*Protected by Patent Number 4,644,253.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2003, Analog Devices, Inc. All rights reserved.
(Typical @ 25°C, 10 V output, V = ؎15 V, unless otherwise noted.1)
AD588–SPECIFICATIONS
S
AD588JQ/AQ
Typ
AD588BQ/KQ
Typ
Parameter
Min
Max
Min
Max
Unit
OUTPUT VOLTAGE ERROR
+10 V, –10 V Outputs
+5 V, –5 V Outputs
3
3
–1
–1
+1
+1
mV
mV
5 V TRACKING MODE
Symmetry Error
1.5
0.75
mV
OUTPUT VOLTAGE DRIFT
0°C to 70°C (J, K, B)
–25°C to +85°C (A, B)
2
3
3
1.5
3
ppm/°C
ppm/°C
GAIN ADJ AND BAL ADJ2
Trim Range
Input Resistance
4
150
4
150
mV
kΩ
LINE REGULATION
TMIN to TMAX
3
200
200
µV/V
LOAD REGULATION
T
MIN to TMAX
+10 V Output, 0 mA < IOUT < 10 mA
–10 V Output, –10 mA < IOUT < 0 mA
50
50
50
50
µV/mA
µV/mA
SUPPLY CURRENT
TMIN to TMAX
6
10
6
10
mA
Power Dissipation
180
300
180
300
mW
OUTPUT NOISE (Any Output)
0.1 Hz to 10 Hz
Spectral Density, 100 Hz
6
100
6
100
µV p-p
nV/√Hz
LONG-TERM STABILITY (@ 25°C)
15
15
ppm/1000 hr
BUFFER AMPLIFIERS
Offset Voltage
Offset Voltage Drift
Bias Current
100
1
20
10
1
20
110
µV
µV/°C
nA
Open-Loop Gain
110
dB
Output Current A3, A4
Common-Mode Rejection (A3, A4)
VCM = 1 V p-p
–10
+10
–10
+10
mA
100
50
100
50
dB
mA
Short Circuit Current
TEMPERATURE RANGE
Specified Performance
J, K Grades
0
–25
70
+85
0
–25
70
+85
°C
°C
A, B Grades
NOTES
1Output
+10 V
Configuration
Figure 2a
–10 V
Figure 2c
+5 V, –5 V, 5 V
Figure 2b
Specifications tested using +10 V configuration, unless otherwise indicated.
2Gain and balance adjustments guaranteed capable of trimming output voltage error and symmetry error to zero.
3Test Conditions:
+10 V Output
–10 V Output
5 V Output
–VS = –15 V, 13.5 V ≤ +VS ≤ 18 V
–18 V ≤ –VS ≤ –13.5 V, +VS = 15 V
+VS = +18 V, –VS = –18 V
+VS = +10.8 V, –VS = –10.8 V
For 10 V output, VS can be as low as 12 V.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality
levels. All min and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
–2–
REV. D
AD588
ABSOLUTE MAXIMUM RATINGS*
PIN CONFIGURATION
+VS to –VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Power Dissipation (25°C) . . . . . . . . . . . . . . . . . . . . . . 600 mW
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300°C
Package Thermal Resistance (JA/JC) . . . . . . . . 90°C/25°C/W
Output Protection: All Outputs Safe if Shorted to Ground
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
1
2
3
4
5
6
7
8
16
–V
A3 OUT FORCE
+V
S
15 A4 OUT FORCE
S
14
13
12
11
10
9
A3 OUT SENSE
A3 IN
A4 OUT SENSE
A4 IN
AD588
TOP VIEW
GAIN ADJ
BAL ADJ
(Not to Scale)
V
V
CT
HIGH
NOISE
REDUCTION
GND SENSE –IN
GND SENSE +IN
V
LOW
ORDERING GUIDE
Part Number1
Initial Error (mV)
Temperature Coefficient2
Temperature Range (°C)
Package Option
AD588AQ
AD588BQ
AD588JQ
AD588KQ
3
1
3
1
3 ppm/°C
1.5 ppm/°C
3 ppm/°C
1.5 ppm/°C
–25 to +85
–25 to +852
0 to 70
CERDIP (Q-16)
CERDIP (Q-16)
CERDIP (Q-16)
CERDIP (Q-16)
0 to 70
NOTES
1For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current
AD588/883B.
2Temperature coefficient specified from 0°C to 70°C.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD588 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. D
–3–
AD588
THEORY OF OPERATION
APPLYING THE AD588
The AD588 consists of a buried Zener diode reference, amplifiers
used to provide pin programmable output ranges, and associ-
ated thin-film resistors as shown in Figure 1. The temperature
compensation circuitry provides the device with a temperature
coefficient of 1.5 ppm/°C or less.
The AD588 can be configured to provide +10 V and –10 V
reference outputs as shown in Figures 2a and 2c, respectively. It
can also be used to provide +5 V, –5 V, or a 5 V tracking
reference, as shown in Figure 2b. Table I details the appropriate
pin connections for each output range. In each case, Pin 9 is
connected to system ground and power is applied to Pins 2 and 16.
NOISE
REDUCTION
A3 OUT
SENSE
V
A3 IN
HIGH
The architecture of the AD588 provides ground sense and
uncommitted output buffer amplifiers that offer the user a great
deal of functional flexibility. The AD588 is specified and tested
in the configurations shown in Figure 2a. The user may choose
to take advantage of the many other configuration options available
with the AD588. However, performance in these configurations
is not guaranteed to meet the extremely stringent data sheet
specifications.
A3 OUT
FORCE
A3
R
B
A1
R1
A4 OUT
SENSE
R4
A4 OUT
FORCE
A4
R2
As indicated in Table I, a +5 V buffered output can be provided
using amplifier A4 in the +10 V configuration (Figure 2a). A –5 V
buffered output can be provided using amplifier A3 in the –10 V
configuration (Figure 2c). Specifications are not guaranteed for
the +5 V or –5 V outputs in these configurations. Performance
will be similar to that specified for the +10 V or –10 V outputs.
R5
+V
S
R6
R3
AD588
A2
–V
S
As indicated in Table I, unbuffered outputs are available at
Pins 6, 8, and 11. Loading of these unbuffered outputs will
impair circuit performance.
GAIN
ADJ
GND
GND
V
BAL
ADJ
V
A4 IN
LOW
CT
SENSE SENSE
+IN
–IN
Figure 1. AD588 Functional Block Diagram
Amplifiers A3 and A4 can be used interchangeably. However,
the AD588 is tested (and the specifications are guaranteed) with
the amplifiers connected as indicated in Figure 2a and Table I.
When either A3 or A4 is unused, its output force and sense pins
should be connected and the input tied to ground.
Amplifier A1 performs several functions. A1 primarily acts to
amplify the Zener voltage from 6.5 V to the required 10 V output.
In addition, A1 also provides for external adjustment of the
10 V output through Pin 5, GAIN ADJ. Using the bias compen-
sation resistor between the Zener output and the noninverting
Two outputs of the same voltage may be obtained by connect-
ing both A3 and A4 to the appropriate unbuffered output on
Pins 6, 8, or 11. Performance in these dual-output configura-
tions will typically meet data sheet specifications.
i
nput to A1, a capacitor can be added at the NOISE REDUCTION
pin (Pin 7) to form a low-pass filter and reduce the noise contri-
bution of the Zener to the circuit. Two matched 10 kΩ nominal
thin-film resistors (R4 and R5) divide the 10 V output in half.
Pin VCT (Pin 11) provides access to the center of the voltage
span and Pin 12 (BAL ADJ) can be used for fine adjustment
of this division.
CALIBRATION
Generally, the AD588 will meet the requirements of a precision
system without additional adjustment. Initial output voltage
error of 1 mV and output noise specs of 10 µV p-p allow for
accuracies of 12 bits to 16 bits. However, in applications where
an even greater level of accuracy is required, additional calibra-
tion may be called for. Provision for trimming has been made
through the use of the GAIN ADJ and BAL ADJ pins (Pins 5 and
12, respectively).
Ground sensing for the circuit is provided by amplifier A2. The
noninverting input (Pin 9) senses the system ground, which
will be transferred to the point on the circuit where the invert-
ing input (Pin 10) is connected. This may be Pin 6, 8, or 11.
The output of A2 drives Pin 8 to the appropriate voltage. Thus, if
Pin 10 is connected to Pin 8, the VLOW pin will be the same
voltage as the system ground. Alternatively, if Pin 10 is con-
nected to the VCT pin, it will be ground and Pin 6 and Pin 8 will
be +5 V and –5 V, respectively.
The AD588 provides a precision 10 V span with a center tap
(VCT) that is used with the buffer and ground sense amplifiers to
achieve the voltage output configurations in Table I. GAIN
ADJUST and BALANCE ADJUST can be used in any of these
configurations to trim the magnitude of the span voltage and
the position of the center tap within the span. The GAIN
ADJUST should be performed first. Although the trims are not
interactive within the device, the GAIN trim will move the
BALANCE trim point as it changes the magnitude of the span.
Amplifiers A3 and A4 are internally compensated and are used
to buffer the voltages at Pins 6, 8, and 11, as well as to provide a
full Kelvin output. Thus, the AD588 has a full Kelvin capability
by providing the means to sense a system ground and provide
forced and sensed outputs referenced to that ground.
–4–
REV. D
AD588
Table I. Pin Connections
Buffered
Connect
Pin 10
Unbuffered* Output on Pins
Output
Buffered Output on Pins
Range
to Pin: –10 V –5 V
0 V
+5 V +10 V
Connections
–10 V
–5 V
0 V
+5 V +10 V
+10 V
8
8
11
6
11 to 13, 14 to 15
6 to 4, and 3 to 1
8 to 13, 14 to 15,
6 to 4, and 3 to 1
8 to 13, 14 to 15,
11 to 4, and 3 to 1
6 to 4 and 3 to 1
15
1
–5 V or +5 V
–10 V
11
6
8
11
6
6
15
15
1
1
8
11
1
+5 V
11
11
6
–5 V
8
8 to 13 and 14 to 15
15
*Unbuffered outputs should not be loaded.
Figure 2b shows GAIN and BALANCE trims in a +5 V and
–5 V tracking configuration. A 100 kΩ 20-turn potentiometer is
used for each trim. The potentiometer for GAIN trim is con-
nected between Pin 6 (VHIGH) and Pin 8 (VLOW) with the wiper
connected to Pin 5 (GAIN ADJ). The potentiometer is adjusted
to produce exactly 10 V between Pin 1 and Pin 15, the amplifier
outputs. The BALANCE potentiometer, also connected between
Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is then
adjusted to center the span from +5 V to –5 V.
A3
A4
+10V
R
B
A1
R1
R4
R5
+5V
R2
+V
S
+15V
R6
0.1F
0.1F
R3
Trimming in other configurations works in exactly the same
manner. When producing +10 V and +5 V, GAIN ADJ is used
to trim +10 V and BAL ADJ is used to trim +5 V. In the –10 V
and –5 V configuration, GAIN ADJ is again used to trim the
magnitude of the span, –10 V, while BAL ADJ is used to trim
the center tap, –5 V.
AD588
SYSTEM
GROUND
A2
–V
S
–15V
SYSTEM
GROUND
In single output configurations, GAIN ADJ is used to trim outputs
utilizing the full span (+10 V or –10 V), while BAL ADJ is used
to trim outputs using half the span (+5 V or –5 V).
Figure 2a. +10 V Output
+15V
NOISE
REDUCTION
Input impedance on both the GAIN ADJ and BAL ADJ pins is
approximately 150 kΩ. The GAIN ADJUST trim network
effectively attenuates the 10 V across the trim potentiometer
by a factor of about 1500 to provide a trim range of –3.5 mV to
+7.5 mV with a resolution of approximately 550 µV/turn
(20-turn potentiometer). The BAL ADJ trim network attenu-
ates the trim voltage by a factor of about 1400, providing a
trim range of 4.5 mV with resolution of 450 µV/turn.
1F
A3
A4
+5V
R
B
A1
R1
R4
R5
–5V
R2
+V
–15V
S
R6
0.1F
0.1F
R3
AD588
SYSTEM
GROUND
A2
–V
S
–15V
SYSTEM
GROUND
100k⍀
20T
BALANCE
ADJUST
100k⍀
20T
GAIN ADJUST
Figure 2b. +5 V and –5 V Outputs
REV. D
–5–
AD588
Note that a second capacitor is needed in order to implement
the NOISE REDUCTION feature when using the AD588 in
the –10 V mode (Figure 2c.). The NOISE REDUCTION capaci-
tor is limited to 0.1 µF maximum in this mode.
0.1F
0.1F
NOISE
REDUCTION
A3
A4
–5V
R
B
A1
R1
R4
R5
–10V
+15V
R2
+V
S
R6
0.1F
SYSTEM
GROUND
R3
AD588
A2
–V
S
0.1F
–15V
Figure 4. Effect of 1 µF Noise Reduction Capacitor
on Broadband Noise
SYSTEM
GROUND
TURN-ON TIME
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is the turn-on settling time. Two components normally
associated with this are: time for active circuits to settle and
time for thermal gradients on the chip to stabilize. Figures 5a
and 5b show the turn-on characteristics of the AD588. It
shows the settling to be about 600 µs. Note the absence of any
thermal tails when the horizontal scale is expanded to 2 ms/cm in
Figure 5b.
Figure 2c. –10 V Output
Trimming the AD588 introduces no additional errors over
temperature, so precision potentiometers are not required.
For single-output voltage ranges, or in cases when BALANCE
ADJUST is not required, Pin 12 should be connected to Pin 11.
If GAIN ADJUST is not required, Pin 5 should be left floating.
NOISE PERFORMANCE AND REDUCTION
The noise generated by the AD588 is typically less than 6 µV p-p
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 600 µV p-p. The dominant source of this noise is
the buried Zener, which contributes approximately 100 nV/√Hz.
In comparison, the op amp’s contribution is negligible. Figure 3
shows the 0.1 Hz to 10 Hz noise of a typical AD588.
Figure 5a. Electrical Turn-On
Figure 3. 0.1 Hz to 10 Hz Noise (0.1 Hz to 10 Hz BPF
with Gain of 1000 Applied)
If further noise reduction is desired, an optional capacitor, CN,
may be added between the NOISE REDUCTION pin and ground,
as shown in Figure 2b. This will form a low-pass filter with the
4 kΩ RB on the output of the Zener cell. A 1 µF capacitor will
have a 3 dB point at 40 Hz and will reduce the high frequency
(to 1 MHz) noise to about 200 µV p-p. Figure 4 shows the 1 MHz
noise of a typical AD588 both with and without a 1 µF capacitor.
Figure 5b. Extended Time Scale Turn-On
Output turn-on time is modified when an external noise reduc-
tion capacitor is used. When present, this capacitor presents an
–6–
REV. D
AD588
MAXIMUM OUTPUT CHANGE – mV
additional load to the internal Zener diode’s current source,
resulting in a somewhat longer turn-on time. In the case of a
1 µF capacitor, the initial turn-on time is approximately 60 ms
(see Figure 6).
DEVICE
GRADE
0؇C TO +70؇C –25؇C TO +85؇C –55؇C TO +125؇C
AD588JQ
AD588JQ
AD588JQ
AD588JQ
AD588JQ
2.10
1.05
1.40(typ)
1.05
3.30
3.30
Note: If the NOISE REDUCTION feature is used in the 5 V
configuration, a 39 kΩ resistor between Pin 6 and Pin 2 is required
for proper startup.
10.80
7.20
AD588JQ
Figure 8. Maximum Output Change—mV
KELVIN CONNECTIONS
Force and sense connections, also referred to as Kelvin connec-
tions, offer a convenient method of eliminating the effects of
voltage drops in circuit wires. As seen in Figure 9, the load
current and wire resistance produce an error (VERROR = R × IL) at
the load. The Kelvin connection of Figure 9 overcomes the
problem by including the wire resistance within the forcing loop
of the amplifier and sensing the load voltage. The amplifier
corrects for any errors in the load voltage. In the circuit shown,
the output of the amplifier would actually be at 10 V + VERROR and
the voltage at the load would be the desired 10 V.
Figure 6. Turn-On with CN = 1 F
TEMPERATURE PERFORMANCE
The AD588 has three amplifiers that can be used to implement
Kelvin connections. Amplifier A2 is dedicated to the ground
force-sense function, while uncommitted amplifiers A3 and A4
are free for other force-sense chores.
The AD588 is designed for precision reference applications
where temperature performance is critical. Extensive tempera-
ture testing ensures that the device’s high level of performance is
maintained over the operating temperature range.
R
Figure 7 shows typical output voltage drift for the AD588BD
and illustrates the test methodology. The box in Figure 7 is
bounded on the sides by the operating temperature extremes
and on top and bottom by the maximum and minimum output
voltages measured over the operating temperature range. The
slope of the diagonal drawn from the lower left corner of the
box determines the performance grade of the device.
I = 0
V = 10V
V = 10V – RI
R
R
L
+
–
R
I
LOAD
L
R
I = 0
10V
LOAD
I
L
V = 10V + RI
L
Figure 9. Advantage of Kelvin Connection
In some single-output applications, one amplifier may be unused.
OUTPUT
VOLTS
10.002
In such cases, the unused amplifier should be connected as a
unity-gain follower (force + sense pin tied together), and the
input should be connected to ground.
V
MAX
10.001
An unused amplifier section may be used for other circuit functions
as well. Figures 10 through 14 show the typical performance of
A3 and A4.
VMAX – VMIN
SLOPE = T.C. =
(TMAX – TMIN
)
× 10 × 1–6
V
MIN
10.0013V − 10.00025V
10.000
(85°C − –25°C) × 10 × 10–6
100
80
60
40
20
0
0
=
0.95ppm / °C
–35 –15
5
25 45 65 85
TEMPERATURE – ؇C
T
T
–30
–60
–90
–120
–150
–180
min
max
GAIN
Figure 7. Typical AD588BD Temperature Drift
Each AD588A and B grade unit is tested at –25°C, 0°C, +25°C,
+50°C, +70°C, and +85°C. This approach ensures that the
variations of output voltage that occur as the temperature changes
within the specified range will be contained within a box whose
diagonal has a slope equal to the maximum specified drift. The
position of the box on the vertical scale will change from device
to device as initial error and the shape of the curve vary. Maxi-
mum height of the box for the appropriate temperature range is
shown in Figure 8. Duplication of these results requires a combi-
nation of high accuracy and stable temperature control in a test
system. Evaluation of the AD588 will produce a curve similar to
that in Figure 7, but output readings may vary depending on the
test methods and equipment utilized.
PHASE
–20
10
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
Figure 10. Open-Loop Frequency Response (A3, A4)
REV. D
–7–
AD588
110
110
100
80
60
40
20
0
V
=
؎15V WITH
V
= ؎15V
S
S
1V p-p SINE WAVE
V
= 1V p-p +25؇C
CM
100
80
60
40
20
10
+SUPPLY
–SUPPLY
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
FREQUENCY – Hz
FREQUENCY – Hz
Figure 13. Common-Mode Rejection vs.
Frequency (A3, A4)
Figure 11. Power Supply Rejection vs. Frequency (A3, A4)
100
90
80
70
60
50
40
30
20
10
0
Figure 12a. Unity-Gain Follower Pulse Response
(Large Signal)
1
10
100
1k
10k
FREQUENCY – Hz
Figure 14. Input Noise Voltage Spectral Density
DYNAMIC PERFORMANCE
The output buffer amplifiers (A3 and A4) are designed to
provide the AD588 with static and dynamic load regulation
superior to less complete references.
Many A/D and D/A converters present transient current loads
to the reference, and poor reference response can degrade the
converter’s performance.
Figures 15a and 15b display the characteristics of the AD588
output amplifier driving a 0 mA to 10 mA load.
Figure 12b. Unity-Gain Follower Pulse Response
(Small Signal)
1k⍀
A3 OR A4
V
OUT
I
L
10V
10V
0V
V
L
Figure 15a. Transient Load Test Circuit
–8–
REV. D
AD588
Figure 17b. Output Response with Capacitive Load
Figure 15b. Large-Scale Transient Response
Figures 18a and 18b display the crosstalk between output am-
plifiers. The top trace shows the output of A4, dc-coupled and
offset by 10 V, while the output of A3 is subjected to a 0 mA
to 10 mA load current step. The transient at A4 settles in about
1 µs, and the load-induced offset is about 100 µV.
Figures 16a and 16b display the output amplifier characteristics
driving a 5 mA to 10 mA load, a common situation found when
the reference is shared among multiple converters or is used to
provide a bipolar offset current.
A3 OR A4
V
OUT
V
OUT
I
L
A3
2k⍀
10V
0V
2k⍀
A4
+
1k⍀
10V
+
+
10V
–
V
L
10V
–
10V
–
V
L
0V
Figure 16a. Transient and Constant Load Test Circuit
Figure 18a. Load Crosstalk Test Circuit
Figure 16b. Transient Response 5 mA to10 mA Load
Figure 18b. Load Crosstalk
In some applications, a varying load may be both resistive and
capacitive in nature or be connected to the AD588 by a long
capacitive cable.
Figures 17a and 17b display the output amplifier characteristics
driving a 1,000 pF, 0 mA to 10 mA load.
A3 OR A4
V
OUT
1000pF
1k⍀
C
L
10V
10V
0V
V
L
Figure 17a. Capacitive Load Transient Response
Test Circuit
REV. D
–9–
AD588
Attempts to drive a large capacitive load (in excess of 1,000 pF)
may result in ringing or oscillation, as shown in the step response
photo (Figure 19a). This is due to the additional pole formed by
the load capacitance and the output impedance of the amplifier,
which consumes phase margin. The recommended method of
driving capacitive loads of this magnitude is shown in Figure 19b.
The 150 Ω resistor isolates the capacitive load from the output
stage, while the 10 kΩ resistor provides a dc feedback path and
preserves the output accuracy. The 1 µF capacitor provides a
high frequency feedback loop. The performance of this circuit is
shown in Figure 19c.
USING THE AD588 WITH CONVERTERS
The AD588 is an ideal reference for a wide variety of A/D and
D/A converters. Several representative examples follow.
14-Bit Digital-to-Analog Converter—AD7535
High resolution CMOS D/A converters require a reference voltage
of high precision to maintain rated accuracy. The combination
of the AD588 and AD7535 takes advantage of the initial accu-
racy, drift, and full Kelvin output capability of the AD588 as
well as the resolution, monotonicity, and accuracy of the AD7535
to produce a subsystem with outstanding characteristics. See
Figure 20.
16-Bit Digital-to-Analog Converter—AD569
Another application that fully utilizes the capabilities of the
AD588 is supplying a reference for the AD569, as shown in
Figure 21. Amplifier A2 senses system common and forces VCT
to assume this value, producing +5 V and –5 V at Pin 6 and
Pin 8, respectively. Amplifiers A3 and A4 buffer these voltages
out to the appropriate reference force-sense pins of the AD569.
The full Kelvin scheme eliminates the effect of the circuit traces
or wires and the wire bonds of the AD588 and AD569 them-
selves, which would otherwise degrade system performance.
SUBSTITUTING FOR INTERNAL REFERENCES
Many converters include built-in references. Unfortunately,
such references are the major source of drift in these converters.
By using a more stable external reference like the AD588, drift
performance can be improved dramatically.
Figure 19a. Output Amplifier Step Response, CL = 1 µF
10k⍀
1F
150⍀
V
OUT
C
1F
+
L
V
IN
–
Figure 19b. Compensation for Capacitive Loads
Figure 19c. Output Amplifier Step Response
Using Figure 19b Compensation
–10–
REV. D
AD588
N.C.
V
DD
V
REFS
R
FS
I
14-BIT DAC
14
OUT
+10V
V
REFF
A3
A4
R
B
AD7535
A1
R1
AGNDS
AGNDF
AD588
R4
R5
DAC REGISTER
LDAC
R2
6
8
MS
LS
CSLSB
INPUT
INPUT
REGISTER
REGISTER
+V
–V
R6
S
R3
CSMSB
WR
A2
S
V
DB13
DB0
DGND
SS
Figure 20. AD588/AD7535 Connections
+12V
–12V
+V
–V
S
S
A
+ IN
3
V
H
A
OUT
3
+V
REF
FORCE
A3
+V
SENSE
AD569
REF
+5V
A
– IN
3
A1
S
E
L
E
C
T
S
E
L
E
C
T
10k⍀
S
E
G
M
E
N
T
V
CT
T
A
P
V
OUT
–5V TO
+5V
10k⍀
A
4
– IN
+ IN
2
A2
A
2
O
R
O
R
–V
REF
SENSE
A
– IN
–5V
AD588
A
OUT
–V
FORCE
4
REF
A4
V
L
A + IN
4
8 MSBs
8 LSBs
LATCHES
GND
CS LDAC
HBE LBE
DB0
DB15
Figure 21. High Accuracy 5 V Tracking Reference for AD569
REV. D
–11–
AD588
12-Bit Analog-to-Digital Converter—AD574A
ohms measurement overcomes this problem. This method uses
two wires to bring an excitation current to the RTD and two
additional wires to tap off the resulting RTD voltage. If these
additional two wires go to a high input impedance measurement
circuit, the effect of their resistance is negligible. Therefore, they
transmit the true RTD voltage.
The AD574A is specified for gain drift from 10 ppm/°C to
50 ppm/°C, (depending on grade) using its on-chip reference.
The reference contributes typically 75% of this drift. Therefore,
the total drift using an AD588 to supply the reference can be
improved by a factor of 3 to 4.
Using this combination may result in apparent increases in full-
scale error due to the difference between the on-board reference
by which the device is laser-trimmed and the external reference
with which the device is actually applied. The on-board reference
is specified to be 10 V 100 mV, while the external reference is
specified to be 10 V 1 mV. This may result in up to 101 mV
of apparent full-scale error beyond the 25 mV specified AD574
gain error. External resistors R2 and R3 allow this error to be
nulled. Their contribution to full-scale drift is negligible.
I = 0
R
R
+
V
␣R
RTD
I
OUT
RTD
EXC
–
R
R
I = 0
Figure 23. 4-Wire Ohms Measurement
The high output drive capability allows the AD588 to drive up
to six converters in a multiconverter system. All converters will
have gain errors that track to better than 5 ppm/°C.
A practical consideration when using the 4-wire ohms technique
with an RTD is the self-heating effect that the excitation current
has on the temperature of the RTD. The designer must choose
the smallest practical excitation current that still gives the desired
resolution. RTD manufacturers usually specify the self-heating
effect of each of their models or types of RTDs.
RTD EXCITATION
The resistance temperature detector (RTD) is a circuit element
whose resistance is characterized by a positive temperature
coefficient. A measurement of resistance indicates the measured
temperature. Unfortunately, the resistance of the wires leading
to the RTD often adds error to this measurement. The 4-wire
Figure 24 shows an AD588 providing the precision excitation
current for a 100 Ω RTD. The small excitation current of 1 mA
dissipates a mere 0.1 mW of power in the RTD.
12
8
STS
CS
AO
R/C
CE
HIGH
BITS
MIDDLE
BITS
R1
50⍀
AD574A
A3
REF IN
LOW
BITS
R
B
R3
500⍀
20 TURN
REF OUT
A1
BIPP OFF
+5V
+15V
–15V
R1
R4
R5
R2
61.9⍀
10V
20V
V
10V
IN
IN
IN
A4
R2
+V
S
R6
ANA COM
DIG
COM
R3
AD588
A2
–V
S
Figure 22. AD588/AD574A Connections
–12–
REV. D
AD588
voltage equal to approximately VIN/2. Further processing of this
signal may necessarily be limited to high common-mode rejec-
tion techniques such as instrumentation or isolation amplifiers.
R
C
VISHAY S102C
OR SIMILAR
A3
Figure 26b shows the same bridge transducer, this time driven
from a pair of bipolar supplies. This configuration ideally elimi-
nates the common-mode voltage and relaxes the restrictions on
any processing elements that follow.
R
B
A1
R1
R
= 10k⍀
C
R4
R5
1.0mA
0.01%
A4
+
R2
V
100⍀
OUT
R4
R1
R3
R2
+
–
+V
–V
R6
S
–
+
V
–
R3
IN
E
O
AD588
A2
–15V
OR
S
GROUND
Figure 26a. Bridge Transducer Excitation—
Unipolar Drive
RTD = OMEGA K4515
0.24؇C/mW SELF-HEATING
+
R4
R1
R3
R2
V
1
2
–
Figure 24. Precision Current Source for RTD
–
+
E
O
+
–
V
BOOSTED PRECISION CURRENT SOURCE
In the RTD current-source application, the load current is
limited to 10 mA by the output drive capability of amplifier
A3. In the event that more drive current is needed, a series-pass
transistor can be inserted inside the feedback loop to provide
higher current. Accuracy and drift performance are unaffected
by the pass transistor.
Figure 26b. Bridge Transducer Excitation—
Bipolar Drive
+15V
220⍀
Q
=
1
2N3904
V
CC
220⍀
A3
A4
Q
1
A3
R
B
–
+
R
B
E
O
A1
R1
AD588
R4
A1
R1
AD588
R4
220⍀
Q
=
2
R2
A4
R5
R2
2N3904
R5
10V
I
=
–15V
L
+V
S
R6
R
C
+V
–V
R3
R6
S
R3
A2
A2
–V
S
S
LIMITED BY
AND
Q
R
C
1
POWER
DISSIPATION
Figure 27. Bipolar Bridge Drive
LOAD
As shown in Figure 27, the AD588 is an excellent choice for the
control element in a bipolar bridge driver scheme. Transistors
Q1 and Q2 serve as series-pass elements to boost the current
drive capability to the 28 mA required by a typical 350 Ω bridge.
A differential gain stage may still be required if the bridge balance
is not perfect. Such gain stages can be expensive.
Figure 25. Boosted Precision Current Source
BRIDGE DRIVER CIRCUITS
The Wheatstone bridge is a common transducer. In its simplest
form, a bridge consists of four, two-terminal elements connected
to form a quadrilateral, a source of excitation connected along
one of the diagonals and a detector comprising the other diago-
nal. Figure 26a shows a simple bridge driven from a unipolar
excitation supply. EO, a differential voltage, is proportional to
the deviation of the element from the initial bridge values. Unfor-
tunately, this bridge output voltage is riding on a common-mode
REV. D
–13–
AD588
Additional common-mode voltage reduction is realized by using
the circuit illustrated in Figure 28. A1, the ground sense ampli-
fier, serves the supplies on the bridge to maintain a virtual ground
at one center tap. The voltage that appears on the opposite
center tap is now single-ended (referenced to ground) and can
be amplified by a less expensive circuit.
+15V
220⍀
Q
=
1
2N3904
AD OP-07
A3
R
B
+
A1
R1
V
OUT
–
R1
R2
R4
R5
220⍀
Q
=
2
A4
R2
2N3904
–15V
+V
–V
R6
S
R3
AD588
A2
S
Figure 28. Floating Bipolar Bridge Drive with Minimum CMV
–14–
REV. D
AD588
OUTLINE DIMENSIONS
16-Lead Ceramic DIP-Glass Hermetic Seal Package [CERDIP]
(Q-16)
Dimensions shown in inches and (millimeters)
0.005
(0.13)
MIN
0.098 (2.49)
MAX
0.310 (7.87)
0.220 (5.59)
16
9
8
PIN 1
1
0.060 (1.52)
0.015 (0.38)
0.320 (8.13)
0.290 (7.37)
0.200 (5.08)
MAX
0.840 (21.34) MAX
0.150 (3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
15
0
SEATING
PLANE
0.070 (1.78)
0.030 (0.76)
0.100
(2.54)
BSC
0.023 (0.58)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Revision History
Location
Page
2/03—Data Sheet changed from REV. C to REV. D.
Added KQ model and deleted SQ and TQ models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Change to PRODUCT HIGHLIGHTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Change to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
10/02—Data Sheet changed from REV. B to REV. C.
Changes to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Changes to TABLE 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Deleted Figure 10c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
OUTLINE DIMENSIONS updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
REV. D
–15–
–16–
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