5962-9452101M2A [ADI]
Precision Picoampere Input Current Quad Operational Amplifier; 精密Picoampere输入电流四路运算放大器
| 型号： | 5962-9452101M2A |
| 厂家： | 
ADI |
| 描述： | Precision Picoampere Input Current Quad Operational Amplifier |
| 文件： | 总16页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Precision Picoampere Input Current
Quad Operational Amplifier
OP497
FEATURES
PIN CONNECTIONS
1
Low offset voltage: 75 μV maximum
Low offset voltage drift: 1.0 μV/°C maximum
Very low bias current
25°C: 150 pA maximum
−40°C to +85°C: 300 pA maximum
Very high open-loop gain: 2000 V/mV minimum
Low supply current (per amplifier): 625 μA maximum
Operates from 2 V to 20 V supplies
High common-mode rejection: 114 dB minimum
16
OUT A
–IN A
+IN A
V+
OUT D
–IN D
+IN D
V–
2
3
4
5
6
7
8
15
14
13
12
11
10
9
OP497
+IN B
–IN B
OUT B
NC
+IN C
–IN C
OUT C
NC
NC = NO CONNECT
Figure 1. 16-Lead Wide Body SOIC (RW-16)
APPLICATIONS
1
2
3
4
5
6
7
OUT A
–IN A
+IN A
V+
14
13
12
11
10
9
OUT D
–IN D
+IN D
V–
Strain gage and bridge amplifiers
High stability thermocouple amplifiers
Instrumentation amplifiers
Photocurrent monitors
High gain linearity amplifiers
Long-term integrators/filters
Sample-and-hold amplifiers
Peak detectors
OP497
+IN B
–IN B
OUT B
+IN C
–IN C
OUT C
8
Figure 2. 14-Lead PDIP (N-14)
1k
Logarithmic amplifiers
V
V
= ±15V
S
= 0V
CM
Battery-powered systems
GENERAL DESCRIPTION
The OP497 is a quad op amp with precision performance in
the space-saving, industry standard 16-lead SOlC package.
Its combination of exceptional precision with low power and
extremely low input bias current makes the quad OP497 useful
in a wide variety of applications.
100
–I
B
+I
B
Precision performance of the OP497 includes very low offset
(<50 μV) and low drift (<0.5 μV/°C). Open-loop gain exceeds
2000 V/mV ensuring high linearity in every application. Errors
due to common-mode signals are eliminated by its common-
mode rejection of >120 dB. The OP497 has a power supply
rejection of >120 dB which minimizes offset voltage changes
experienced in battery-powered systems. The supply current
of the OP497 is <625 μA per amplifier, and it can operate with
supply voltages as low as 2 V.
I
OS
10
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
Figure 3. Input Bias, Offset Current vs. Temperature
Combining precision, low power, and low bias current, the OP497
is ideal for a number of applications, including instrumentation
amplifiers, log amplifiers, photodiode preamplifiers, and long-
term integrators. For a single device, see the OP97 data sheet,
and for a dual device, see the OP297 data sheet.
The OP497 uses a superbeta input stage with bias current
cancellation to maintain picoamp bias currents at all temperatures.
This is in contrast to FET input op amps whose bias currents
start in the picoamp range at 25°C but double for every 10°C
rise in temperature to reach the nanoamp range above 85°C.
The input bias current of the OP497 is <100 pA at 25°C.
Rev. E
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©1991–2009 Analog Devices, Inc. All rights reserved.
OP497
TABLE OF CONTENTS
Features .............................................................................................. 1
AC Performance ......................................................................... 10
Guarding And Shielding ........................................................... 11
Open-Loop Gain Linearity ....................................................... 11
Applications Circuit ....................................................................... 12
Precision Absolute Value Amplifier......................................... 12
Precision Current Pump............................................................ 12
Precision Positive Peak Detector.............................................. 12
Simple Bridge Conditioning Amplifier................................... 12
Nonlinear Circuits...................................................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
General Description......................................................................... 1
Pin Connections ............................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
Applications Information .............................................................. 10
REVISION HISTORY
2/09—Rev. D to Rev. E
11/01—Rev. C to Rev. D
Deleted 14-Lead CERDIP............................................. Throughout
Changes to Features Section and General Description
Edits to Pin Connection Headings..................................................1
Deleted Wafer Test Limits ................................................................3
Edits to Absolute Maximum Ratings..............................................5
Edits to Outline Dimensions......................................................... 16
Edits to Ordering Guide ................................................................ 17
Section................................................................................................ 1
Delete Military Processed Devices Text, SMD Part Number,
ADI Part Number Table, and Dice Characteristics Figure ......... 3
Changes to Table 1............................................................................ 3
Changes to Absolute Maximum Ratings Section......................... 4
Changes to Figure 12........................................................................ 6
Changes to Figure 18 and Figure 19............................................... 7
Changes to Figure 26 and Figure 28............................................... 8
Deleted OP497 Spice Macro-Model Section............................... 10
Changes to Applications Information Section............................ 10
Moved Figure 33 ............................................................................. 10
Deleted Table I. OP497 SPICE Net-List....................................... 11
Changes to Open-Loop Gain Linearity Section and
Figure 35 .......................................................................................... 11
Changes to Figure 40...................................................................... 13
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide .......................................................... 15
Rev. E | Page 2 of 16
OP497
SPECIFICATIONS
TA = 25°C, VS = 15 V, unless otherwise noted.
Table 1.
F Grade
Typ
G Grade
Typ Max Unit
Parameter
Symbol Condition
VOS
Min
Max Min
INPUT CHARACTERISTICS
Offset Voltage
40
70
0.4
0.1
75
150
1.0
80
150
250
1.5
μV
−40°C ≤ +85°C
TMIN − TMAX
120
0.6
0.1
μV
μV/°C
μV/Month
Average Input Offset Voltage Drift TCVOS
Long-Term Input Offset Voltage
Stability
Input Bias Current
IB
VCM = 0 V
40
60
0.3
30
50
150
200
60
80
0.3
50
80
200
300
pA
pA
pA/°C
pA
pA
−40° ≤ TA ≤ +85°C
−40° ≤ TA ≤ +85°C
VCM = 0 V
Average Input Bias Current Drift
Input Offset Current
TCIB
IOS
150
200
200
300
−40° ≤ TA ≤ +85°C
Average Input Offset Current Drift TCIOS
0.3
14
13.5
135
120
0.4
14
13.5
135
120
pA/°C
V
V
dB
dB
V/mV
V/mV
MΩ
GΩ
pF
Input Voltage Range1
IVR
13
13
114
108
13
13
114
108
TMIN − TMAX
VCM = 13 V
TMIN − TMAX
VO = 10 V, RL = 2 kΩ
−40° ≤ TA ≤ +85°C
Common-Mode Rejection
Large Signal Voltage Gain
CMR
AVO
1500 4000
1200 4000
800
2000
30
500
3
800
2000
30
500
3
Input Resistance Differential Mode
Input Resistance Common Mode
Input Capacitance
RIN
RINCM
CIN
OUTPUT CHARACTERISTICS
Output Voltage Swing
VO
RL = 2 kΩ
RL = 10 kΩ, TMIN − TMAX
RL = 10 kΩ
13
13
13
13.7
14
13.5
25
13
13
13
13.7
14
13.5
25
V
V
V
mA
Short Circuit
ISC
POWER SUPPLY
Power Supply Rejection Ratio
PSRR
ISY
VS = 2 V to 20 V
VS = 2.5 V to 20 V, TMIN − TMAX 108
No load
TMIN − TMAX
Operating range
TMIN − TMAX
114
135
120
525
580
114
108
135
120
525
750
dB
dB
μA
μA
V
Supply Current (per Amplifier)
Supply Voltage Range
625
750
20
625
580
2
2.5
VS
2
2.5
20
20
20
V
DYNAMIC PERFORMANCE
Slew Rate
Gain Bandwidth Product
Channel Separation
NOISE PERFORMANCE
Voltage Noise
SR
GBW
CS
0.05
0.15
500
150
0.05
0.15
500
150
V/μs
kHz
dB
VO = 20 V p-p, fO = 10 Hz
en p-p
en
0.1 Hz to 10 Hz
en = 10 Hz
en = 1 kHz
0.3
17
15
20
0.3
17
15
20
μV/p-p
nV/√Hz
nV/√Hz
fA/√Hz
Voltage Noise Density
Current Noise Density
in
in = 10 Hz
1 Guaranteed by CMR test.
Rev. E | Page 3 of 16
OP497
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Absolute maximum ratings apply to packaged parts.
θJA is specified for the worst-case mounting conditions, that is,
θJA is specified for a device in socket for the PDIP package, and
Table 2.
Parameter
Supply Voltage
Input Voltage1
Rating
θ
JA is specified for a device soldered to the printed circuit board
(PCB) for the SOIC package.
20 V
20 V
Differential Input Voltage1
Output Short-Circuit Duration
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
40 V
Table 3.
Package Type
θJA
76
92
θJC
33
23
Unit
°C/W
°C/W
Indefinite
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
14-Lead PDIP (N-14)
16-Lead SOIC (RW-16)
–
1 For supply voltages less than 20 V, the absolute maximum input voltage is
equal to the supply voltage.
1/4
V
20V p-p @ 10Hz
1
OP497
+
2kΩ
50kΩ
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
50Ω
–
1/4
V
2
OP497
+
V
1
CHANNEL SEPARATION = 20 log
(
)
V /10,000
2
Figure 4. Channel Separation Test Circuit
ESD CAUTION
Rev. E | Page 4 of 16
OP497
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, VS = 15 V, unless otherwise noted.
50
40
30
20
10
0
50
V
V
= ±15V
T
V
V
= 25°C
= ±15V
S
A
= 0V
CM
S
= 0V
CM
40
30
20
10
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
–100 –80 –60 –40 –20
0
20
40
60
80
100
TCV (µV/°C)
INPUT OFFSET VOLTAGE (µV)
OS
Figure 5. Typical Distribution of Input Offset Voltage
Figure 8. Typical Distribution of TCVOS
1k
100
10
50
40
30
20
10
V
V
= ±15V
= 0V
T
V
V
= 25°C
= ±15V
S
A
CM
S
= 0V
CM
–I
B
+I
B
I
OS
0
–75
–50
–25
0
25
50
75
100
125
–100 –80 –60 –40 –20
0
20
40
60
80
100
TEMPERATURE (°C)
INPUT BIAS CURRENT (pA)
Figure 6. Typical Distribution of Input Bias Current
Figure 9. Input Bias, Offset Current vs. Temperature
70
60
50
40
30
20
10
0
60
50
40
30
20
10
0
T
V
= 25°C
= ±15V
T
V
V
= 25°C
= ±15V
A
A
S
S
= 0V
CM
–I
+I
B
B
0
10
20
30
40
50
60
–15
–10
–5
0
5
10
15
INPUT OFFSET CURRENT (pA)
COMMON-MODE VOLTAGE (V)
Figure 7. Typical Distribution of Input Offset Current
Figure 10. Input Bias Current vs. Common-Mode Voltage
Rev. E | Page 5 of 16
OP497
±3
1k
100
10
T
V
= 25°C
= ±2V TO ±20V
T
V
V
= 25°C
= ±15V
A
A
S
S
= 0V
CM
±2
±1
0
CURRENT NOISE
VOLTAGE NOISE
1
0
1
2
3
4
5
1
10
100
FREQUENCY (Hz)
1k
TIME AFTER POWER APPLIED (Minutes)
Figure 11. Input Offset Voltage Warm-Up Drift
Figure 14. Voltage Noise Density vs. Frequency
10k
1k
10
T
V
= 25°C
= ±2V TO ±20V
BALANCED OR UNBALANCED
A
V
V
= ±15V
S
S
= 0V
CM
1
10Hz
1kHz
T
= 25°C
100
A
0.1
0.01
10
10
100
1k
10k
100k
1M
10M
100
1k
10k
100k
1M
10M
SOURCE RESISTANCE (Ω)
SOURCE RESISTANCE (Ω)
Figure 12. Effective Offset Voltage vs. Source Resistance
Figure 15. Total Noise Density vs. Source Resistance
100
10
1
BALANCED OR UNBALANCED
5mV
1s
V
V
= ±15V
S
= 0V
CM
100
90
10
0%
V
T
= ±15V
S
= 25°C
A
0.1
100
1k
10k
100k
1M
10M
100M
0
2
4
6
8
10
SOURCE RESISTANCE (Ω)
TIME (Seconds)
Figure 13. Effective TCVOS vs. Source Resistance
Figure 16. 0.1 Hz to 10 Hz Noise Voltage
Rev. E | Page 6 of 16
OP497
160
140
120
100
80
100
80
V
T
= ±15V
= 25°C
V
C
R
= ±15V
= 30pF
= 1MΩ
= 25°C
S
S
A
L
L
T
A
GAIN
60
PHASE
40
90
20
135
180
225
60
0
40
–20
20
0
–40
100
1k
10k
100k
1M
10M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17. Open-Loop Gain and Phase vs. Frequency
Figure 20. Common-Mode Rejection vs. Frequency
10k
160
140
120
100
80
V
T
= ±15V
= 25°C
S
A
T
= 25°C
A
–PSR
T
= 125°C
A
+PSR
1k
60
40
20
V
V
= ±15V
= ±10V
S
O
100
0
1
10
20
1
10
100
1k
10k
100k
1M
LOAD RESISTANCE (kΩ)
FREQUENCY (Hz)
Figure 18. Open-Loop Gain vs. Load Resistance
Figure 21. Power Supply Rejection vs. Frequency
35
30
25
20
15
10
5
R
= 2kΩ
= ±15V
= ±10V
V
T
A
= ±15V
= 25°C
= +1
L
S
S
A
V
V
CN
VCL
1% THD
R
T
= 125°C
= 25°C
= 10kΩ
A
L
T
A
0
100
–15
–10
–5
0
5
10
15
1k
10k
FREQUENCY (Hz)
100k
OUTPUT VOLTAGE (V)
Figure 19. Open-Loop Gain Linearity
Figure 22. Maximum Output Swing vs. Frequency
Rev. E | Page 7 of 16
OP497
+V
700
600
500
400
300
200
S
T
= 25°C
NO LOAD
A
–0.5
–1.0
–1.5
125°C
25°C
1.5
1.0
0.5
–V
S
0
±5
±10
±15
±20
0
±5
±10
±15
±20
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
Figure 23. Input Common-Mode Voltage Range vs. Supply Voltage
Figure 26. Supply Current (per Amplifier) vs. Supply Voltage
35
1k
V
T
= ±15V
= 25°C
V
T
A
= ±15V
= 25°C
= +1
S
S
A
A
30
25
20
15
10
5
VCL
100
10
1% THD
fO = 1kHz
1
A
= +1
V
0.1
0.01
0.001
0
10
100
1k
10k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
LOAD RESISTANCE (Ω)
Figure 27. Closed-Loop Output Impedance vs. Frequency
Figure 24. Maximum Output Swing vs. Load Resistance
35
+V
S
T
R
= 25°C
= 10kΩ
A
30
25
20
15
–0.5
L
T
= 25°C
A
–1.0
–1.5
T
= 125°C
A
V
= ±15V
S
OUTPUT SHORTED
TO GROUND
–15
–20
–25
–30
–35
1.5
1.0
0.5
T
= 125°C
= 25°C
A
T
A
–V
S
0
1
2
3
4
0
±5
±10
±15
±20
TIME FROM OUTPUT SHORT (Minutes)
SUPPLY VOLTAGE (V)
Figure 28. Short-Circuit Current vs. Time at Various Temperatures
Figure 25. Output Voltage Swing vs. Supply Voltage
Rev. E | Page 8 of 16
OP497
70
60
50
40
30
20
10
0
V
= ±15V
= 25°C
= +1
S
T
A
A
V
VCL
= 100mV p-p
OUT
10
100
1k
10k
LOAD CAPACITANCE (pF)
Figure 29. Small-Signal Overshoot vs. Load Capacitance
Rev. E | Page 9 of 16
OP497
APPLICATIONS INFORMATION
Extremely low bias current makes the OP497 attractive for use
in sample-and-hold amplifiers, peak detectors, and log amplifiers
that must operate over a wide temperature range. Balancing
input resistances is not necessary with the OP497. High source
resistance, even when unbalanced, only minimally degrades the
offset voltage and TCVOS.
100
90
The input pins of the OP497 are protected against large differential
voltage by back-to-back diodes and current-limiting resistors.
Common-mode voltages at the inputs are not restricted and
may vary over the full range of the supply voltages used.
10
0%
20mV
5µs
The OP497 requires very little operating headroom about the
supply rails and is specified for operation with supplies as low as
2 V. Typically, the common-mode range extends to within 1 V
of either rail. When using a 10 kΩ load, the output typically
swings to within 1 V of the rails.
Figure 31. Small Signal Transient Response (CLOAD = 1000 pF, AVCL = +1)
100
90
AC PERFORMANCE
The ac characteristics of the OP497 are highly stable over its full
operating temperature range. Figure 30 shows the unity-gain
small signal response. Extremely tolerant of capacitive loading
on the output, the OP497 displays excellent response even with
1000 pF loads (see Figure 31).
10
0%
2V
50µs
100
90
Figure 32. Large Signal Transient Response (AVCL = +1)
10
0%
20mV
5µs
Figure 30. Small Signal Transient Response (CLOAD = 100 pF, AVCL = +1)
V+
V
OUT
2.5kΩ
–IN
2.5kΩ
+IN
V–
Figure 33. Simplified Schematic Showing One Amplifier
Rev. E | Page 10 of 16
OP497
GUARDING AND SHIELDING
OPEN-LOOP GAIN LINEARITY
To maintain the extremely high input impedances of the OP497,
care must be taken in circuit board layout and manufacturing.
Board surfaces must be kept scrupulously clean and free of
moisture. Conformal coating is recommended to provide a
humidity barrier. Even a clean PCB can have 100 pA of leakage
currents between adjacent traces; therefore, use guard rings
around the inputs. Guard traces are operated at a voltage close
to that on the inputs, as shown in Figure 34, so that leakage
currents become minimal. In noninverting applications, connect
the guard ring to the common-mode voltage at the inverting
input. In inverting applications, both inputs remain at ground;
therefore, the guard trace should be grounded. Place guard
traces on both sides of the circuit board.
The OP497 has both an extremely high gain of 2000 V/mV
typical and constant gain linearity. This enhances the precision
of the OP497 and provides for very high accuracy in high
closed-loop gain applications. Figure 35 illustrates the typical
open-loop gain linearity of the OP497.
R
V
= 10kΩ
= ±15V
L
S
V
= 0V
CM
T
T
= 125°C
= 25°C
A
A
UNITY-GAIN FOLLOWER
NONINVERTING AMPLIFIER
–
–
1/4
OP497
+
1/4
OP497
+
–15
–10
–5
0
5
10
15
OUTPUT VOLTAGE (V)
Figure 35. Open-Loop Gain Linearity
INVERTING AMPLIFIER
PDIP
BOTTOM VIEW
1
8
–
1/4
A
OP497
+
B
Figure 34. Guard Ring Layout and Connections
Rev. E | Page 11 of 16
OP497
APPLICATIONS CIRCUIT
PRECISION ABSOLUTE VALUE AMPLIFIER
PRECISION POSITIVE PEAK DETECTOR
In Figure 38, the CH must be of polystyrene, Teflon®, or
polyethylene to minimize dielectric absorption and leakage.
The droop rate is determined by the size of CH and the bias
current of the OP497.
The circuit in Figure 36 is a precision absolute value amplifier
with an input impedance of 30 Mꢀ. The high gain and low
TCVOS of the OP497 ensure accurate operation with microvolt
input signals. In this circuit, the input always appears as a common-
mode signal to the op amps. The CMR of the OP497 exceeds
120 dB, yielding an error of less than 2 ppm.
1kΩ
+15V
0.1µF
1N4148
+15V
2
6
8
1/4
OP497
1
2N930
+
1/4
OP497
7
1kΩ
V
C2
0.1µF
R1
1kΩ
R3
1kΩ
OUT
3
1kΩ
V
5
IN
4
0.1µF
C
H
C1
30pF
D1
1N4148
6
5
1/4
OP497
7
2
3
8
1kΩ
–15V
1/4
OP497
1
0V < V
< 10V
RESET
OUT
D2
1N4148
C3
0.1µF
R2
2kΩ
V
IN
4
Figure 38. Precision Positive Peak Detector
SIMPLE BRIDGE CONDITIONING AMPLIFIER
–15V
Figure 39 shows a simple bridge conditioning amplifier using
the OP497. The transfer function is
Figure 36. Precision Absolute Value Amplifier
PRECISION CURRENT PUMP
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
ΔR
R + ΔR
RF
R
Maximum output current of the precision current pump shown
in Figure 37 is 10 mA. Voltage compliance is 10 V with 15 V
supplies. Output impedance of the current transmitter exceeds
3 Mꢀ with linearity better than 16 bits.
VOUT = VREF
The REF43 provides an accurate and stable reference voltage for
the bridge. To maintain the highest circuit accuracy, RF should
be 0.1% or better with a low temperature coefficient.
R3
10kΩ
+5V
R1
10kΩ
2
R5
10kΩ
2
–
1/4
OP497
I
1
V
OUT
±10mA
REF
R2
10kΩ
2.5V
R
V
6
R
IN
F
REF43
4
3
R
+
+15V
2
3
8
5
6
R4
10kΩ
1/4
OP497
1
V
OUT
7
1/4
OP497
R + ΔR
R
V
V
IN
IN
4
I
=
=
= 10mA/V
+5V
8
OUT
R5 100Ω
R
F
6
5
ΔR
R + ΔR
V
= V
OUT
REF
(
)
–15V
R
1/4
OP497
7
Figure 37. Precision Current Pump
4
–5V
Figure 39. Simple Bridge Conditioning Amplifier Using the OP497
Rev. E | Page 12 of 16
OP497
A similar analysis made for the square root amplifier circuit in
Figure 41 leads to its transfer function
NONLINEAR CIRCUITS
Due to its low input bias currents, the OP497 is an ideal log
amplifier in nonlinear circuits, such as the squaring amplifier
and square root amplifier circuits shown in Figure 40 and
Figure 41. Using the squaring amplifier circuit in Figure 40
as an example, the analysis begins by writing a voltage loop
equation across Transistors Q1, Q2, Q3, and Q4.
VIN IREF
)
VOUT = R2
R1
In these circuits, IREF is a function of the negative power supply. To
maintain accuracy, the negative supply should be well regulated.
For applications where very high accuracy is required, a voltage
reference can be used to set IREF. An important consideration for
the squaring circuit is that a sufficiently large input voltage can
force the output beyond the operating range of the output op
amp. Resistor R4 can be changed to scale IREF, or R1 and R2 can
be varied to keep the output voltage within the usable range.
⎛
⎞
⎟
⎟
⎠
⎛
⎞
⎟
⎟
⎠
⎛
⎞
⎟
⎟
⎠
⎛
⎞
⎟
⎟
⎠
IIN
IS1
IIN
IS2
IO
IS3
IREF
IS4
⎜
⎜
⎜
⎜
+V In
V In
+V In
=V In I
T1
T2
T3
T4
⎜
⎜
⎜
⎜
⎝
⎝
⎝
⎝
All the transistors in the MAT04 are precisely matched and at
the same temperature; therefore, the IS and VT terms cancel,
giving
R2
33kΩ
2InIIN = InIO + InIREF = In (IO × IREF
)
Exponentiating both sides of the thick equation lead to
C2
100pF
6
5
2
(
IIN
IREF
)
1/4
OP497
7
V
OUT
I
IO =
O
1
Op amp A2 forms a current-to-voltage converter which results
in VOUT = R2 × IO. Substituting (VIN/R1) for IIN and the previous
equation for IO yields
Q1
2
MAT04
I
REF
I
IN
3
7
C1
14
Q4
12
100pF
13
8
2
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
V
R1
R2
IREF
V+
6
9
⎛
⎜
⎞
⎟
IN
Q2
Q3
VOUT
=
R1
33kΩ
5
10
⎝
⎠
8
2
V
IN
1/4
1
OP497
3
R5
2kΩ
R3
50kΩ
R4
50kΩ
4
C2
100pF
V–
–15V
Figure 41. Square Root Amplifier
R2
33kΩ
A2
6
Unadjusted accuracy of the square root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a similar
input voltage range, the accuracy of the squaring circuit is better
than 0.5%.
1/4
OP497
7
V
OUT
I
O
5
1
2
Q1
3
7
6
Q2
5
14
MAT04
13
8
I
Q4
REF
9
Q3
10
V+
8
1/4
OP497
12
C1
R1
133kΩ
A1
100pF
I
IN
2
3
V
IN
1
R3
50kΩ
R4
50kΩ
4
–15V
V–
Figure 40. Squaring Amplifier
Rev. E | Page 13 of 16
OP497
OUTLINE DIMENSIONS
0.775 (19.69)
0.750 (19.05)
0.735 (18.67)
14
1
8
7
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 42. 14-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-14)
Dimensions shown in inches and (millimeters)
10.50 (0.4134)
10.10 (0.3976)
16
1
9
8
7.60 (0.2992)
7.40 (0.2913)
10.65 (0.4193)
10.00 (0.3937)
0.75 (0.0295)
0.25 (0.
0098)
1.27 (0.0500)
BSC
45°
2.65 (0.1043)
2.35 (0.0925)
0.30 (0.0118)
0.10 (0.0039)
8°
0°
COPLANARITY
0.10
SEATING
PLANE
0.51 (0.0201)
0.31 (0.0122)
1.27 (0.0500)
0.40 (0.0157)
0.33 (0.0130)
0.20 (0.0079)
COMPLIANT TO JEDEC STANDARDS MS-013-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 43. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
Rev. E | Page 14 of 16
OP497
ORDERING GUIDE
Model
OP497FP
OP497FPZ1
OP497GP
OP497GPZ1
OP497FS
OP497FS-REEL
OP497FSZ1
OP497FSZ-REEL
OP497GS
OP497GS-REEL
OP497GSZ1
OP497GSZ-REEL1
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
14-Lead Plastic Dual In-Line Package [PDIP]
14-Lead Plastic Dual In-Line Package [PDIP]
14-Lead Plastic Dual In-Line Package [PDIP]
14-Lead Plastic Dual In-Line Package [PDIP]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
16-Lead Standard Small Outline Package [SOIC_W]
N-14
N-14
N-14
N-14
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
RW-16
1 Z = RoHS Compliant Part.
Rev. E | Page 15 of 16
OP497
NOTES
©1991–2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00309-0-2/09(E)
Rev. E | Page 16 of 16
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