5962-89801012A [ADI]
Quad Matched 741-Type Operational Amplifiers;型号: | 5962-89801012A |
厂家: | ADI |
描述: | Quad Matched 741-Type Operational Amplifiers 放大器 |
文件: | 总12页 (文件大小:195K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Quad Matched
741-Type Operational Amplifiers
OP11
FEATURES
PIN CONFIGURATION
Guaranteed VOS: 500 μV maximum
Guaranteed matched CMRR: 94 dB minimum
Guaranteed matched VOS: 750 μV maximum
LM148/LM348 direct replacement
Low noise
Silicon-nitride passivation
Internal frequency compensation
Low crossover distortion
OUT A
OUT D
1
2
3
4
5
6
7
14
13
12
11
–IN A
–IN D
+IN D
V–
+IN A
V+
OP11
+IN B
–IN B
OUT B
10 +IN C
9
8
–IN C
OUT C
Figure 1. 14-Lead PDIP (N-14)
(P Suffix)
Continuous short-circuit protection
Low input bias current
GENERAL DESCRIPTION
The OP11 provides four matched 741-type operational
amplifiers in a single 14-lead PDIP. The OP11 is pin compatible
with the LM148, LM348, RM4156, RM4158, and HA4741
amplifiers. The amplifier is matched for common-mode
rejection ratio and offset voltage, which is very important in
designing instrumentation amplifiers. In addition, the amplifier
is designed to have equal positive-going and negative-going
slew rates, which is an important consideration for good audio
system performance.
The OP11 is ideal for use in designs requiring minimum space
and cost while maintaining performance.
V+
–IN
+IN
OUTPUT
V–
Figure 2. Simplified Schematic
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
OP11
TABLE OF CONTENTS
Features .............................................................................................. 1
Matching Characteristics..............................................................4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Outline Dimensions..........................................................................9
Ordering Guide .............................................................................9
General Description......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3
REVISION HISTORY
6/07—Rev. A to Rev. B
Updated Format..................................................................Universal
Deleted 14-Lead Hermetic DIP/CERDIP .......................Universal
Changes to Table 1............................................................................ 3
Deleted Table 3; Renumbered Sequentially .................................. 3
Changes to Table 2, Layout, Table 3, and Table 4......................... 4
Changes to Table 5 and Table 6....................................................... 5
Changes to Figure 17........................................................................ 8
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide ............................................................ 9
4/02—Rev. 0 to Rev. A
Change OP-09/OP-11 to OP11..............................................Global
Edits to Pin Connections................................................................. 1
Edits to Figure 1................................................................................ 1
Edits to Absolute Maximum Ratings ............................................. 2
Edits to Ordering Guide .................................................................. 2
Edits to Spec Tables .......................................................................2-4
Deletion of Dice Characteristics..................................................... 5
Deletion of Wafer Test Limits Table............................................... 5
Deletion of Typical Electrical Characteristics Table .................... 5
Rev. B | Page 2 of 12
OP11
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = 15 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Symbol
VOS
IOS
IB
RIN
Conditions
Min
Typ
0.3
5.5
180
0.29
13
120
4
13
650
105
0.7
18
14
12
Max
0.5
20
Unit
Input Offset Voltage
Input Offset Current
Input Bias Current
RS ≤ 10 kΩ
mV
nA
nA
MΩ
V
dB
μV/V
V
V/mV
mW
μV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA p-p
pA/√Hz
pA/√Hz
pA/√Hz
dB
V/μs
kHz
MHz
ns
300
Input Resistance Differential Mode1
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
Large Signal Voltage Gain
Power Consumption2
Input Noise Voltage
0.17
12
100
IVR
CMRR
PSRR
VO
AVO
Pd
VCM = 12 V, RS ≤ 10 kΩ
VS = 5 V to 15 V, RS ≤ 10 kΩ
RL = 2 kΩ
RL ≤ 2 kΩ, VO = 10 V
VO = 0 V
0.1 Hz to 10 Hz
fO = 10 Hz
fO = 100 Hz
fO = 1 kHz
0.1 Hz to 10 Hz
fO = 10 Hz
fO = 100 Hz
fO = 1 kHz
32
11
100
180
en p-p
en
Input Noise Voltage Density
Input Noise Current
Input Noise Current Density
In p-p
In
17
1.8
1.5
1.2
130
1.0
16
3.0
110
15
Channel Separation
Slew Rate3
CS
SR
100
0.7
11
Large Signal Bandwidth3
Closed-Loop Bandwidth4
Rise Time3
VO = 20 V p-p
AVCL = 1
AV = 1, VIN = 50 mV
BW
tf
OS
2.4
145
25
Overshoot3
%
1 Guaranteed by input bias current.
2 Total dissipation for all four amplifiers in package.
3 Sample tested.
4 Guaranteed by rise time.
Rev. B | Page 3 of 12
OP11
VS = 15 V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
Table 2.
Parameter
Symbol
Conditions
RS ≤ 10 kΩ
RS ≤ 10 kΩ
Min
Typ
0.4
2.0
14
Max
0.8
10
Unit
mV
μV/°C
nA
Input Offset Voltage
Average Input Offset Voltage Drift1
Input Offset Current
VOS
TCVOS
IOS
30
Average Input Offset Current Drift1
Input Bias Current
Input Voltage Range
TCIOS
IB
IVR
0.1
200
13
0.3
350
nA/°C
nA
V
12
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Swing
Power Consumption2
CMRR
PSRR
AVO
VO
VCM = 12 V, RS ≤ 10 kΩ
VS = 5 V to 15 V, RS ≤ 10 kΩ
RL ≥ 2 kΩ, VO = 10 V
RL ≥ 2 kΩ
100
120
4
250
13
dB
32
μV/V
V/mV
V
50
11
Pd
VO = 0 V
115
200
mW
1 Guaranteed but not tested.
2 Total dissipation for all four amplifiers in package.
MATCHING CHARACTERISTICS
VS = 15 V, TA = 25°C, RS ≤ 100 Ω, unless otherwise noted.
Table 3.
Parameter
Symbol
Conditions
Min
Typ
Max
0.75
20
Unit
mV
μV/V
dB
Input Offset Voltage Match
Common-Mode Rejection
Ratio Match
ΔVOS
ΔCMRR
0.5
1
120
VCM = 12 V
VCM = 12 V
94
VS = 15 V, 0°C ≤ TA ≤ 70°C, RS ≤ 100 Ω, unless otherwise noted.
Table 4.
Parameter
Symbol
Conditions
Min
Typ
0.6
3.2
Max
1.0
20
Unit
mV
μV/V
dB
Input Offset Voltage Match
Common-Mode Rejection
Ratio Match
ΔVOS
ΔCMRR
VCM = 12 V
VCM = 12 V
94
110
Rev. B | Page 4 of 12
OP11
ABSOLUTE MAXIMUM RATINGS
Table 5.
Table 6. Thermal Resistance
Package Type
14-Lead PDIP (N-14)
1
θJA
θJC
Unit
Parameter
Rating
83
39
°C/W
Supply Voltage (VS)
Differential Input Voltage
Input Voltage
22 V
30 V
Supply Voltage
1 θJA is specified for worst-case conditions, that is, θJA is specified for device in
socket for PDIP.
Output Short-Circuit Duration
Continuous
(One Amp Only)
−65°C to +125°C
300°C
ESD CAUTION
Storage Temperature Range
Lead Temperature (Soldering, 60 sec)
Operating Temperature Range
0°C to 70°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. B | Page 5 of 12
OP11
TYPICAL PERFORMANCE CHARACTERISTICS
800
700
600
500
400
300
200
100
0
–0.1
V
R
= ±15V
= 2kΩ
S
V
= ±15V
S
L
–0.2
–0.3
–0.4
–0.5
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 6. Open-Loop Gain vs. Temperature
Figure 3. Input Offset Voltage vs. Temperature
120
100
80
20
15
10
5
V
R
= ±15V
= 2kΩ
= 25°C
= 100pF
S
V
= ±15V
S
L
T
0
A
C
L
GAIN
45
90
PHASE
60
40
20
135
180
0
0.1
0
1
10
100
1k
10k
100k
1M
10M
–60 –40 –20
0
20
40
60
80
100 120 140
FREQUENCY (Hz)
TEMPERATURE (°C)
Figure 7. Open-Loop Gain and Phase vs. Frequency
Figure 4. Input Offset Current vs. Temperature
1.4
300
200
100
0
V
= ±15V
S
V
= ±15V
S
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
SLEW RATE
BANDWIDTH
–60 –40 –20
0
20
40
60
80
100 120 140
–60 –40 –20
0
20
40
60
80
100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 8. Normalized Slew Rate and Bandwidth vs. Temperature
Figure 5. Input Bias Current vs. Temperature
Rev. B | Page 6 of 12
OP11
800
700
600
500
400
300
200
100
0
140
120
100
80
R
= 2kΩ
= 25°C
L
T
A
V
T
= ±15V
= 25°C
S
A
60
40
20
0
10
100
1k
10k
100k
0
5
10
15
20
FREQUENCY (Hz)
POWER SUPPLY VOLTAGE (V)
Figure 12. Channel Separation vs. Frequency
Figure 9. Open-Loop Gain vs. Power Supply Voltage
1k
100
10
140
120
100
80
V
T
= ±15V
= 25°C
S
V
T
= ±15V
= 25°C
S
A
A
60
40
20
1
10
0
100
FREQUENCY (Hz)
1k
10k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 10. CMRR vs. Frequency
Figure 13. Voltage Noise Density vs. Frequency
140
120
100
80
100
10
1
V
T
= ±15V
= 25°C
S
A
V
T
= ±15V
= 25°C
S
A
60
40
20
0
0.1
10
1
10
100
1k
10k
100k
100
FREQUENCY (Hz)
1k
10k
FREQUENCY (Hz)
Figure 11. PSRR vs. Frequency
Figure 14. Current Noise Density vs. Frequency
Rev. B | Page 7 of 12
OP11
16
14
12
10
8
V
R
= ±15V
= 2kΩ
= 25°C
= 100pF
V
T
= ±15V
= 25°C
S
S
POSITIVE SWING
NEGATIVE SWING
L
A
T
A
C
L
20
0
6
–20
4
2
0
0.1
0
200
400
600
800
1
10
TIME (ns)
LOAD RESISTANCE TO GROUND (kΩ)
Figure 15. Transient Response
Figure 18. Output Voltage Swing vs. Load Resistance
5
4
V
R
= ±15V
= 2kΩ
= 25°C
= 100pF
S
T
= 25°C
A
3
2
L
T
A
C
L
1
3
2
0
–1
–2
–3
1
0
0
2
4
6
8
10
12
14
16
18
20
0
10
20
30
40
TIME (µs)
TOTAL SUPPLY VOLTAGE (V)
Figure 16. Voltage Follower Pulse Response
Figure 19. Quiescent Current vs. Total Supply Voltage
28
140
130
120
110
100
(27)
V
R
= ±15V
= 2kΩ
= 25°C
S
V
= ±15V
S
L
24
20
16
12
8
T
A
4
0
1k
–60 –40 –20
0
20
40
60
80
100 120 140
10k
100k
FREQUENCY (Hz)
1M
TEMPERATURE (°C)
Figure 20. Power Consumption vs. Temperature
Figure 17. Maximum Output Swing vs. Frequency
Rev. B | Page 8 of 12
OP11
OUTLINE DIMENSIONS
0.775 (19.69)
0.750 (19.05)
0.735 (18.67)
14
1
8
7
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.015 (0.38)
GAUGE
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
PLANE
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.430 (10.92)
MAX
0.005 (0.13)
MIN
0.070 (1.78)
0.050 (1.27)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 21. 14-Lead Plastic Dual In-Line Package [PDIP]
(N-14)
[P Suffix]
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
OP11EP
OP11EPZ1
0°C to 70°C
0°C to 70°C
14-Lead Plastic Dual In-Line Package (PDIP)
14-Lead Plastic Dual In-Line Package (PDIP)
N-14 (P-Suffix)
N-14 (P-Suffix)
1 Z = RoHS Compliant Part.
For military processed devices, refer to the Standard Microcircuit Drawing (SMD) available at
http://www.dscc.dla.mil/downloads/Milspec/Smd/89801.pdf.
SMD Part Number
5962-89801012A
5962-8980101CA
Analog Devices, Inc. Equivalent
OP11ARCMDA
OP11AYMDA
Rev. B | Page 9 of 12
OP11
NOTES
Rev. B | Page 10 of 12
OP11
NOTES
Rev. B | Page 11 of 12
OP11
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02784-0-6/07(B)
Rev. B | Page 12 of 12
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