125932-HMC676LC3C [ADI]

EVAL BOARD HMC676LC3C;
125932-HMC676LC3C
型号: 125932-HMC676LC3C
厂家: ADI    ADI
描述:

EVAL BOARD HMC676LC3C

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HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Typical Applications  
Features  
The HMC676LC3C is ideal for:  
• ATE Applications  
Equivalent Input Bandwidth: 10 GHz  
Propagation Delay: 100 ps  
Overdrive & Slew Rate Dispersion: 10 ps  
Minimum Pulse Width: 60 ps  
• High Speed Instrumentation  
• Digital Receiver Systems  
• Pulse Spectroscopy  
Resistor Programmable Hyresis  
Differential Latch Control  
• High Speed Trigger Circuits  
• Clock & Data Restoration  
Power Dissipation: 10 mW  
RSCML and RSVersions Avble  
16 Lead 3x3 mm SMT Pkage: 9 mm2  
Functional Diagram  
Generl Description  
The C67C3C is a SiGe monolithic, ultra fast  
comparathat feares reduced swing (RS) ECL  
output drivd latch inputs. The comparator  
supports 10 Gps operation while providing 100 ps  
ropagatiodelay and 60 ps minimum pulse width with  
0ps rs random jitter (RJ). Overdrive and slew rate  
dispsion are typically 10 ps, making the device ideal  
or a wide range of applications from ATE to broadband  
communications. The reduced swing ECL output stage  
is designed to directly drive 400 mV into 50 ohms  
terminated to -2 V. The HMC676LC3C features high  
speed latch and programmable hysteresis and may  
be configured to operate in either latch mode, or as a  
tracking comparator.  
Electricaions, TA = +25 °C, Vcci= +3.3 V, Vcco = 0 V, Vee = -3 V, VTERM = -2 V  
Input Voltage Rang
Conditions  
Min.  
-2  
Typ.  
Max  
2
Units  
V
Input Differential Voltage  
Input Offset Voltage  
-1.75  
1.75  
V
5
15  
15  
50  
4
mV  
µV / °C  
uA  
Input Offset Voltage, Temperature Coefficient  
Input Bias Current  
Input Bias Current Temperature Coefficient  
Input Offset Current  
nA / °C  
µA  
Input Impedance  
50  
350  
15  
45  
80  
1
Ω
Common Mode Input Impedance  
Differential Input Impedance  
Active Gain  
KΩ  
KΩ  
dB  
Common Mode Rejection Ratio  
Hysteresis  
dB  
Rhys = ∞  
mV  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesfor itsuse, norforanyinfringementsof patentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
Phone: 781-329-4700 • Order online at www.analog.com  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
1
Application Support: Phone: 1-800-ANALOG-D  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Latch Enable Characteristics  
Parameter  
Latch Enable Input Impedance  
Latch Enable to Output Delay, tPLOL, tPLOH  
Latch Enable Minimum Pulse Width, tPL  
Latch Enable Input Range  
Conditions  
Each Pin  
Min.  
1.6  
Typ.  
8
Max  
2.4  
Units  
KΩ  
ps  
VOD = 200 mV  
VOD = 200 mV  
VOD = 200 mV  
VOD = 200 mV  
85  
20  
ps  
V
Latch Setup Time, tS  
45  
ps  
Latch Hold Time, tH  
-42  
ps  
DC Output Characteristics, with 50 Ω to Vcco - 2 V  
Parameter  
Output Voltage High Level, Voh  
Output Voltage Low Level, Vol  
Output Voltage Differential Swing  
Conditions  
Min.  
-0.8
21  
0  
Typ
-0.89  
-1.25  
350  
Max  
-0.95  
-1.35  
400  
Units  
V
V
mV  
AC Performance  
Parameter  
Conditions  
Min.  
Typ.  
100  
Max  
130  
Units  
ps  
Propagation Delay - tPD, tPDL, tPDH  
Propagation Delay, Temperature Coefficient  
VOD =
0.45  
ps / °C  
Propagation Delay Skew  
(Rising to Falling Transition)  
V
0m V <
= 500 mV  
10  
10  
3
ps  
ps  
ps  
VOD Dispersion  
tPD vs. Common Mode Dispersion,  
-1.75 V <Vcm <1.75 V  
Noise (RTI)  
5.9  
10  
nV/√(Hz) RTI  
GHz  
Equivalent Input Bandwidth [1]  
9
16  
Deterministic Jitter at 10 Gbps  
with 100 mV Overdrive  
Deterministic Jitter (pp)  
Random Jitter (rms)  
2
ps  
Random Jitter at 10 Gbps  
with 100 mV Overdrive  
0.2  
ps rms  
Input Signal Minth  
Q / QB Rise T
60  
23  
13  
ps  
ps  
ps  
From 20% to 80%  
From 20% to 80%  
Q / QB Fall Tim
Power Supply Requirements  
Parameter  
Input Supply Current, Icci  
Output Supply Current, Icco  
Vee Current, lee  
Conditions  
Min.  
Typ.  
8
Max  
Units  
mA  
mA  
mA  
mW  
dB  
45  
16  
Power Dissipation, Pd  
PSRR, Vcci  
120  
38  
38  
PSRR, Vee  
dB  
Note 1: Equivalent Input Bandwidth is calculated with the following formula: Bweq=0.22/√ (TRCOMP2-TRIN2) where TRIN is the 20%/80%  
transition time of a quasi-Gaussian signal applied to the comparator input, and TRCOMP is the effective transition time digitized by the  
comparator.  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesforits use, norforanyinfringementsofpatentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
Phone: 781-329-4700 • Order online at www.analog.com  
2
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
Application Support: Phone: 1-800-ANALOG-D  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Propagation Delay vs. Common Mode  
Dispersion vs. Overdrive Voltage  
11  
15  
12.5  
10  
9
7
7.5  
5
5
2.5  
0
3
1
-2.5  
-5  
-1  
0
10  
20  
30  
40  
50  
60  
70  
80  
90 100  
-2  
1.5  
-1  
-
0
0.5  
1
1.5  
2
OVERDRIVE VOLTAGE (mV)  
COMMON MVOLTAGE (mV)  
Compor Hysresis  
vs. Rhys ontol Resistor  
Output Voltage vs. Temperature  
-0.6  
15  
-0.8  
-1  
10  
5
-1.2  
-1.4  
0
-45 -32 -19  
-6  
7
46  
59  
85  
100  
1000  
10000  
RESISTANCE (Ohm)  
TE
Eye Diagram  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesforits use, norforanyinfringementsofpatentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result fromits use. Specifications subjecttochangewithout notice. No
Phone: 781-329-4700 • Order online at www.analog.com  
Application Support: Phone: 1-800-ANALOG-D  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
3
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Timing Diagram  
Symbol  
Description  
Propagation delay measured from the time the input signal crosses the reference  
tPDH  
tPDL  
tPLOH  
tPLOL  
tH  
Input t
o outp
(
the input offset voltage) to the 50% point of an output low-to-high transition.  
Propagation delay measured from the time the input signal crosses the reference  
the input offset voltage) to the 50% point of an output high-to-low transition.  
(
Propagation delay measured from the 50% point of the latch enable signal high-to-low  
transition to the 50% point of an output low-to-high transition.  
e to output high delay  
le to output low delay  
Minimum hold time  
Propagation delay measured from the 50% point of the latch enable signal high-to-low  
transition to the 50% point of an output high-to-low transition.  
Minimum time after the positive transition of the latch enable signal that the input signal  
must remain unchanged to be acquired and held at the outputs.  
Minimum time that the latch enable signal must be low to acquire an input signal  
change.  
tPL  
Minimum latch enable pulse width  
Minimum setup time  
Minimum time before the positive transition of the latch enable signal that an input  
signal change must be present to be acquired and held at the outputs.  
tS  
Amount of time required to transition from a low to a high output as measured at the  
20% and 80% points.  
tR  
Output rise time  
Amount of time required to transition from a high to a low output as measured at the  
20% and 80% points.  
tF  
Output fall time  
VOD  
Voltage overdrive  
Difference between the input voltages VINP and VINN-  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implicationor otherwiseunder anypatent or patentrightsofAnalogDevices.
Phone: 781-329-4700 • Order online at www.analog.com  
Application Support: Phone: 1-800-ANALOG-D  
4
Trademarks and registered trademarks are the property of their respective owners.  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Operational Description  
The HMC676LC3C is a Latched Comparator with 10 GHz equivalent input bandwidth. The device is comprised of three  
blocks: 1) An input amplifier, 2) A latch, and 3) An RSECL Output Buffer. The latching circuit is level sensitive, and  
consists of a single high-speed latch. The HMC676LC3C comparator supports 10 Gb/s operation. The minimum input  
data latching pulse width is 60 ps.  
The HMC676LC3C operates in either Track (Transparent) Mode, where the output follows thogical value of the input,  
or the Latch (Hold) Mode, where the output value is held to the logical value of the comparisesult the input just prior  
to (LE - LE_bar) going HI. Track Mode operation is selected by either 1) (LE - LE_barLO, or E and _bar inputs  
floating. Latch Mode is selected by (LE - LE_bar) HI. The input impedance of the Lnd LE_bar ut8 k ohms, but  
these inputs can be terminated with 50 ohm external resistors if desired.  
When DC coupled, the clock inputs operate at an input common mode vtage of 2 V. this case, any termination  
resistors would ideally be returned to 2 V. If the clock is AC coupled to tdevice, the input temination resistors can be  
returned to ground.  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
Phone: 781-329-4700 • Order online at www.analog.com  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
5
Application Support: Phone: 1-800-ANALOG-D  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Absolute Maximum Ratings  
Input Supply Voltage (Vcci to GND)  
-0.5 V to +4 V  
ELECTROSTATIC SENSITIVE DEVICE  
OBSERVE HANDLING PRECAUTIONS  
Output Supply Voltage (Vcco to GND)  
-0.5 V to +4 V  
Positive Supply Voltage Differential  
(Vcci - Vcco)  
-0.5 V to +3.3 V  
Input Voltage  
-2 V to +2 V  
-2 V to +2 V  
-0.5 V to Vcci +0.5 V  
Vee to GND  
20 mA  
Differential Input Voltage  
Input Voltage, Latch Enable  
Applied Voltage (HYS)  
Maximum Input Current  
Output Current  
40 mA  
Storage Temperature  
Junction Temperature  
-65 °C to +150 °C  
125 °C  
Continuous Pdiss (T = 85 °C)  
(Derate 20.4 mW/°C above 85 °C)  
0.816 W  
Thermal Resistance (Rth) (Junction to Lead) 49 °C/W  
Operating Temperature  
ESD Sensitivity (HBM)  
-40 °C to +85 °C  
Class 1A  
Outline Drawing  
NOTES:  
1. PACKAGE BODY MATERIAL: ALUMINA  
2. LEAD AND GROUND PADDLE PLATING:  
30-80 MICROINCHES GOLD OVER 50 MICROINCHES MINIMUM NICKEL.  
3. DIMENSIONS ARE IN INCHES [MILLIMETERS].  
4. LEAD SPACING TOLERANCE IS NON-CUMULATIVE.  
5. PACKAGE WARP SHALL NOT EXCEED 0.05 mm DATUM -C-  
6. ALL GROUND LEADS MUST BE SOLDERED TO PCB RF GROUND.  
7. PADDLE MUST BE SOLDERED TO Vee.  
Package Information  
Part Number  
Package Body Material  
Alumina, White  
Lead Finish  
MSL Rating  
MSL3 [1]  
Package Marking [2]  
H676  
XXXX  
HMC676LC3C  
Gold over Nickel  
[1] Max peak reflow temperature of 260 °C  
[2] 4-Digit lot number XXXX  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesforits use, norforanyinfringementsofpatentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
Phone: 781-329-4700 • Order online at www.analog.com  
6
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
Application Support: Phone: 1-800-ANALOG-D  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Pin Descriptions  
Pin Number  
Function  
Description  
Interface Schematic  
1
2
3
VTP  
INP  
Termination resistor return pin for Vp Input.  
Non-Inverting analog input  
INN  
VTN  
Inverting analog input  
4
Termination resistor return pin for Vn input  
5, 16  
Vcci  
LE  
Positive supply voltage input stage.  
Latch enable bar input pin, inverting side.  
Refer to the Operational Description for more details.  
6
7
Latch enable input pin, non-inverting .  
Refer to the Operational Description for mdetail
LE  
Pin is not connected inside the package.  
Connect package pin to GNfor improved noise.  
8
N/C  
9, 12  
Vcco  
Positive supply vfor the ut sta
Inverting output. if the analog voltage  
at the non-invertter than the analog  
voltage at the iprovided that the  
compain comfer to the Operational  
Descriptioore details.  
10  
11  
14  
Q
Q
Novertinis at logic high if the analog voltage  
at tnverting ut, INP, is greater than the analog  
voltage at the inting input, INN, provided that the  
omparatos in mpare mode. Refer to the Operational  
Description for more details.  
Control pin. This pin should be left disconnected  
hysteresis. Connect to Vee with a resistor to add  
ired amount of hysteresis. Refer to hysteresis graph  
etermine the correct sizing of Rhys hysteresis control  
resistor.  
HYS  
13  
15  
RTN  
Negative power supply, -3 V.  
Return for ESD protection.  
Package Base  
Exposed paddle must be connected to Vee.  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesfor itsuse, norforanyinfringementsof patentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
Phone: 781-329-4700 • Order online at www.analog.com  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
7
Application Support: Phone: 1-800-ANALOG-D  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Evaluation PCB  
Front Side  
Back Side  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibilityisassumedby AnalogDevicesforits use, norforanyinfringementsofpatentsor other
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result fromits use. Specifications subjecttochangewithout notice. No
Phone: 781-329-4700 • Order online at www.analog.com  
Application Support: Phone: 1-800-ANALOG-D  
8
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
List of Materials for Evaluation PCB 125932 [1]  
Item  
Description  
The circuit board used in the application should  
use RF circuit design techniques. Signal lines  
should have 50 Ohm impedance while the pack-  
age ground leads should be connected directly  
to the ground plane similto that shown. A  
sufficient number of via les shuld be used to  
connect the top and bottogrond planes in order  
to provide good Rgroung to 2GHz. The  
evaluation circuit rd shown ilable from Hit-  
tite upon requst.  
J1  
8 Pos. Vertical TIN  
J2 - J7  
J8  
2.92 mm 40 GHz Jack  
Terminal Strip, Single Row 3 Pin SMT  
2 Pos. Vertical TIN  
JP1, JP2  
C1 - C3, C5, C6,  
C8 - C10  
100 pF Capacitor, 0402 Pkg.  
C4, C7, C11  
C11 - C13  
TP1 - TP4  
U1  
330 pF Capacitor, 0402 Pkg.  
4.7 uF Tantalum  
DC Pin, Swage Mount  
HMC676LC3C Comparator  
125929 Evaluation PCB  
PCB  
[1] Reference this number when ordering complete evaluation PCB  
[2] Circuit Board Material: Rogers 4350 or Arlon 25FR  
Application Circuit  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implicationor otherwiseunder anypatent or patentrightsofAnalogDevices.
Phone: 781-329-4700 • Order online at www.analog.com  
Application Support: Phone: 1-800-ANALOG-D  
9
Trademarks and registered trademarks are the property of their respective owners.  
HMC676LC3C  
v09.0514  
10 GHz LATCHED COMPARATOR  
WITH RSECL OUTPUT STAGE  
Notes:  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
For price, delivery, and to place orders: Analog Devices, Inc.,  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
Phone: 781-329-4700 • Order online at www.analog.com  
10  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
Application Support: Phone: 1-800-ANALOG-D  

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