ABX2008QC [ABRACON]
PECL Output Clock Oscillator, 100MHz Min, 200MHz Max, QFN,16 PIN;型号: | ABX2008QC |
厂家: | ABRACON |
描述: | PECL Output Clock Oscillator, 100MHz Min, 200MHz Max, QFN,16 PIN 机械 输出元件 振荡器 |
文件: | 总8页 (文件大小:109K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
FEATURES
PIN CONFIGURATION
(Top View)
•
•
100MHz to 200MHz Fundamental or 3rd
Overtone Crystal.
Output range: 100 – 200MHz (no multiplication),
200 – 400MHz (2x multiplier), 400 – 700MHz (4x
multiplier), or 800MHz-1GHz(ABX2009 only, 8x
multiplier).
CMOS (Standard drive ABX2007 or Selectable
Drive ABX2006), PECL (Enable low ABX2008 or
Enable high ABX2005) or LVDS output
(ABX2009).
1
VDD
XIN
1
2
3
4
5
6
7
8
SEL0^
SEL1^
GND
6
1
5
1
4
1
3
1
2
1
XOUT
SEL3^
SEL2^
OE
•
CLKC
VDD
CLKT
GND
1
1
0
•
•
Supports 3.3V-Power Supply.
GND
GND
Available in 16-Pin (TSSOP or 3x3mm QFN)
Note: ABX2006 only available in 3x3mm.
Note: ABX2007 only available in TSSOP.
9
GND
DESCRIPTION
The ABX200x family of XO IC’s is specifically
designed to work with high frequency fundamental
and third overtone crystals. Their low jitter and low
phase noise performance make them well suited for
high frequency XO requirements. They achieve very
low current into the crystal resulting in better overall
stability.
12
11
10
9
13
14
15
8
7
6
5
XIN
GND
CLKC
VDD
XOUT
SEL2^
ABX200x
16
CLKT
OE
1
2
3
4
^: Internal pull-up
*: ABX2006 pin 12 is output drive select (DRIVSEL)
(0 for High Drive CMOS, 1 for Standard Drive CMOS)
BLOCK DIAGRAM
SEL
OE
OUTPUT ENABLE LOGICAL LEVELS
PLL
(Phase
Q
Part #
OE
0
State
Locked
Loop)
Q
Oscillator
Amplifier
Output enabled
(Default)
ABX2008
X+
X-
1
0
Tri-state
Tri-state
ABX2005
ABX2006
ABX2007
ABX2009
PLL by-pass
1
Output enabled
(Default)
OE input: Logical states defined by PECL levels for ABX2008
Logical states defined by CMOS levels for
ABX2005/06/07/09
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 1
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
PIN DESCRIPTIONS
3x3mm QFN*
Pin number
TSSOP*
Pin number
Name
Type
Description
VDD
XIN
1, 12
6,11
P
I
+3.3V power supply.
2
13
Crystal input. See Crystal Specification on page 3.
Crystal output. See Crystal Specification on page 3.
Output enable.
XOUT
OE
3
14
16
I
6
I
GND
7,8,9, 10, 14
1,2,3,4,8,12
P
Ground (except pin 12 on ABX2006: DRIVSEL see below).
ABX2006 only: Drive Select Input. This pin has an internal
pull-up that will default DRIVSEL to ‘1’ when not connect to
GND. CMOS output of ABX2006 will be high drive CMOS
when DRIVSEL is set to ‘0’, and will be standard CMOS
otherwise.
DRIVSEL**
-
12
I
True output PECL (ABX2008) or LVDS (ABX2009)
(N/C for ABX2007)
Complementary output PECL (ABX2008) or LVDS (ABX2009)
(CMOS out for ABX2007).
CLKT
CLKC
11
13
5
7
O
O
SEL0
SEL1
SEL2
SEL3
16
15
5
10
I
I
I
I
9
15
Multiplier selector pins. These pins have an internal pull-up
that will default SEL to ‘1’ when not connected to GND.
4
Not available
* Note: ABX2006 only available in 3x3mm QFN, ABX2007 only available in TSSOP.
** Note: DRIVSEL on pin 12 on ABX2006 only.
FREQUENCY SELECTION TABLE
SEL3
SEL2
SEL1
SEL0
Selected Multiplier
Fin x 8(ABX2009 only)
0
1
1
1
0
0
1
1
1
1
1
1
1
1
0
1
Fin x 4
Fin x 2
No multiplication
Note: SEL3 is not available (always “1”) in 3x3mm package
All pins have internal pull-ups (default value is 1). Connect to GND to set to 0.
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 2
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
VDD
VI
4.6
VDD+0.5
VDD+0.5
150
V
Input Voltage, dc
Output Voltage, dc
Storage Temperature
-0.5
-0.5
-65
V
VO
TS
TA
TJ
V
°C
°C
°C
°C
kV
Ambient Operating Temperature*
Junction Temperature
-40
85
125
Lead Temperature (soldering, 10s)
ESD Protection, Human Body Model
260
2
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for COMMERCIAL grade only.
2. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Fundamental or 3rd
overtone*
Crystal Resonator Frequency
FXIN
100
200
MHz
Crystal Loading Rating
Interelectrode Capacitance
Recommended ESR
CL (xtal)
C0
5
pF
pF
Ω
5
RE
AT cut
30
* Note: 3rd overtone crystals require an external resistor between XIN and XOUT to prevent the fundamental from oscillating.
3. General Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
PECL/LVDS/CMOS
MIN.
TYP.
MAX.
UNITS
Supply Current (Loaded
Outputs)
Operating Voltage
IDD
100/80/40
3.63
mA
V
VDD
2.97
@ 50% VDD (CMOS)
@ 1.25V (LVDS)
@ VDD – 1.3V (PECL)
45
45
45
50
50
50
55
55
55
Output Clock Duty Cycle
Short Circuit Current
%
mA
±50
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 3
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
4. Jitter Specifications
PARAMETERS
CONDITIONS
MIN.
TYP.
2.5
MAX.
UNITS
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 10,000
cycles
At 155.52MHz, with capacitive decoupling
between VDD and GND. Over 1,000,000
cycles.
Period jitter RMS
ps
Period jitter peak-to-peak
Accumulated jitter RMS
Accumulated jitter peak-to-peak
18.5
2.5
20
ps
24
27
0.4
49
Random Jitter
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
2.5
0.3
11
ps
ps
Integrated jitter RMS at 155MHz
Period jitter RMS
At 622.08MHz, with capacitive decoupling
between VDD and GND. Over 10,000
cycles
At 622.08MHz, with capacitive decoupling
between VDD and GND. Over 1,000,000
cycles.
ps
ps
Period jitter peak-to-peak
Accumulated jitter RMS
45
11
24
Accumulated jitter peak-to-peak
27
Random Jitter
“RJ” measured on Wavecrest SIA 3000
Integrated 12 kHz to 20 MHz
3
ps
ps
Integrated jitter RMS at 622MHz
1.6
1.8
5. Phase Noise Specifications
PARAMETERS
FREQUENCY
@10Hz
@100Hz
@1kHz @10kHz @100kHz UNITS
155.52MHz
622.08MHz
-75
-75
-95
-95
-125
-110
-140
-125
-145
-120
Phase Noise relative
to carrier
dBc/Hz
6. CMOS Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
mA
IOH
IOL
IOH
IOL
VOH= VDD-0.4V, VDD=3.3V
VOL = 0.4V, VDD = 3.3V
VOH= VDD-0.4V, VDD=3.3V
VOL = 0.4V, VDD = 3.3V
30
30
10
10
Output drive current
(High Drive)
mA
mA
Output drive current
(Standard Drive)
mA
Output Clock Rise/Fall Time
(Standard Drive)
Output Clock Rise/Fall Time
(High Drive)
0.3V ~ 3.0V with 15 pF load
0.3V ~ 3.0V with 15 pF load
2.4
1.2
ns
* Note: High Drive CMOS is available on ABX2006 through DRIVSEL selector input on pin 12.
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 4
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
7. LVDS Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
Output Differential Voltage
VDD Magnitude Change
Output High Voltage
Output Low Voltage
Offset Voltage
VOD
∆VOD
VOH
247
-50
355
454
50
mV
mV
V
1.4
1.1
1.2
3
1.6
RL = 100 Ω
(see figure)
VOL
0.9
1.125
0
V
VOS
1.375
25
V
Offset Magnitude Change
mV
∆VOS
Vout = VDD or GND
VDD = 0V
Power-off Leakage
IOXD
IOSD
uA
±1
±10
Output Short Circuit Current
-5.7
-8
mA
8. LVDS Switching Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
RL = 100 Ω
CL = 10 pF
(see figure)
Differential Clock Rise Time
Differential Clock Fall Time
tr
tf
0.2
0.2
0.7
0.7
1.0
1.0
ns
ns
LVDS Levels Test Circuit
LVDS Switching Test Circuit
OUT
OUT
CL = 10pF
50
50
Ω
Ω
VOD
VOS
VDIFF
RL = 100Ω
CL = 10pF
OUT
OUT
LVDS Transistion Time Waveform
OUT
OUT
0V (Differential)
80%
80%
VDIFF
0V
20%
20%
tR
tF
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 5
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
9. PECL Electrical Characteristics
PARAMETERS
SYMBOL
CONDITIONS
MIN.
MAX.
UNITS
Output High Voltage
Output Low Voltage
VOH
VOL
VDD – 1.025
V
V
RL = 50 Ω to (VDD – 2V)
(see figure)
VDD – 1.620
19. PECL Switching Characteristics
PARAMETERS
Clock Rise Time
Clock Fall Time
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
tr
tf
@20/80% - PECL
@80/20% - PECL
0.6
0.5
1.5
1.5
ns
ns
PECL Levels Test Circuit
PECL Output Skew
OUT
VDD
OUT
50
50
Ω
Ω
2.0V
50%
OUT
tSKEW
OUT
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
OUT
80%
50%
20%
OUT
tR
tF
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 6
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
PACKAGE INFORMATION
16 PIN TSSOP ( mm )
Symbol
Min.
Max.
1.20
0.15
0.30
0.20
5.10
4.50
E
H
A
A1
B
-
0.05
0.19
0.09
4.90
4.30
D
C
D
E
A
H
L
6.40 BSC
A1
0.45
0.75
C
e
0.65 BSC
L
B
e
3mm x 3mm, QFN
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 7
ABX2005/06/07/08/09
Low Phase Noise XO with multipliers (for 100-200MHz Fund or 3rdOT Xtal)
Universal Low Phase Noise IC’s
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
30332 Esperanza., Rancho Santa Margarita, Ca 92688
Ph: 949-546-8000 Fax: 949-546-8001
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
ABX200x X C
PART NUMBER
TEMPERATURE
C=COMMERCIAL
I=INDUSTRIAL
PACKAGE TYPE
O=TSSOP Q=QFN
Order Number
Marking
Package Option
ABX2005OC
ABX2005OC-T
ABX2005QC
ABX2005QC-T
ABX2005OC
ABX2005OC
ABX2005QC
ABX2005QC
TSSOP – Tube
TSSOP – Tape & Reel
QFN – Tube
QFN – Tape & Reel
ABX2006QC
ABX2006QC-T
ABX2006QC
ABX2006QC
QFN – Tube
QFN – Tape & Reel
ABX2007OC
ABX2007OC-T
ABX2007OC
ABX2007OC
TSSOP – Tube
TSSOP – Tape & Reel
ABX2008OC
ABX2008OC-T
ABX2008QC
ABX2008QC-T
ABX2008OC
ABX2008OC
ABX2008QC
ABX2008QC
TSSOP – Tube
TSSOP – Tape & Reel
QFN – Tube
QFN – Tape & Reel
ABX2009OC
ABX2009OC-T
ABX2009QC
ABX2009QC-T
ABX2009OC
ABX2009OC
ABX2009QC
ABX2009QC
TSSOP – Tube
TSSOP – Tape & Reel
QFN – Tube
QFN – Tape & Reel
Abracon Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Abracon is believed to be accurate and reliable. However, Abracon makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: Abracon’s products are not authorized for use as critical components in life support devices or systems without the express
written approval of the President of Abracon Corporation.
30332 Esperanza., Rancho Santa Margarita, Ca 92688 Ph: 949-546-8000 Fax: 949-546-8001 www.Abracon.com 03/21/05 Page 8
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