IMP5245CPW [A1PROS]
LVD SCSII Termiinattor; LVD SCSII Termiinattor
| 型号： | IMP5245CPW |
| 厂家： | 
A1 PROS CO., LTD. |
| 描述： | LVD SCSII Termiinattor |
| 文件： | 总5页 (文件大小：119K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IMP5245/46
DATA
C
OMMUNICATIONS
Key Features
LVD SCSI Terminator
– Ultra2/3 SCSI
– 9 Channels
– Eliminates External VREF Capacitor
The IMP5245/ 5246 ICs are Low Voltage Differential (LVD) terminators
designed to comply with the LVD termination specification in the SPI-2
document. The IMP5245/ 5246 are designed specifically for LVD appli-
cations. Because the IMP5245/ 5246 support only LVD, they have lower
output capacitance than multimode terminators.
ꢀ 2.5pF typical disabled output capacitance
ꢀ Fast response
ꢀ No external VREF capacitors required
ꢀ 5µA supply current in disconnect mode
ꢀ 20mA supply current during normal operation
ꢀ Logic command disconnects all termination lines
ꢀ Diffsense line driver
ꢀ Current limit and thermal protection
ꢀ Compatible with the pending SPI-2 LVD
specification
ꢀ Pin compatible to the UCC5640
The IMP5245/ 5246 deliver the ultimate in SCSI bus performance while
saving component cost and board area. Elimination of the external
capacitors also mitigates the need for a lengthy capacitor selection
process. The individual high bandwidth drivers also maximize channel
separation and reduces channel-to-channel noise and cross talk. The
high-bandwidth architecture insures ULTRA-2 performance, while pro- voltage differential device, the IMP5245/ 5246 output will
viding a clear migration path to ULTRA-3 and beyond. also be in a high-impedance state.
When the IMP5245/ 5246 are enabled, the differential sense (DIFF- The IMP5245/ 5246 ICs have a TTL compatible disconnect
SENSE) pin supplies a voltage between 1.2V and 1.4V. The terminator
DIFFSENSE output is connected to the system DIFFSENSE line. If there
are no single ended or HVD devices attached to the system the LVD
output will be enabled. If the DIFFSENSE line is LOW, indicating a
pin. The IMP5245 is active LOW and the IMP5246 is active
HIGH. During sleep mode, power supply current is
reduced to just 5µA. During sleep mode all outputs are in
a high-impedance state. Also during sleep mode, the
single ended device, the IMP5245/ 5246 output will be in a high- DIFFSENSE function is disabled and is placed in a high-
impedance state. If the DIFFSENSE line is HIGH, indicating a high
impedance state.
Block Diagram
DIFFSENSE
OUT
1.3V
DIFFB
DISC
R–
R+
DISC (IMP5246)
(–)
(+)
VOS/2
VCM
1.25V
VOS/2
5245/46_01.eps
©
2002 IMP, Inc.
408-432-9100/ www.impweb.com
1
IMP5245/46
Pin Configuration
TSSOP Package
NC 1
1+ 2
24 VTERM
23 9–
22 9+
21 8–
20 8+
19 7–
18 7+
17 6–
16 6+
15 5–
14 5+
13 DISC
1– 3
2+ 4
2– 5
IMP5245/46
3+ 6
3– 7
4+ 8
4– 9
DIFFB 10
DIFFSENSE 11
GND 12
5245/46_05.eps
Ordering Information
Part Number
IMP5245CPW
IMP5246CPW
Temperature Range
0°C to 70°C
Package
24-Pin Plastic TSSOP
0°C to 70°C
24-Pin Plastic TSSOP
Absolute Maximum Ratings1
TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +6.5V
Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to 6.5V
Differential Voltage . . . . . . . . . . . . . . . . . . . . . 0V to 6.5V
Operating Junction Temperature
Storage Temperature Range . . . . . . . . . . . . . . –65°C to 150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . 300°C
Note: 1. Exceeding these ratings could cause damage to the device. All
voltages are with respect to Ground. Currents are positive
into, negative out of the specified terminal.
Plastic (PW Package) . . . . . . . . . . . . . . . . . 150°C
Thermal Data
PW Package:
Thermal Resistance Junction-to-Ambient, θJA . . . . . . 100°C/ W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of
the device/ pc-board system. No ambient airflow is assumed.
408-432-9100/ www.impweb.com
© 2002 IMP, Inc.
2
IMP5245/46
Recommended Operating Conditions
Parameter
Symbol
VTERM
Min
3.0
0
Typ
Max
5.25
5.0
Units
Termpwr Voltage
V
Signal Line Voltage
V
Disconnect Input Voltage
Operating Junction Temperature Range — IMP5245/5246
0
0
VTERM
70
V
°C
Note: 2. Range over which the device is functional.
Electrical Characteristics
Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C ≤ TA ≤ 70°C. TermPwr = 3.3V,
DISCONNECT: IMP5245 = LOW, IMP5246 = HIGH. Low duty cycle pulse testing techniques are used which maintains junction and case
temperatures equal to the ambient temperature.
Parameter
Symbol Conditions
Min
Typ
Max
Units
LVD Terminator Section
TermPwr Supply Current
Power Down Mode
All term lines = Open
20
5
25
10
mA
µA
V
DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW
Common Mode Voltage
Offset Voltage
VOM
VOS
1.125
100
1.25
112
105
1.375
125
110
Open circuit between – and + (see Note 3)
mV
Ω
Differential Terminator
Impedance
V
OD = –1V to 1V
100
Common Mode Impedance
Output Capacitance
Output Leakage
0V to 2.5V
100
200
2.5
300
2
Ω
pF
DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW
DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW,
VLINE = 0 to 4V, TA = 25°C
0
µA
DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW,
VTERM = 0V, VLINE = 2.7V
1
µA
Mode Change Delay
DIFFSENSE = 1.4V to 0V
100
150
ms
DIFFSENSE Section
DIFFSENSE Output Voltage
1.2
5.0
1.3
1.4
V
DIFFSENSE Output Source
Current
DIFFSENSE = 0V
VIN = 2.75V
15.0
mA
DIFFSENSE Sink Current
200
10
µA
µA
DIFFSENSE Output Leakage
DISCONNECT: IMP5245 = HIGH, IMP5246 = LOW,
TA = 25°C
DISCONNECT Section
DISCONNECT Threshold
Input Current
0.8
2.0
10
10
V
DISCONNECT: IMP5245 = 0V
DISCONNECT: IMP5246 = 3.3V
µA
µA
Note: 3. Open circuit failsafe voltage.
©
2002 IMP, Inc.
408-432-9100/ www.impweb.com
3
IMP5245/46
Application Information
VOD = V(-) - V(+), Logic = 0
V(+)
NEGATED
100mV
0V
V(-)
-100mV
Figure 1. Bus Voltage
Figure 2. VOD
IMP5245/46
IMP5245/46
Figure 3.
Table 1. DIFFSENSE/Power Up/Power Down Function Table
IMP5245
DISCONNECT
IMP5246
DISCONNECT
Outputs
DIFFSENS
L < 0.5V
0.7V to 1.9V
H > 2.4V
X
Status
Disable
Enable
Disable
Disable
Disable
Type
HiZ
Current
2mA
L
H
L
H
LVD
HiZ
21mA
2mA
L
H
H
L
HiZ
10µA
10µA
Open
Open
X
HiZ
Note: IMP5245 Disconnect logic is compatible with the Unitrode UCC5640.
408-432-9100/ www.impweb.com
© 2002 IMP, Inc.
4
IMP5245/46
Application Information
HOST
PERIPHERAL
5V
2.2µF
DIFFSENSE
DIFFSENSE
VT
VT
DIFFB
DIFFB
Disconnect
Disconnect
DB(0)-
DB(0)+
DB(0)-
DB(0)+
DISC
DISC
DB(8)-
DB(8)+
DB(8)-
DB(8)+
IMP5245
IMP5245
2.2µF
VT DIFFB
DIFFB VT
ATN-
ATN+
ATN-
ATN+
DISC
DISC
REQ-
REQ+
REQ-
REQ+
IMP5245
IMP5245
SCSI
VT DIFFB
DIFFB VT
CABLE
DB(9)-
DB(9)+
DB(9)-
DB(9)+
DISC
DISC
DB(15)-
DB(15)+
DB(15)-
DB(15)+
IMP5245
IMP5245
Figure 4. Application Schematic
IMP, Inc.
Corporate Headquarters
2830 N. First Street
San Jose, CA 95134-2071
Tel: 408-432-9100
Fax: 408-432-1085
e-mail: info@impinc.com
http:/ / www.impweb.com
© 2002 IMP, Inc.
Printed in USA
Publication #: 7003
Revision:
Issue Date:
Type:
B
The IMP logo is a registered trademark of IMP, Inc.
08/12/02
Preliminary
All other company and product names are trademarks of their respective owners.
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